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1. 发明申请

US20090063868A1 Method, System and Computer Program Product for Preventing Execution of Pirated Software 失效
标题翻译：方法，系统和计算机程序产品，用于防止盗版软件的执行
公开(公告)号：US20090063868A1
公开(公告)日：2009-03-05
申请号：US11850098
申请日：2007-09-05
申请人： Axel Aguado Granados , Benjamin A. Fox , Nathaniel J. Gibbs , Jamie R. Kuesel , Andrew B. Maki , Trevor J. Timpane
发明人： Axel Aguado Granados , Benjamin A. Fox , Nathaniel J. Gibbs , Jamie R. Kuesel , Andrew B. Maki , Trevor J. Timpane
IPC分类号： G06F21/22 , H04L9/00
CPC分类号： G06F21/125 , H04L9/0822 , H04L9/083
摘要： A method, system and computer program product for preventing execution of pirated software. A file is loaded on an end user's computer containing a binary image that is generated by removing one or more code bits from an executable code. A request is sent to a remote server to return a software key required for execution of the executable code from the binary image. The software key is downloaded to the end user's computer on which the binary image is loaded. One or more bits from the software key is inserted into the appropriate location of the binary image to regenerate the executable code. The executable code is enabled for execution on the end user's computer only following the embedding of the one or more bits.
摘要翻译：一种用于防止盗版软件执行的方法，系统和计算机程序产品。文件被加载到最终用户的计算机上，该计算机包含通过从可执行代码中删除一个或多个代码位而生成的二进制映像。向远程服务器发送请求，以从二进制映像返回执行可执行代码所需的软件密钥。软件密钥被下载到加载了二进制图像的最终用户的计算机上。来自软件密钥的一个或多个位被插入二进制图像的适当位置以重新生成可执行代码。只有在嵌入一个或多个位之后，才能在最终用户的计算机上执行可执行代码。

2. 发明授权

US08457920B2 Performance improvement for a multi-chip system via kerf area interconnect 失效
标题翻译：通过切口区域互连实现多芯片系统的性能改进
公开(公告)号：US08457920B2
公开(公告)日：2013-06-04
申请号：US12789669
申请日：2010-05-28
申请人： Benjamin A. Fox , Nathaniel J. Gibbs , Andrew B. Maki , Trevor J. Timpane
发明人： Benjamin A. Fox , Nathaniel J. Gibbs , Andrew B. Maki , Trevor J. Timpane
IPC分类号： G01R31/28
CPC分类号： H01L22/20 , H01L22/14 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor wafer comprises a first chip and a second chip, each chip comprising a core, link layer and physical layer. A kerf area physically connects the two chips on the wafer, and a kerf area interconnect selectively couples the link layers of the two chips while the two physical layers are disabled.
摘要翻译：半导体晶片包括第一芯片和第二芯片，每个芯片包括核心，链路层和物理层。切口区域物理地连接晶片上的两个芯片，并且切口区域互连选择性地耦合两个芯片的链路层，而两个物理层被禁用。

3. 发明授权

US08003412B2 Method and apparatus for measurement and control of photomask to substrate alignment 失效
标题翻译：用于测量和控制光掩模到衬底对准的方法和装置
公开(公告)号：US08003412B2
公开(公告)日：2011-08-23
申请号：US12888600
申请日：2010-09-23
申请人： Axel A. Granados , Benjamin A. Fox , Nathaniel J. Gibbs , Andrew B. Maki , Trevor J. Timpane
发明人： Axel A. Granados , Benjamin A. Fox , Nathaniel J. Gibbs , Andrew B. Maki , Trevor J. Timpane
IPC分类号： H01L21/00
CPC分类号： G03F9/7049 , G03F9/7003 , G03F9/7076 , G03F9/708 , G03F9/7084 , G03F9/7088 , G03F9/7096 , Y10S438/975
摘要： A method, structure, system of aligning a substrate to a photomask. The method comprising: directing light through a clear region of the photomask in a photolithography tool, through a lens of the tool and onto a set of at least three diffraction mirror arrays on the substrate, each diffraction mirror array of the set of at least three diffraction minor arrays comprising a single row of mirrors, all mirrors in any particular diffraction mirror array spaced apart a same distance, mirrors in different diffraction mirror arrays spaced apart different distances; measuring an intensity of light diffracted from the set of at least three diffraction mirror arrays onto an array of photo detectors; and adjusting a temperature of the photomask or photomask and lens based on the measured intensity of light.
摘要翻译：将基板与光掩模对准的方法，结构，系统。该方法包括：将光穿过光刻工具中的光掩模的透明区域，通过工具的透镜并且在基底上的一组至少三个衍射反射镜阵列上，该组的至少三个衍射镜阵列衍射次要阵列包括单排反射镜，在任何特定衍射镜阵列中间隔相同距离的所有反射镜，在不同距离上间隔开的不同衍射镜阵列中的反射镜; 测量从所述至少三个衍射反射镜阵列组衍射的光的强度到光电检测器阵列上; 以及基于所测量的光强度来调节光掩模或光掩模和透镜的温度。

4. 发明授权

US07992001B2 Preventing execution of software without a dynamically generated key 失效
标题翻译：防止没有动态生成的密钥执行软件
公开(公告)号：US07992001B2
公开(公告)日：2011-08-02
申请号：US11850079
申请日：2007-09-05
申请人： Axel Aguado Granados , Benjamin A. Fox , Nathaniel J. Gibbs , Jamie R. Kuesel , Andrew B. Maki , Trevor J. Timpane
发明人： Axel Aguado Granados , Benjamin A. Fox , Nathaniel J. Gibbs , Jamie R. Kuesel , Andrew B. Maki , Trevor J. Timpane
IPC分类号： G06F21/00
CPC分类号： G06F21/125 , H04L9/0822 , H04L9/083
摘要： A method, system and computer program product for partitioning the binary image of a software program, and partially removing code bits to create an encrypted software key, to increase software security. The software program's binary image is partitioned along a random segment length or a byte/nibble segment length, and the code bits removed, and stored, along with their positional data in a software key. The software key is encrypted and is separately distributed from the inoperable binary image to the end user. The encrypted key is stored on a secure remote server. When the end user properly authenticates with the developer's remote servers, the encrypted security key is downloaded from the secure remote server and is locally decrypted. The removed code bits are reinserted into the fractioned binary image utilizing the positional location information. The binary image is then operable to complete execution of the software program.
摘要翻译：一种方法，系统和计算机程序产品，用于对软件程序的二进制图像进行分区，并部分地移除代码位以创建加密的软件密钥，以增加软件安全性。软件程序的二进制图像沿随机分段长度或字节/半字节段长度进行分区，并将代码位与其位置数据一起删除并存储在软件密钥中。软件密钥被加密，并且从不可操作的二进制图像分开分发给最终用户。加密的密钥存储在安全的远程服务器上。当最终用户对开发者的远程服务器进行正确认证时，加密的安全密钥从安全远程服务器下载，并被本地解密。使用位置位置信息将去除的代码位重新插入分级二进制图像。然后二进制图像可操作以完成软件程序的执行。

5. 发明授权

US07989968B2 Method and apparatus for measurement and control of photomask to substrate alignment 失效
标题翻译：用于测量和控制光掩模到衬底对准的方法和装置
公开(公告)号：US07989968B2
公开(公告)日：2011-08-02
申请号：US12888697
申请日：2010-09-23
申请人： Axel A. Granados , Benjamin A. Fox , Nathaniel J. Gibbs , Andrew B. Maki , Trevor J. Timpane
发明人： Axel A. Granados , Benjamin A. Fox , Nathaniel J. Gibbs , Andrew B. Maki , Trevor J. Timpane
IPC分类号： H01L23/544
CPC分类号： G03F9/7049 , G03F9/7003 , G03F9/7076 , G03F9/708 , G03F9/7084 , G03F9/7088 , G03F9/7096 , Y10S438/975
摘要： A method, structure, system of aligning a substrate to a photomask. The method comprising: directing light through a clear region of the photomask in a photolithography tool, through a lens of the tool and onto a set of at least three diffraction mirror arrays on the substrate, each diffraction mirror array of the set of at least three diffraction mirror arrays comprising a single row of mirrors, all mirrors in any particular diffraction mirror array spaced apart a same distance, mirrors in different diffraction mirror arrays spaced apart different distances; measuring an intensity of light diffracted from the set of at least three diffraction mirror arrays onto an array of photo detectors; and adjusting a temperature of the photomask or photomask and lens based on the measured intensity of light.
摘要翻译：将基板与光掩模对准的方法，结构，系统。该方法包括：将光穿过光刻工具中的光掩模的透明区域，通过工具的透镜并且在基底上的一组至少三个衍射反射镜阵列上，该组的至少三个衍射镜阵列包括单行反射镜的衍射镜阵列，在任何特定衍射镜阵列中间隔相同距离的所有反射镜，在不同距离上间隔开的不同衍射镜阵列中的反射镜; 测量从所述至少三个衍射反射镜阵列组衍射的光的强度到光电检测器阵列上; 以及基于所测量的光强度来调节光掩模或光掩模和透镜的温度。

6. 发明授权

US08451021B1 Calibrating on-chip resistors via a daisy chain scheme 失效
标题翻译：通过菊花链方案校准片上电阻
公开(公告)号：US08451021B1
公开(公告)日：2013-05-28
申请号：US13468301
申请日：2012-05-10
申请人： Benjamin A. Fox , Nathaniel J. Gibbs , Andrew B. Maki , David M. Onsongo , Trevor J. Timpane
发明人： Benjamin A. Fox , Nathaniel J. Gibbs , Andrew B. Maki , David M. Onsongo , Trevor J. Timpane
IPC分类号： H03K19/003
CPC分类号： H04L25/0278
摘要： A method for calibrating resistors on an integrated circuit chip via a daisy chain scheme. The method comprises the step of configuring one or more links of the daisy chain scheme, wherein each of the one or more links comprises one or more master resistors and one or more slave resistors. The method further comprises the steps of calibrating at least one on-chip reference resistor, the one or more master resistors, and the one or more slave resistors via the daisy chain scheme. The method using the daisy chain scheme enables resistance of at least one off-chip reference resistor to be duplicated to multiple distant locations while maintaining a low mismatch error.
摘要翻译：一种通过菊花链方案校准集成电路芯片上的电阻的方法。该方法包括配置菊链方案的一个或多个链路的步骤，其中一个或多个链路中的每个链路包括一个或多个主电阻器和一个或多个从属电阻器。该方法还包括通过菊花链方案校准至少一个片上参考电阻器，一个或多个主电阻器以及一个或多个从电阻器的步骤。使用菊花链方案的方法使得至少一个片外参考电阻器的电阻能够复制到多个远距离位置，同时保持低失配误差。

7. 发明授权

US08385554B2 Preventing execution of pirated software 失效
标题翻译：防止盗版软件的执行
公开(公告)号：US08385554B2
公开(公告)日：2013-02-26
申请号：US11850098
申请日：2007-09-05
申请人： Axel Aguado Granados , Benjamin A. Fox , Nathaniel J. Gibbs , Jamie R. Kuesel , Andrew B. Maki , Trevor J. Timpane
发明人： Axel Aguado Granados , Benjamin A. Fox , Nathaniel J. Gibbs , Jamie R. Kuesel , Andrew B. Maki , Trevor J. Timpane
IPC分类号： H04L29/06
CPC分类号： G06F21/125 , H04L9/0822 , H04L9/083
摘要： A method, system and computer program product for preventing execution of pirated software. A file is loaded on an end user's computer containing a binary image that is generated by removing one or more code bits from an executable code. A request is sent to a remote server to return a software key required for execution of the executable code from the binary image. The software key is downloaded to the end user's computer on which the binary image is loaded. One or more bits from the software key is inserted into the appropriate location of the binary image to regenerate the executable code. The executable code is enabled for execution on the end user's computer only following the embedding of the one or more bits.
摘要翻译：一种用于防止盗版软件执行的方法，系统和计算机程序产品。文件被加载到最终用户的计算机上，该计算机包含通过从可执行代码中删除一个或多个代码位而生成的二进制映像。向远程服务器发送请求，以从二进制映像返回执行可执行代码所需的软件密钥。软件密钥被下载到加载了二进制图像的最终用户的计算机上。来自软件密钥的一个或多个位被插入二进制图像的适当位置以重新生成可执行代码。只有在嵌入一个或多个位之后，才能在最终用户的计算机上执行可执行代码。

8. 发明授权

US08354678B1 Structure and method for forming a light detecting diode and a light emitting diode on a silicon-on-insulator wafer backside 有权
标题翻译：在绝缘体上硅晶片背面形成光检测二极管和发光二极管的结构和方法
公开(公告)号：US08354678B1
公开(公告)日：2013-01-15
申请号：US13179948
申请日：2011-07-11
申请人： Benjamin A. Fox , Nathaniel J. Gibbs , Andrew B. Maki , David M. Onsongo , Trevor J. Timpane
发明人： Benjamin A. Fox , Nathaniel J. Gibbs , Andrew B. Maki , David M. Onsongo , Trevor J. Timpane
IPC分类号： H01L29/15
CPC分类号： H01L27/15 , H01L27/0694 , H01L27/1203 , H01L27/1461 , H01L27/1463 , H01L27/1464 , H01L31/125 , H01L33/382
摘要： A structure and method for fabricating a light emitting diode and a light detecting diode on a silicon-on-insulator (SOI) wafer is provided. Specifically, the structure and method involves forming a light emitting diode and light detecting diode on the SOI wafer's backside and utilizing a deep trench formed in the wafer as an alignment marker. The alignment marker can be detected by x-ray diffraction, reflectivity, or diffraction grating techniques. Moreover, the alignment marker can be utilized to pattern openings and perform ion implantation to create p-n junctions for the light emitting diode and light detecting diode. By utilizing the SOI wafer's backside, the structure and method increases the number of light emitting diodes and light detecting diodes that can be formed on a SOI wafer, enables an increase in overall device density for an integrated circuit, and reduces attenuation of light signals being emitted and detected by the diodes.
摘要翻译：提供了在绝缘体上硅（SOI）晶片上制造发光二极管和光检测二极管的结构和方法。具体地，该结构和方法包括在SOI晶片的背面上形成发光二极管和光检测二极管，并且利用在晶片中形成的深沟槽作为对准标记。可以通过x射线衍射，反射率或衍射光栅技术来检测对准标记。此外，对准标记可用于图案化开口并执行离子注入以产生用于发光二极管和光检测二极管的p-n结。通过利用SOI晶片的背面，结构和方法增加了可以在SOI晶片上形成的发光二极管和光检测二极管的数量，能够增加集成电路的整体器件密度，并且减少光信号的衰减由二极管发射和检测。

9. 发明授权

US08138089B2 Method and apparatus for measurement and control of photomask to substrate alignment 失效
标题翻译：用于测量和控制光掩模到衬底对准的方法和装置
公开(公告)号：US08138089B2
公开(公告)日：2012-03-20
申请号：US13176844
申请日：2011-07-06
申请人： Axel A. Granados , Benjamin A. Fox , Nathaniel J. Gibbs , Andrew B. Maki , Trevor J. Timpane
发明人： Axel A. Granados , Benjamin A. Fox , Nathaniel J. Gibbs , Andrew B. Maki , Trevor J. Timpane
IPC分类号： H01L21/00
CPC分类号： G03F9/7049 , G03F9/7003 , G03F9/7076 , G03F9/708 , G03F9/7084 , G03F9/7088 , G03F9/7096 , Y10S438/975
摘要： A method, structure, system of aligning a substrate to a photomask. The method comprising: directing light through a clear region of the photomask in a photolithography tool, through a lens of the tool and onto a set of at least three diffraction minor arrays on the substrate, each diffraction minor array of the set of at least three diffraction minor arrays comprising a single row of minors, all mirrors in any particular diffraction minor array spaced apart a same distance, minors in different diffraction minor arrays spaced apart different distances; measuring an intensity of light diffracted from the set of at least three diffraction mirror arrays onto an array of photo detectors; and adjusting a temperature of the photomask or photomask and lens based on the measured intensity of light.
摘要翻译：将基板与光掩模对准的方法，结构，系统。该方法包括：通过光刻工具将光通过光掩模的透明区域，通过工具的透镜并且在衬底上的一组至少三个衍射次要阵列上，该组的至少三个衍射次要阵列衍射次要阵列包括单排未成年人，所有反射镜在任何特定的衍射次要阵列间隔开相同的距离，不同衍射次要阵列中的未成形体间隔开不同的距离; 测量从所述至少三个衍射反射镜阵列组衍射的光的强度到光电检测器阵列上; 以及基于所测量的光强度来调节光掩模或光掩模和透镜的温度。

10. 发明申请

US20130015502A1 STRUCTURE AND METHOD FOR FORMING A LIGHT DETECTING DIODE AND A LIGHT EMITTING DIODE ON A SILICON-ON-INSULATOR WAFER BACKSIDE 有权
标题翻译：形成二极管的光检测器和在绝缘体上形成的发光二极管的结构和方法
公开(公告)号：US20130015502A1
公开(公告)日：2013-01-17
申请号：US13179948
申请日：2011-07-11
申请人： Benjamin A. Fox , Nathaniel J. Gibbs , Andrew B. Maki , David M. Onsongo , Trevor J. Timpane
发明人： Benjamin A. Fox , Nathaniel J. Gibbs , Andrew B. Maki , David M. Onsongo , Trevor J. Timpane
IPC分类号： H01L29/165 , H01L21/762
CPC分类号： H01L27/15 , H01L27/0694 , H01L27/1203 , H01L27/1461 , H01L27/1463 , H01L27/1464 , H01L31/125 , H01L33/382
摘要： A structure and method for fabricating a light emitting diode and a light detecting diode on a silicon-on-insulator (SOI) wafer is provided. Specifically, the structure and method involves forming a light emitting diode and light detecting diode on the SOI wafer's backside and utilizing a deep trench formed in the wafer as an alignment marker. The alignment marker can be detected by x-ray diffraction, reflectivity, or diffraction grating techniques. Moreover, the alignment marker can be utilized to pattern openings and perform ion implantation to create p-n junctions for the light emitting diode and light detecting diode. By utilizing the SOI wafer's backside, the structure and method increases the number of light emitting diodes and light detecting diodes that can be formed on a SOI wafer, enables an increase in overall device density for an integrated circuit, and reduces attenuation of light signals being emitted and detected by the diodes.
摘要翻译：提供了在绝缘体上硅（SOI）晶片上制造发光二极管和光检测二极管的结构和方法。具体地，该结构和方法包括在SOI晶片的背面上形成发光二极管和光检测二极管，并且利用在晶片中形成的深沟槽作为对准标记。可以通过x射线衍射，反射率或衍射光栅技术来检测对准标记。此外，对准标记可用于图案化开口并执行离子注入以产生用于发光二极管和光检测二极管的p-n结。通过利用SOI晶片的背面，结构和方法增加了可以在SOI晶片上形成的发光二极管和光检测二极管的数量，能够增加集成电路的整体器件密度，并且减少光信号的衰减由二极管发射和检测。

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