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1. 发明申请

US20090043965A1 EARLY DATA RETURN INDICATION MECHANISM 审中-公开
标题翻译：早期数据返回指示机制
公开(公告)号：US20090043965A1
公开(公告)日：2009-02-12
申请号：US12249623
申请日：2008-10-10
申请人： BELLIAPPA KUTTANNA , Robert G. Milstrey , Stanley J. Domen , Glenn Hinton
发明人： BELLIAPPA KUTTANNA , Robert G. Milstrey , Stanley J. Domen , Glenn Hinton
IPC分类号： G06F12/08
CPC分类号： G06F9/383 , G06F12/0859
摘要： One embodiment of a method is disclosed. The method generates requests waiting for data to be loaded into a data cache including a first level cache (FLC). The method further receives the requests from instruction sources, schedules the requests, and then passes the requests on to an execution unit having the data cache. Further, the method checks contents of the data cache, replays to the requests if the data is not located in the data cache, and stores the requests that are replay safe. The method further detects the readiness of the data of bus clocks prior to the data being ready to be transmitted to a processor, and transmits an early data ready indication to the processor to drain the requests from a resource scheduler.
摘要翻译：公开了一种方法的一个实施例。该方法产生等待数据加载到包括第一级高速缓存（FLC）的数据高速缓存中的请求。该方法还从指令源接收请求，调度请求，然后将请求传递给具有数据高速缓存的执行单元。此外，该方法检查数据高速缓存的内容，如果数据不位于数据高速缓存中，则重播请求，并存储重放安全的请求。该方法还在数据准备好发送到处理器之前进一步检测总线时钟数据的准备状态，并将早期的数据就绪指示发送给处理器以从资源调度器中排出请求。

2. 发明授权

US07451295B2 Early data return indication mechanism for data cache to detect readiness of data via an early data ready indication by scheduling, rescheduling, and replaying of requests in request queues 有权
标题翻译：数据缓存的早期数据返回指示机制，通过调度，重新安排和重播请求队列中的请求，通过早期数据就绪指示来检测数据的准备
公开(公告)号：US07451295B2
公开(公告)日：2008-11-11
申请号：US11541289
申请日：2006-09-28
申请人： Belliappa Kuttanna , Robert G. Milstrey , Stanley J. Domen , Glenn Hinton
发明人： Belliappa Kuttanna , Robert G. Milstrey , Stanley J. Domen , Glenn Hinton
IPC分类号： G06F9/30 , G06F12/00
CPC分类号： G06F9/383 , G06F12/0859
摘要： One embodiment of a method is disclosed. The method generates requests waiting for data to be loaded into a data cache including a first level cache (FLC). The method further receives the requests from instruction sources, schedules the requests, and then passes the requests on to an execution unit having the data cache. Further, the method checks contents of the data cache, replays to the requests if the data is not located in the data cache, and stores the requests that are replay safe. The method further detects the readiness of the data of bus clocks prior to the data being ready to be transmitted to a processor, and transmits an early data ready indication to the processor to drain the requests from a resource scheduler.
摘要翻译：公开了一种方法的一个实施例。该方法产生等待数据加载到包括第一级高速缓存（FLC）的数据高速缓存中的请求。该方法还从指令源接收请求，调度请求，然后将请求传递给具有数据高速缓存的执行单元。此外，该方法检查数据高速缓存的内容，如果数据不位于数据高速缓存中，则重播请求，并存储重放安全的请求。该方法还在数据准备好发送到处理器之前进一步检测总线时钟数据的准备状态，并将早期的数据就绪指示发送给处理器以从资源调度器中排出请求。

3. 发明授权

US07111153B2 Early data return indication mechanism 失效
标题翻译：早期数据返回指示机制
公开(公告)号：US07111153B2
公开(公告)日：2006-09-19
申请号：US10676446
申请日：2003-09-30
申请人： Belliappa Kuttanna , Robert G. Milstrey , Stanley J. Domen , Glenn Hinton
发明人： Belliappa Kuttanna , Robert G. Milstrey , Stanley J. Domen , Glenn Hinton
IPC分类号： G06F9/30 , G06F12/00
CPC分类号： G06F9/383 , G06F12/0859
摘要： A method, apparatus, and system are provided for early data return indication mechanism. According to one embodiment, data cache is accessed for data in response to a request for the data, the request received from an instruction source, and the request waits for the data to be retrieved from memory if the data is not located in the data cache, and an early data ready indication is received at a resource scheduler, the early data ready indication being received prior to receiving a data ready indication referring to the data being ready to be retrieved from the memory.
摘要翻译：提供了早期数据返回指示机制的方法，装置和系统。根据一个实施例，响应于对数据的请求，从指令源接收到的请求，数据高速缓存被访问，并且如果数据不位于数据高速缓存中，则请求等待从存储器检索数据并且在资源调度器处接收到早期数据就绪指示，在接收到准备好从存储器检索的数据的数据就绪指示之前接收到早期数据就绪指示。

4. 发明授权

US5860106A Method and apparatus for dynamically adjusting power/performance characteristics of a memory subsystem 失效
标题翻译：用于动态调整存储器子系统的功率/性能特性的方法和装置
公开(公告)号：US5860106A
公开(公告)日：1999-01-12
申请号：US502094
申请日：1995-07-13
申请人： Stanley J. Domen , Dileep R. Idate , Stephen H. Gunther , George Thangadurai
发明人： Stanley J. Domen , Dileep R. Idate , Stephen H. Gunther , George Thangadurai
IPC分类号： G06F12/02 , G06F12/08 , G11C11/413 , G06F9/38 , G06F1/32
CPC分类号： G11C11/413 , G06F12/0215 , G06F12/0802 , G06F2212/1028 , Y02B60/1225
摘要： An apparatus and method for dynamically adjusting the power/performance characteristics of a memory subsystem. Since the memory subsystem access requirements are heavily dependent on the application being executed, static methods of enabling or disabling the individual memory system components (as are used in prior art) are less than optimal from a power consumption perspective. By dynamically tracking the behavior of the memory subsystem, the invention predicts the probability that the next event will have certain characteristics, such as whether it will result in a memory cycle that requires the attention of a cache memory, whether that memory cycle will result in a cache memory hit, and whether a DRAM page hit in main memory will occur if the requested data is not in one of the levels of cache memory. Based on these probabilities, the invention dynamically enables or disables components of the subsystem. By intelligently adjusting the state of these components, significant power savings are achieved without degradation in performance.
摘要翻译：一种用于动态调整存储器子系统的功率/性能特性的装置和方法。由于存储器子系统访问要求在很大程度上取决于正在执行的应用程序，所以启用或禁用各个存储器系统组件（如现有技术中所使用的）的静态方法从功耗角度来看不是最佳的。通过动态跟踪存储器子系统的行为，本发明预测下一个事件将具有某些特征的概率，例如它是否会导致需要高速缓冲存储器注意的存储器周期，该存储器周期是否会导致高速缓冲存储器命中，以及如果请求的数据不在高速缓冲存储器的一个级别中，是否将在主存储器中命中DRAM页面。基于这些概率，本发明动态地启用或禁用子系统的组件。通过智能地调整这些组件的状态，可以实现显着的功率节省，而不会降低性能。

5. 发明授权

US5781783A Method and apparatus for dynamically adjusting the power consumption of a circuit block within an integrated circuit 失效
标题翻译：用于动态调整集成电路内的电路块的功耗的方法和装置
公开(公告)号：US5781783A
公开(公告)日：1998-07-14
申请号：US672544
申请日：1996-06-28
申请人： Stephen H. Gunther , Stanley J. Domen , Dileep R. Idate
发明人： Stephen H. Gunther , Stanley J. Domen , Dileep R. Idate
IPC分类号： G06F1/32 , G06F9/30 , G06F9/38
CPC分类号： G06F9/3836 , G06F1/3228 , G06F1/3287 , G06F9/30145 , G06F9/3869 , G06F9/3885 , Y02B60/1282 , Y02B60/32
摘要： A method of dynamically adjusting the power consumption of a circuit block within an integrated circuit includes the step of incrementing a count total maintained by a counter on the occurrence of a first type of trigger event. The occurrence of a predetermined event is detected when the count total maintained by the counter equals, or transcends, a predetermined threshold value. The predetermined event provides a speculative indication of a future state of activity of the circuit block by reason of a predicted proximity of the predetermined event to the future state of activity of the circuit block. The power consumption of the circuit block is adjusted in response to the occurrence of the predetermined event.
摘要翻译：动态地调整集成电路内的电路块的功耗的方法包括在发生第一类型的触发事件时递增由计数器维持的计数总计的步骤。当由计数器维持的计数总计等于或超过预定阈值时，检测到预定事件的发生。由于预定事件与电路块的活动的未来状态的预测接近度，预定事件提供电路块的未来活动状态的推测指示。响应于预定事件的发生，调整电路块的功耗。

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