专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20090006690A1 PROVIDING UNIVERSAL SERIAL BUS DEVICE VIRTUALIZATION WITH A SCHEDULE MERGE FROM MULTIPLE VIRTUAL MACHINES 审中-公开
标题翻译：提供通用的串行总线设备虚拟化与多个虚拟机的时间表合并
公开(公告)号：US20090006690A1
公开(公告)日：2009-01-01
申请号：US11769576
申请日：2007-06-27
申请人： Balaji Vembu , Nitin Sarangdhar , Rajeev Nalawadi
发明人： Balaji Vembu , Nitin Sarangdhar , Rajeev Nalawadi
IPC分类号： G06F13/362
CPC分类号： G06F13/10
摘要： An apparatus, system, and method are disclosed. In one embodiment, the apparatus includes a virtualization engine on a computer platform. The virtualization engine can intercept multiple data transfer schedules from multiple virtual machines fetched from a memory by a physical Universal Serial Bus (USB) host controller on the computer platform. The virtualization engine also can merge the multiple fetched data transfer schedules into a merged data transfer schedule. The virtualization engine also can send the merged data transfer schedule to the physical USB host controller.
摘要翻译：公开了一种装置，系统和方法。在一个实施例中，该设备包括在计算机平台上的虚拟化引擎。虚拟化引擎可以通过计算机平台上的物理通用串行总线（USB）主机控制器从多个虚拟机中捕获多个数据传输计划。虚拟化引擎还可以将多个获取的数据传输计划合并到合并的数据传输计划中。虚拟化引擎还可以将合并的数据传输计划发送到物理USB主机控制器。

2. 发明申请

US20090245521A1 METHOD AND APPARATUS FOR PROVIDING A SECURE DISPLAY WINDOW INSIDE THE PRIMARY DISPLAY 有权
标题翻译：用于在主显示器内提供安全显示窗的方法和装置
公开(公告)号：US20090245521A1
公开(公告)日：2009-10-01
申请号：US12059972
申请日：2008-03-31
申请人： Balaji Vembu , Nitin Sarangdhar , Vedvyas Shanbhogue
发明人： Balaji Vembu , Nitin Sarangdhar , Vedvyas Shanbhogue
IPC分类号： H04L9/00
CPC分类号： G06F21/606 , G06F21/10 , G06F21/84 , G06F2221/0735
摘要： In some embodiments, the invention involves securing sensitive data from mal-ware on a computing platform and, more specifically, to utilizing virtualization technology and protected audio video path technologies to prohibit a user environment from directly accessing unencrypted sensitive data. In an embodiment a service operating system (SOS) accesses sensitive data requested by an application running in a user environment virtual machine, or a capability operating system (COS). The SOS application encrypts the sensitive data before passing the data to the COS. The COS makes requests directly to a graphics engine which decrypts the data before displaying the sensitive data on a display monitor. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，本发明涉及在计算平台上确保来自恶意软件的敏感数据，更具体地说，涉及利用虚拟化技术和受保护的音频视频路径技术来禁止用户环境直接访问未加密的敏感数据。在一个实施例中，服务操作系统（SOS）访问在用户环境虚拟机或能力操作系统（COS）中运行的应用所请求的敏感数据。 SOS应用程序在将数据传送到COS之前对敏感数据进行加密，COS会直接向图形引擎发出解密数据，然后在显示器上显示敏感数据。描述和要求保护其他实施例。

3. 发明申请

US20070240018A1 Functional level reset on a per device/function basis 审中-公开
标题翻译：基于每个设备/功能的功能级别复位
公开(公告)号：US20070240018A1
公开(公告)日：2007-10-11
申请号：US11323297
申请日：2005-12-29
申请人： Rajeev Nalawadi , Balaji Vembu
发明人： Rajeev Nalawadi , Balaji Vembu
IPC分类号： G06F11/00
CPC分类号： G06F11/1438 , G06F11/1441
摘要： A device within a system, or an individual function of the device, may be reset to a known state while all other devices in the system or other functions of the device that are not being reset remain operational.
摘要翻译：系统内的设备或设备的单独功能可以被重置为已知状态，而系统中的所有其他设备或未被重置的设备的其他功能保持工作。

4. 发明授权

US08646052B2 Method and apparatus for providing a secure display window inside the primary display 有权
标题翻译：用于在主显示器内提供安全显示窗口的方法和装置
公开(公告)号：US08646052B2
公开(公告)日：2014-02-04
申请号：US12059972
申请日：2008-03-31
申请人： Balaji Vembu , Nitin Sarangdhar , Vedvyas Shanbhogue
发明人： Balaji Vembu , Nitin Sarangdhar , Vedvyas Shanbhogue
IPC分类号： H04L29/06
CPC分类号： G06F21/606 , G06F21/10 , G06F21/84 , G06F2221/0735
摘要： In some embodiments, the invention involves securing sensitive data from mal-ware on a computing platform and, more specifically, to utilizing virtualization technology and protected audio video path technologies to prohibit a user environment from directly accessing unencrypted sensitive data. In an embodiment a service operating system (SOS) accesses sensitive data requested by an application running in a user environment virtual machine, or a capability operating system (COS). The SOS application encrypts the sensitive data before passing the data to the COS. The COS makes requests directly to a graphics engine which decrypts the data before displaying the sensitive data on a display monitor. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，本发明涉及在计算平台上确保来自恶意软件的敏感数据，更具体地说，涉及利用虚拟化技术和受保护的音频视频路径技术来禁止用户环境直接访问未加密的敏感数据。在一个实施例中，服务操作系统（SOS）访问在用户环境虚拟机或能力操作系统（COS）中运行的应用所请求的敏感数据。 SOS应用程序在将数据传送到COS之前对敏感数据进行加密，COS会直接向图形引擎发出解密数据，然后在显示器上显示敏感数据。描述和要求保护其他实施例。

5. 发明申请

US20090006702A1 SHARING UNIVERSAL SERIAL BUS ISOCHRONOUS BANDWIDTH BETWEEN MULTIPLE VIRTUAL MACHINES 审中-公开
标题翻译：在多台虚拟机之间共享通用串行总线
公开(公告)号：US20090006702A1
公开(公告)日：2009-01-01
申请号：US11768696
申请日：2007-06-26
申请人： Nitin Sarangdhar , Balaji Vembu
发明人： Nitin Sarangdhar , Balaji Vembu
IPC分类号： G06F13/14
CPC分类号： G06F13/14
摘要： A method and computer readable medium are disclosed. In one embodiment, the method includes enumerating multiple Universal Serial Bus (USB) devices on a computer platform running a multiple virtual machines (VMs). The method also includes assigning each of the USB devices to a VM, wherein each USB device may be assigned to a different VM. The method also includes making each USB device visible only to the VM it is assigned to. The method also includes limiting the bandwidth each of the VMs can schedule its assigned devices within a USB data transfer frame. This will allow all of the VMs to have access to the bandwidth of the frame by avoiding the problem of over-subscription when the schedule is merged.
摘要翻译：公开了一种方法和计算机可读介质。在一个实施例中，该方法包括在运行多个虚拟机（VM）的计算机平台上列举多个通用串行总线（USB）设备。该方法还包括将每个USB设备分配给VM，其中每个USB设备可被分配给不同的VM。该方法还包括使每个USB设备仅对其被分配给的VM可见。该方法还包括限制每个VM的带宽可以在USB数据传输帧内调度其分配的设备。这将允许所有VM通过避免在合并计划时超额订购的问题来访问帧的带宽。

7. 发明申请

US20160189681A1 Ordering Mechanism for Offload Graphics Scheduling 有权
标题翻译：卸载图形调度的排序机制
公开(公告)号：US20160189681A1
公开(公告)日：2016-06-30
申请号：US14582972
申请日：2014-12-24
申请人： Bryan R. White , Balaji Vembu , Murali Ramadoss , Altug Koker , Aditya Navale
发明人： Bryan R. White , Balaji Vembu , Murali Ramadoss , Altug Koker , Aditya Navale
IPC分类号： G09G5/18 , G06T1/60 , G06T1/20
CPC分类号： G09G5/18 , G06T1/20 , G09G5/026 , G09G5/14 , G09G5/363 , G09G2320/106 , G09G2340/02 , G09G2360/121 , G09G2360/18 , G09G2370/16
摘要： Described herein are technologies related to a ensuring that graphics commands and graphics context are offloading and scheduled for consumption as the commands and graphics context are sent from coherent to non-coherent memory/fabric in a “processor to processor” handoff or transaction.
摘要翻译：这里描述的是与在“处理器到处理器”切换或事务中的命令和图形上下文从相干到非相干存储器/结构发送相关的确保图形命令和图形上下文被卸载并被调度用于消费的技术。

8. 发明申请

US20140198116A1 A METHOD AND DEVICE TO AUGMENT VOLATILE MEMORY IN A GRAPHICS SUBSYSTEM WITH NON-VOLATILE MEMORY 有权
标题翻译：具有非易失性存储器的图形子系统中的波动记忆体的方法和装置
公开(公告)号：US20140198116A1
公开(公告)日：2014-07-17
申请号：US13977261
申请日：2011-12-28
申请人： Bryan E. Veal , Travis T. Schluessler , Murali Ramadoss , Balaji Vembu
发明人： Bryan E. Veal , Travis T. Schluessler , Murali Ramadoss , Balaji Vembu
IPC分类号： G06T1/60
CPC分类号： G06T1/60 , G11C16/349
摘要： Methods and devices to augment volatile memory in a graphics subsystem with certain types of non-volatile memory are described. In one embodiment, includes storing one or more static or near-static graphics resources in a non-volatile random access memory (NVRAM). The NVRAM is directly accessible by a graphics processor using at least memory store and load commands. The method also includes a graphics processor executing a graphics application. The graphics processor sends a request using a memory load command for an address corresponding to at least one static or near-static graphics resources stored in the NVRAM. The method also includes directly loading the requested graphics resource from the NVRAM into a cache for the graphics processor in response to the memory load command.
摘要翻译：描述了在具有某些类型的非易失性存储器的图形子系统中增加易失性存储器的方法和装置。在一个实施例中，包括将一个或多个静态或近静态图形资源存储在非易失性随机存取存储器（NVRAM）中。 NVRAM可直接由图形处理器使用，至少使用内存存储和加载命令。该方法还包括执行图形应用的图形处理器。图形处理器使用存储器加载命令来发送对应于存储在NVRAM中的至少一个静态或近静态图形资源的地址的请求。该方法还包括响应于存储器加载命令将所请求的图形资源从NVRAM直接加载到图形处理器的高速缓存中。

9. 发明申请

US20110320777A1 DIRECT MEMORY ACCESS ENGINE PHYSICAL MEMORY DESCRIPTORS FOR MULTI-MEDIA DEMULTIPLEXING OPERATIONS 有权
标题翻译：直接存储器访问引擎用于多媒体解复用操作的物理存储器描述符
公开(公告)号：US20110320777A1
公开(公告)日：2011-12-29
申请号：US12824300
申请日：2010-06-28
申请人： DANIEL NEMIROFF , Balaji Vembu , Raul Gutierrez , Suryaprasad Kareenahalli
发明人： DANIEL NEMIROFF , Balaji Vembu , Raul Gutierrez , Suryaprasad Kareenahalli
IPC分类号： G06F9/38
CPC分类号： G06F9/5027
摘要： The architecture and techniques described herein can improve system performance with respect to the following. Communication between two interdependent hardware engines, that are part of pipeline, such that the engines are synchronized to consume resources when the engines are done with the work. Reduction of the role of software/firmware from feeding each stage of the hardware pipeline when the previous stage of the pipeline has completed. Reduction in the memory allocation for software-initialized hardware descriptors to improve performance by reducing pipeline stalls due to software interaction.
摘要翻译：本文描述的架构和技术可以改善系统性能。两个相互依赖的硬件引擎之间的通信是管道的一部分，使得引擎在引擎完成工作时同步以消耗资源。当管道的上一个阶段完成时，减少软件/固件从硬件管道的每个阶段的角色。减少用于软件初始化的硬件描述符的内存分配，以通过减少由于软件交互而导致的流水线停顿来提高性能。

10. 发明授权

US07340582B2 Fault processing for direct memory access address translation 有权
标题翻译：直接存储器访问地址转换的故障处理
公开(公告)号：US07340582B2
公开(公告)日：2008-03-04
申请号：US10956630
申请日：2004-09-30
申请人： Rajesh Madukkarumukumana , Ioannis Schoinas , Ku-jei King , Balaji Vembu , Gilbert Neiger , Richard Uhlig
发明人： Rajesh Madukkarumukumana , Ioannis Schoinas , Ku-jei King , Balaji Vembu , Gilbert Neiger , Richard Uhlig
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F11/0712 , G06F11/073 , G06F11/0745 , G06F11/0793 , G06F12/1081
摘要： An embodiment of the present invention is a technique to process faults in a direct memory access address translation. A register set stores global control or status information for fault processing of a fault generated by an input/output (I/O) transaction requested by an I/O device. An address translation structure translates a guest physical address to a host physical address. The guest physical address corresponds to the I/O transaction and is mapped to a domain. The address translation structure has at least an entry associated with the domain and domain-specific control information for the fault processing.
摘要翻译：本发明的一个实施例是一种在直接存储器访问地址转换中处理故障的技术。寄存器组存储由I / O设备请求的输入/输出（I / O）事务产生的故障的故障处理的全局控制或状态信息。地址转换结构将访客物理地址转换为主机物理地址。访客物理地址对应于I / O事务，并映射到域。地址转换结构至少具有与域相关联的条目和用于故障处理的特定于域的控制信息。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式