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1. 发明申请

US20100162061A1 TAP AND LINKING MODULE FOR SCAN ACCESS OF MULTIPLE CORES WITH IEEE 1149.1 TEST ACCESS PORTS 有权
标题翻译：用于IEEE 1149.1测试访问端口的多个光纤扫描接入的TAP和链接模块
公开(公告)号：US20100162061A1
公开(公告)日：2010-06-24
申请号：US12539373
申请日：2009-08-11
申请人： Baher S. Haroun , Lee D. Whetsel
发明人： Baher S. Haroun , Lee D. Whetsel
IPC分类号： G01R31/3177 , G06F11/25
CPC分类号： G01R31/3177 , G01R31/2851 , G01R31/318536 , G01R31/318544 , G01R31/318555 , G01R31/318558 , G11C29/46
摘要： An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and 1149.1 Test Access Ports (TAP) of the plurality of circuits to be tested. The TAP Linking Module operates in response to 1149.1 scan operations from a tester connected to the test pins to selectively switch between 1149.1 TAPs to enable test access between the tester and plurality of circuits. The TAP Linking Module's 1149.1 TAP switching operation is based upon augmenting 1149.1 instruction patterns to affix an additional bit or bits of information which is used by the TAP Linking Module for performing the TAP switching operation.
摘要翻译：描述了用于在集成电路上测试多个电路的架构。该架构包括位于集成电路的测试引脚之间的TAP链接模块和待测试的多个电路的1149.1测试访问端口（TAP）。 TAP链接模块响应来自连接到测试引脚的测试仪的1149.1扫描操作，以选择性地在1149.1 TAP之间切换，以使测试仪和多个电路之间能够进行测试。 TAP链接模块的1149.1 TAP切换操作基于增加1149.1指令模式，以附加TAP链接模块用于执行TAP切换操作的附加位或位信息。

2. 发明授权

US06324662B1 TAP and linking module for scan access of multiple cores with IEEE 1149.1 test access ports 有权
标题翻译： TAP和连接模块，用于具有IEEE 1149.1测试访问端口的多个核心的扫描访问
公开(公告)号：US06324662B1
公开(公告)日：2001-11-27
申请号：US09277504
申请日：1999-03-26
申请人： Baher S. Haroun , Lee D. Whetsel
发明人： Baher S. Haroun , Lee D. Whetsel
IPC分类号： G01R3128
CPC分类号： G01R31/318536 , G01R31/318555 , G01R31/318563
摘要： An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and 1149.1 Test Access Ports (TAP) of the plurality of circuits to be tested. The TAP Linking Module operates in response to 1149.1 scan operations from a tester connected to the test pins to selectively switch between 1149.1 TAPs to enable test access between the tester and plurality of circuits. The TAP Linking Module's 1149.1 TAP switching operation is based upon augmenting 1149.1 instruction patterns to affix an additional bit or bits of information which is used by the TAP Linking Module for performing the TAP switching operation.
摘要翻译：描述了用于在集成电路上测试多个电路的架构。该架构包括位于集成电路的测试引脚之间的TAP链接模块和待测试的多个电路的1149.1测试访问端口（TAP）。 TAP链接模块响应来自连接到测试引脚的测试仪的1149.1扫描操作，以选择性地在1149.1 TAP之间切换，以使测试仪和多个电路之间能够进行测试。 TAP链接模块的1149.1 TAP切换操作基于增加1149.1指令模式，以附加TAP链接模块用于执行TAP切换操作的附加位或位信息。

3. 发明授权

US08386865B2 Taps with link update, data, instruction, and augmentation registers 有权
标题翻译：带有链接更新，数据，指令和增强寄存器的抽头
公开(公告)号：US08386865B2
公开(公告)日：2013-02-26
申请号：US13559251
申请日：2012-07-26
申请人： Baher S. Haroun , Lee D. Whetsel
发明人： Baher S. Haroun , Lee D. Whetsel
IPC分类号： G01R31/28
CPC分类号： G01R31/3177 , G01R31/2851 , G01R31/318536 , G01R31/318544 , G01R31/318555 , G01R31/318558 , G11C29/46
摘要： An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and 1149.1 Test Access Ports (TAP) of the plurality of circuits to be tested. The TAP Linking Module operates in response to 1149.1 scan operations from a tester connected to the test pins to selectively switch between 1149.1 TAPs to enable test access between the tester and plurality of circuits. The TAP Linking Module's 1149.1 TAP switching operation is based upon augmenting 1149.1 instruction patterns to affix an additional bit or bits of information which is used by the TAP Linking Module for performing the TAP switching operation.
摘要翻译：描述了用于在集成电路上测试多个电路的架构。该架构包括位于集成电路的测试引脚之间的TAP链接模块和待测试的多个电路的1149.1测试访问端口（TAP）。 TAP链接模块响应来自连接到测试引脚的测试仪的1149.1扫描操作，以选择性地在1149.1 TAP之间切换，以使测试仪和多个电路之间能够进行测试。 TAP链接模块的1149.1 TAP切换操作基于增加1149.1指令模式，以附加TAP链接模块用于执行TAP切换操作的附加位或位信息。

4. 发明申请

US20120304029A1 TAP AND LINKING MODULE FOR SCAN ACCESS OF MULTIPLE CORES WITH IEEE 1149.1 TEST ACCESS PORTS 有权
标题翻译：用于IEEE 1149.1测试访问端口的多个光纤扫描接入的TAP和链接模块
公开(公告)号：US20120304029A1
公开(公告)日：2012-11-29
申请号：US13559251
申请日：2012-07-26
申请人： Baher S. Haroun , Lee D. Whetsel
发明人： Baher S. Haroun , Lee D. Whetsel
IPC分类号： G01R31/3177 , G06F11/25
CPC分类号： G01R31/3177 , G01R31/2851 , G01R31/318536 , G01R31/318544 , G01R31/318555 , G01R31/318558 , G11C29/46
摘要： An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and 1149.1 Test Access Ports (TAP) of the plurality of circuits to be tested. The TAP Linking Module operates in response to 1149.1 scan operations from a tester connected to the test pins to selectively switch between 1149.1 TAPs to enable test access between the tester and plurality of circuits. The TAP Linking Module's 1149.1 TAP switching operation is based upon augmenting 1149.1 instruction patterns to affix an additional bit or bits of information which is used by the TAP Linking Module for performing the TAP switching operation.
摘要翻译：描述了用于在集成电路上测试多个电路的架构。该架构包括位于集成电路的测试引脚之间的TAP链接模块和待测试的多个电路的1149.1测试访问端口（TAP）。 TAP链接模块响应来自连接到测试引脚的测试仪的1149.1扫描操作，以选择性地在1149.1 TAP之间切换，以使测试仪和多个电路之间能够进行测试。 TAP链接模块的1149.1 TAP切换操作基于增加1149.1指令模式，以附加TAP链接模块用于执行TAP切换操作的附加位或位信息。

5. 发明申请

US20110161757A1 TAP AND LINKING MODULE FOR SCAN ACCESS OF MULTIPLE CORES WITH IEEE 1149.1 TEST ACCESS PORTS 有权
标题翻译：用于IEEE 1149.1测试访问端口的多个光纤扫描接入的TAP和链接模块
公开(公告)号：US20110161757A1
公开(公告)日：2011-06-30
申请号：US13043763
申请日：2011-03-09
申请人： Baher S. Haroun , Lee D. Whetsel
发明人： Baher S. Haroun , Lee D. Whetsel
IPC分类号： G01R31/3177 , G06F11/25
CPC分类号： G01R31/3177 , G01R31/2851 , G01R31/318536 , G01R31/318544 , G01R31/318555 , G01R31/318558 , G11C29/46
摘要： An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and 1149.1 Test Access Ports (TAP) of the plurality of circuits to be tested. The TAP Linking Module operates in response to 1149.1 scan operations from a tester connected to the test pins to selectively switch between 1149.1 TAPs to enable test access between the tester and plurality of circuits. The TAP Linking Module's 1149.1 TAP switching operation is based upon augmenting 1149.1 instruction patterns to affix an additional bit or bits of information which is used by the TAP Linking Module for performing the TAP switching operation.
摘要翻译：描述了用于在集成电路上测试多个电路的架构。该架构包括位于集成电路的测试引脚之间的TAP链接模块和待测试的多个电路的1149.1测试访问端口（TAP）。 TAP链接模块响应来自连接到测试引脚的测试仪的1149.1扫描操作，以选择性地在1149.1 TAP之间切换，以使测试仪和多个电路之间能够进行测试。 TAP链接模块的1149.1 TAP切换操作基于增加1149.1指令模式，以附加TAP链接模块用于执行TAP切换操作的附加位或位信息。

6. 发明授权

US07213171B2 IEEE 1149.1 tap instruction scan with augmented TLM scan mode 有权
标题翻译： IEEE 1149.1带增强TLM扫描模式的分接指令扫描
公开(公告)号：US07213171B2
公开(公告)日：2007-05-01
申请号：US10772982
申请日：2004-02-04
申请人： Baher S. Haroun , Lee D. Whetsel
发明人： Baher S. Haroun , Lee D. Whetsel
IPC分类号： G06F11/00
CPC分类号： G01R31/318536 , G01R31/318555 , G01R31/318563
摘要： An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and 1149.1 Test Access Ports (TAP) of the plurality of circuits to be tested. The TAP Linking Module operates in response to 1149.1 scan operations from a tester connected to the test pins to selectively switch between 1149.1 TAPs to enable test access between the tester and plurality of circuits. The TAP Linking Module's 1149.1 TAP switching operation is based upon augmenting 1149.1 instruction patterns to affix an additional bit or bits of information which is used by the TAP Linking Module for performing the TAP switching operation.
摘要翻译：描述了用于在集成电路上测试多个电路的架构。该架构包括位于集成电路的测试引脚之间的TAP链接模块和待测试的多个电路的1149.1测试访问端口（TAP）。 TAP链接模块响应来自连接到测试引脚的测试仪的1149.1扫描操作，以选择性地在1149.1 TAP之间切换，以使测试仪和多个电路之间能够进行测试。 TAP链接模块的1149.1 TAP切换操作基于增加1149.1指令模式，以附加TAP链接模块用于执行TAP切换操作的附加位或位信息。

7. 发明授权

US08332700B2 Multiplexer input linking circuitry to IC and core TAP domains 有权
标题翻译：多路复用器输入链路电路到IC和核心TAP域
公开(公告)号：US08332700B2
公开(公告)日：2012-12-11
申请号：US13330178
申请日：2011-12-19
申请人： Lee D. Whetsel , Baher S. Haroun , Brian J. Lasher , Anjali Kinra
发明人： Lee D. Whetsel , Baher S. Haroun , Brian J. Lasher , Anjali Kinra
IPC分类号： G01R31/28
CPC分类号： G01R31/3177 , G01R31/31727 , G01R31/318555
摘要： IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations.
摘要翻译： IEEE 1149.1测试接入端口（TAP）可用于IC和知识产权核心设计级别。 TAP用作用于访问IC和核心内的各种嵌入式电路的串行通信端口，包括： IEEE 1149.1边界扫描电路，内置测试电路，内部扫描电路，IEEE 1149.4混合信号测试电路，IEEE P5001在线仿真电路和IEEE P1532系统编程电路。可选择地访问IC内的TAP是理想的，因为在许多情况下，仅能够访问期望的TAP导致在IC内可以执行测试，仿真和编程的方式的改进。描述了一种TAP链接模块，其允许使用1149.1指令扫描操作来选择性地访问嵌入在IC内的TAP。

8. 发明授权

US07925942B2 Augmentation instruction shift register with serial and two parallel inputs 有权
标题翻译：扩展指令移位寄存器，具有串行和两个并行输入
公开(公告)号：US07925942B2
公开(公告)日：2011-04-12
申请号：US12539373
申请日：2009-08-11
申请人： Baher S. Haroun , Lee D. Whetsel
发明人： Baher S. Haroun , Lee D. Whetsel
IPC分类号： G01R31/28
CPC分类号： G01R31/3177 , G01R31/2851 , G01R31/318536 , G01R31/318544 , G01R31/318555 , G01R31/318558 , G11C29/46
摘要： An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and 1149.1 Test Access Ports (TAP) of the plurality of circuits to be tested. The TAP Linking Module operates in response to 1149.1 scan operations from a tester connected to the test pins to selectively switch between 1149.1 TAPs to enable test access between the tester and plurality of circuits. The TAP Linking Module's 1149.1 TAP switching operation is based upon augmenting 1149.1 instruction patterns to affix an additional bit or bits of information which is used by the TAP Linking Module for performing the TAP switching operation.
摘要翻译：描述了用于在集成电路上测试多个电路的架构。该架构包括位于集成电路的测试引脚之间的TAP链接模块和待测试的多个电路的1149.1测试访问端口（TAP）。 TAP链接模块响应来自连接到测试引脚的测试仪的1149.1扫描操作，以选择性地在1149.1 TAP之间切换，以使测试仪和多个电路之间能够进行测试。 TAP链接模块的1149.1 TAP切换操作基于增加1149.1指令模式，以附加TAP链接模块用于执行TAP切换操作的附加位或位信息。

9. 发明申请

US20090210188A1 1149.1 TAP LINKING MODULES 有权
标题翻译： 1149.1 TAP链接模块
公开(公告)号：US20090210188A1
公开(公告)日：2009-08-20
申请号：US12434929
申请日：2009-05-04
申请人： Lee D. Whetsel , Baher S. Haroun , Brian J. Lasher , Anjali Kinra
发明人： Lee D. Whetsel , Baher S. Haroun , Brian J. Lasher , Anjali Kinra
IPC分类号： G01R31/28 , G06F19/00
CPC分类号： G01R31/3177 , G01R31/31727 , G01R31/318555
摘要： IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations.
摘要翻译： IEEE 1149.1测试接入端口（TAP）可用于IC和知识产权核心设计级别。 TAP用作用于访问IC和核心内的各种嵌入式电路的串行通信端口，包括： IEEE 1149.1边界扫描电路，内置测试电路，内部扫描电路，IEEE 1149.4混合信号测试电路，IEEE P5001在线仿真电路和IEEE P1532系统编程电路。可选择地访问IC内的TAP是理想的，因为在许多情况下，仅能够访问期望的TAP导致在IC内可以执行测试，仿真和编程的方式的改进。描述了一种TAP链接模块，其允许使用1149.1指令扫描操作来选择性地访问嵌入在IC内的TAP。

10. 发明申请

US20120096325A1 In or relating to 1149.1tap linking modules 有权
标题翻译：在1149.1tap链接模块中或与其相关
公开(公告)号：US20120096325A1
公开(公告)日：2012-04-19
申请号：US13330178
申请日：2011-12-19
申请人： Lee D. Whetsel , Baher S. Haroun , Brian J. Lasher , Anjali Kinra
发明人： Lee D. Whetsel , Baher S. Haroun , Brian J. Lasher , Anjali Kinra
IPC分类号： G01R31/3177 , G06F11/25
CPC分类号： G01R31/3177 , G01R31/31727 , G01R31/318555
摘要： Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations.
摘要翻译：测试访问端口（TAP）可以在IC和知识产权核心设计级别使用。 TAP用作用于访问IC和核心内的各种嵌入式电路的串行通信端口，包括： IEEE 1149.1边界扫描电路，内置测试电路，内部扫描电路，IEEE 1149.4混合信号测试电路，IEEE P5001在线仿真电路和IEEE P1532系统编程电路。可选择地访问IC内的TAP是理想的，因为在许多情况下，仅能够访问期望的TAP导致在IC内可以执行测试，仿真和编程的方式的改进。描述了一种TAP链接模块，其允许使用1149.1指令扫描操作来选择性地访问嵌入在IC内的TAP。

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