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    • 1. 发明申请
    • NETWORK
    • WO2012052270A3
    • 2012-06-14
    • PCT/EP2011066899
    • 2011-09-28
    • BOSCH GMBH ROBERTBLASCHKE VOLKERSCHIRMER JUERGENLOTHSPEICH TIMOLORENZ TOBIASSCHROFF CLEMENS
    • BLASCHKE VOLKERSCHIRMER JUERGENLOTHSPEICH TIMOLORENZ TOBIASSCHROFF CLEMENS
    • H04L12/40H04L29/08
    • H04L43/04H04L12/40169H04L2012/40273
    • The invention relates to a network having a plurality of levels (72, 74, 76), wherein each level (72, 74, 76) has at least one information node, wherein a number of information nodes in a lower k+1th level (72, 74, 76) are associated with an information node in a kth level (72, 74, 76) arranged above this and are connected to this one information node, wherein an information node in the lower k+1th level (72, 74, 76) is designed to signal to the information node in the kth level (72, 74, 76) arranged above this what information (501, 502, 503, 504, 505, 506, 507, 508, 509, 510, 511, 512, 513, 514, 515, 516, 517, 518, 519, 520) the information node in the k+1th level (72, 74, 76) requires, and what information (501, 502, 503, 504, 505, 506, 507, 508, 509, 510, 511, 512, 513, 514, 515, 516, 517, 518, 519, 520) the information node in the k+1th level (72, 74, 76) provides. (Figure 5)
    • 本发明涉及一种具有若干层(72,74,76),每个级别(72,74,76)包括至少一个信息节点的网络中,其中多个一较低的k的信息节点的+ 1个层(72,74,76) 信息节点相关联并连接到该信息节点上覆第k级(72,74,76),其中,所述较低的k的信息节点+ 1个层(72,74,76)适合于的信息节点 布置在第k级(72,74,76)以上指明什么样的信息(501,502,503,504,505,506,507,508,509,510,511,512,513,514,515,516, 517,518,519,520)第k + 1个层(72,74的信息节点的,76)根据需要和什么信息(501,502,503,504,505,06,507,508,509,510,511 ,512,513,514,515,516,517,518,519,520)第k + 1个层(72,74的信息的节点,提供76)。
    • 2. 发明申请
    • GATEWAY FOR THE AUTOMATIC ROUTING OF MESSAGES BETWEEN BUSES
    • 网关之间的巴士消息的自动ROUTES
    • WO2007093546A2
    • 2007-08-23
    • PCT/EP2007051180
    • 2007-02-07
    • BOSCH GMBH ROBERTIHLE MARKUSTAUBE JANLORENZ TOBIAS
    • IHLE MARKUSTAUBE JANLORENZ TOBIAS
    • H04L12/66
    • H04L12/66H04L12/4625H04L2012/40215H04L2012/40241
    • The invention discloses a gateway (1) for the automatic routing of messages between buses (3), said gateway being connected to several communication components (2) for temporarily storing and transmitting messages (N) via said buses and a gateway control unit, which is connected to the communication components (2) via a system bus in order to exchange messages (N) and which receives notification in the form of an external event (EV ext ) from each communication component (2) of the occurrence of a message (N) to be routed in said component. The gateway control unit has a vector memory (VRAM) comprising a first memory area for storing communication component vectors (KBV), a communication component vector (KBV) being provided for each message group of a communication component (2) and said vector indicating the time point (ZP) of the next expected internal event (EV int ) for a message (N) that is stored in the communication component (2) and a vector jump address to a message vector (NV), which is stored in a second memory area of the vector memory (VRAM). A corresponding message vector (NV) is stored for each message (N) that has been temporarily stored in the communication component (KB), said vector indicating a configurable time point (ZP) of an internal event (EV int ) that is triggered by the associated message (N), in addition to a command jump address. The gateway control unit also contains a command memory (IRAM) for storing commands that can be addressed by the command jump address indicated in the message vector (NV) and a control structure (FSM), which reads the communication component vector (KBV) associated with the respective communication component (2) from the first memory area of the vector memory (VRAM), if an internal event (EV in t) occurs, whose time point (ZP) is indicated in a message vector (NV) of a message (N) that is temporarily stored in a communication component (KB), or if said control structure (FSM) is notified of the occurrence of an external event (EV ext ) by a communication component (2). The control structure uses the vector jump address contained in the communication component vector to read the command jump address of the addressed message vector (NV) from the second memory area of the vector memory (VRAM) and then reads and executes at least one command from the command memory (IRAM) using the read command jump address. The time points (ZP) indicated in the vectors (NV, KBV) are then updated.
    • 本发明提供了用于自动地路由消息(3),其具有多个通信模块(2)总线之间的网关(1),用于通过该总线临时存储和传送消息(N),并经由系统总线网关控制单元 为消息的交换(N)被连接到所述通信模块(2),并且每个通信模块(2)中,a的本地发生被路由消息(N)作为外部事件(EV )的显示的获得 其中,所述网关控制器包括,即矢量存储器(VRAM),其具有用于存储所述通信模块的载体(CBD),第一存储器区,其特征在于用于通信模块(2)的每个消息组提供了一种通信模块矢量(CBD),其时间 期望的下一内部事件(ZP)(EV INT )缓存,以用于通信模块(2)N 是achricht(N)和在消息向量指示在所述向量存储器(VRAM)中的第二存储区域进行存储,高速缓存为每个通信模块(KB)消息(N)中一个向量地址(NV),相应的消息向量(NV)存储 该可配置的时间(ZP)是相应消息(N)中的一个要被触发的内部事件(EV INT ),并指示用于存储中列出指令的指令地址,指令存储器(IRAM) 消息向量(NV)是可寻址的指定的命令地址,序列控制器(FSM),当一个内部事件的发生(EV T)在一个消息矢量(NV),其时间点(ZP)的(通信模块中 KB)所存储的消息(N)之间的指定,或者(在一个外部事件EV )的情况下,该调度器(FSM)由COMMUNICA 和灰模块(2)似乎是从向量存储器(VRAM)中读出的第一存储器区和由所寻址的消息向量的第2存储区域的(NV)所包含的矢量跳跃地址命令跳跃地址的方法的相应的通信模块(2)相关联的通信块向量(CBD) 矢量存储器的(VRAM)中,然后通过读出命令跳跃地址读出来自指令存储器(IRAM)读取的至少一个指令,并在(NV,KBV)执行向量指示的时间点(ZP)被更新。
    • 6. 发明专利
    • PASARELA PARA LA TRANSFERENCIA DE DATOS ENTRE BUSES EN SERIE.
    • ES2346259T3
    • 2010-10-13
    • ES07728191
    • 2007-04-17
    • BOSCH GMBH ROBERT
    • IHLE MARKUSTAUBE JANLORENZ TOBIAS
    • G06F13/40H04L12/40H04L12/46
    • Pasarela para transferencia de datos entre buses en serie (3) con: (a) una pluralidad de módulos de comunicaciones (2), provistos para la respectiva conexión de un bus en serie (3) y que ejecutan una conversión entre paquetes de datos (DP) y palabras de datos (DW); (b) un bus maestro (8) que controla mediante un bus interno de control (5) una transferencia de datos palabra por palabra, a través de un bus interno de datos (4) entre dos módulos de comunicaciones (2), en donde el bus maestro (8) aplica una dirección fuente (SA) a través de un bus de dirección fuente (6) sobre un primer módulo de comunicaciones de emisión interna (2-1) y una dirección de destino (DA) a través de un bus separado de dirección de destino (7) sobre un segundo módulo de comunicaciones de recepción interna (2-2); (c) en donde, los datos recibidos en paquetes de datos (DP) por el primer módulo de comunicaciones (2-1) a través de un bus en serie (3-1) conectado a él, son transferidos palabra por palabra, directamente y sin un almacenamiento en memoria intermedia, a través de un bus de datos interno (4) y en una o una pluralidad de palabras de datos, del primer módulo de comunicaciones (3-1) al segundo módulo de comunicaciones (2-2), que envía dichos datos transferidos en paquetes de datos (DP) a través de un segundo bus en serie (3-2) conectado al segundo módulo de comunicaciones (2-2).
    • 7. 发明专利
    • AT476710T
    • 2010-08-15
    • AT07728763
    • 2007-05-03
    • BOSCH GMBH ROBERT
    • IHLE MARKUSTAUBE JANLORENZ TOBIAS
    • G06F13/38H04L12/46H04L12/56
    • A communication module for connecting a serial bus, which transmits data in packets, to a plurality of system buses of a gateway, which transmit data word by word, the communication module having a communication protocol unit, which is connected to the serial bus, for converting between data packages and messages, which are respectively made up of a plurality of data words, a message relaying unit for relaying messages between at least one message memory and the communication protocol unit, as well as buffer memories, a plurality of interface units, which are respectively connected to an associated system bus of the gateway, each interface unit being connected to at least one associated buffer memory, which stores a message temporarily, a transmission of data words via a plurality of system buses and their associated interface units from and to the buffer memories of the interface units taking place simultaneously, without delay.
    • 8. 发明专利
    • DE102006055514A1
    • 2007-11-29
    • DE102006055514
    • 2006-11-24
    • BOSCH GMBH ROBERT
    • IHLE MARKUSTAUBE JANLORENZ TOBIAS
    • H04L12/66H04L12/40
    • A gateway for data transfer between serial buses, including multiple communication modules that are each provided for connection of one serial bus, and that carry out a conversion between data packets and data words, a bus master that, via an internal control bus, controls a word-based transfer of data via an internal data bus between two communication modules, the bus master applying a source address via a source address bus to an internally transmitting first communication module, and a destination address via a separate destination address bus to an internally receiving second communication module, data received in data packets by the first communication module via a first serial bus connected thereto being transferred from the first communication module directly without buffering, in word-based fashion in one or more data words, via the internal data bus to the second communication module, which delivers these transferred data, in data packets, via a second serial bus connected to the second communication module.
    • 9. 发明专利
    • DE102007001137A1
    • 2007-08-16
    • DE102007001137
    • 2007-01-05
    • BOSCH GMBH ROBERT
    • LORENZ TOBIASIHLE MARKUSTAUBE JAN
    • H04L29/02
    • A gateway is provided for automatically routing messages between buses, the gateway being connected to multiple communication components for temporarily storing and transmitting messages via these buses, and having a gateway control unit which is connected to the communication components via a system bus for the exchange of messages, and which receives notification from each communication component of the occurrence therein of a message to be routed as an external event. The gateway control unit has a vector memory which includes a first memory region for storing communication component vectors, a communication component vector being provided for each message group of a communication component, and the vector indicating the point in time of the next expected internal event for a message that is temporarily stored in the communication component, and indicating a vector jump address to a message vector which is stored in a second memory region of the vector memory.