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1. 发明授权

US07070113B2 Nonvolatile memory card 有权
标题翻译：非易失性存储卡
公开(公告)号：US07070113B2
公开(公告)日：2006-07-04
申请号：US10667663
申请日：2003-09-23
申请人： Atsushi Shiraishi , Takayuki Tamura , Chiaki Kumahara , Shinsuke Asari
发明人： Atsushi Shiraishi , Takayuki Tamura , Chiaki Kumahara , Shinsuke Asari
IPC分类号： G06K19/06
CPC分类号： G11C16/3418 , G06F12/0246 , G06F2212/1016 , G06F2212/1036 , G06F2212/7205 , G06F2212/7207 , G11C16/349
摘要： A nonvolatile memory has an erase table in which a free-space information flag is associated with each physical address of a memory area and an address translation table in which a physical address of a memory area is associated with each logical address. The free-space information flag indicates whether a corresponding memory area is permitted to be erased. A control circuit determines a memory area to which rewrite data is to be written by referring to the free-space information flag, reflects the physical address and the logical address of the memory area to which the data is written into the address translation table, and updates the free-space information flag. The memory area to which rewrite data is to be written is determined by referring to the free-space information flag, and rewriting is not performed in the same memory area.
摘要翻译：非易失性存储器具有擦除表，其中空闲信息标志与存储区域的每个物理地址相关联，以及地址转换表，其中存储区域的物理地址与每个逻辑地址相关联。自由空间信息标志指示相应的存储区域是否被允许被擦除。控制电路通过参考自由空间信息标志来确定要写入重写数据的存储器区域，将数据写入地址转换表的存储区域的物理地址和逻辑地址反映，更新可用空间信息标志。通过参考自由空间信息标志来确定要写入重写数据的存储区域，并且不在同一存储区域中进行重写。

2. 发明申请

US20070035998A1 Nonvolatile memory apparatus 审中-公开
标题翻译：非易失存储器
公开(公告)号：US20070035998A1
公开(公告)日：2007-02-15
申请号：US11581690
申请日：2006-10-17
申请人： Takayuki Tamura , Yoshinori Takase , Shinichi Shuto , Yasuhiro Nakamura , Chiaki Kumahara
发明人： Takayuki Tamura , Yoshinori Takase , Shinichi Shuto , Yasuhiro Nakamura , Chiaki Kumahara
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C11/5642 , G11C16/06 , G11C2211/5641
摘要： Disclosed is a nonvolatile memory apparatus in which a nonvolatile memory and a controller are mounted and which realizes improved performance of read/write speeds and improved resistance to a retention error. A nonvolatile memory can store information of two bits or more, and can perform a first reading operation of outputting information read from a nonvolatile memory cell as 1-bit information and a second reading operation of outputting the read information as 2-bit information. A controller performs the first reading operation to read first information from the nonvolatile memory and performs the second reading operation to read second information. The reading speed of the first reading operation is faster than that of the second reading operation. In writing to a first area to be read, by using either a voltage in the upper-limit threshold voltage distribution or a voltage in the lower-limit threshold voltage distribution as a threshold voltage, resistance to a retention error of the first information is improved.
摘要翻译：公开了一种非易失性存储装置，其中安装了非易失性存储器和控制器，并且实现了读/写速度的改进的性能和改进的保持误差的抵抗力。非易失性存储器可以存储两位以上的信息，并且可以执行将从非易失性存储单元读取的信息作为1位信息输出的第一读取操作和作为2位信息输出读取信息的第二读取操作。控制器执行第一读取操作以从非易失性存储器读取第一信息，并执行第二读取操作以读取第二信息。第一读取操作的读取速度比第二读取操作的读取速度更快。在写入要读取的第一区域中，通过使用上限阈值电压分布中的电压或下限阈值电压分布中的电压作为阈值电压，改善对第一信息的保留误差的抵抗力。

3. 发明授权

US07269748B2 System for preventing errors upon ejection of a memory card from a slot 有权
标题翻译：用于在从存储卡弹出存储卡时防止错误的系统
公开(公告)号：US07269748B2
公开(公告)日：2007-09-11
申请号：US10712996
申请日：2003-11-17
申请人： Shinichi Shuto , Takayuki Tamura , Chiaki Kumahara
发明人： Shinichi Shuto , Takayuki Tamura , Chiaki Kumahara
IPC分类号： G06F1/00 , G06F13/00 , H05K7/10
CPC分类号： G06F1/305
摘要： Disclosed herewith is a semiconductor processing system such as a card type electronic device, which can easily cope with an error caused by power shutoff that occurs when the card is ejected. The semiconductor processing system is provided with an interface control circuit and a processing circuit and receives operation power from an external device such as a card slot when it is inserted therein. According to a first aspect of the present invention for coping with an error caused by power shutoff that occurs when the card is ejected, the interface control circuit, when the card is ejected from the card slot, detects a potential change to occur at a first external terminal to be disconnected from a predetermined terminal of the card slot before the power supply from the card slot is shut off, then instructs the processing circuit that is active to perform an ending processing. The semiconductor processing system can end the processing by itself before the power supply stops completely.
摘要翻译：这里公开了一种诸如卡型电子设备的半导体处理系统，其可以容易地处理当卡被弹出时发生的由电源关闭引起的错误。半导体处理系统设置有接口控制电路和处理电路，并且当插入其中时从诸如卡槽的外部设备接收操作电力。根据本发明的第一方面，为了应对当卡被弹出时发生的由电源关闭引起的错误，当卡从卡插槽中弹出时，接口控制电路检测到第一次发生的潜在变化在从卡槽供电之前将外部终端从卡槽的预定终端断开，然后指示有效的处理电路执行结束处理。在电源完全停止之前，半导体处理系统可以自己结束处理。

4. 发明授权

US10222272B2 Semiconductor device and electronic apparatus 有权
公开(公告)号：US10222272B2
公开(公告)日：2019-03-05
申请号：US14417004
申请日：2012-07-24
申请人： Chiaki Kumahara , Akira Tsurugasaki
发明人： Chiaki Kumahara , Akira Tsurugasaki
IPC分类号： G01K7/01 , G06F1/3234 , G01K15/00
摘要： In one embodiment, a semiconductor device (20) includes a semiconductor chip (200) in which functional blocks (201, 202, 203 etc.) and a temperature sensor (208) are integrated. In this embodiment, in response to a change in an operation state of the semiconductor device (20), the on-chip temperature sensor (208) operates to switch from a continuous operation in which it continuously measures a chip temperature to an intermittent operation in which it intermittently measures the chip temperature, or to change a time interval between intermittent measurements of the chip temperature.

5. 发明授权

US07286435B2 Memory card device having low consumed power in the consumed power state 有权
标题翻译：在消耗功率状态下具有低消耗功率的存储卡装置
公开(公告)号：US07286435B2
公开(公告)日：2007-10-23
申请号：US10561521
申请日：2004-12-21
申请人： Hidefumi Odate , Atsushi Shikata , Chiaki Kumahara
发明人： Hidefumi Odate , Atsushi Shikata , Chiaki Kumahara
IPC分类号： G11C5/14
CPC分类号： G06K19/0701 , G06F1/3203 , G06F1/3275 , G06K19/07 , G11C5/14 , Y02D10/14 , Y02D50/20
摘要： A card device has a regulator (5), a first internal circuit (6) and a second internal circuit (7), and the regulator supplies, to the second internal circuit, an internal voltage generated by dropping an external voltage (VCC) when the external voltage is high, and exactly supplies the external voltage as the internal voltage to the second internal circuit when the external voltage is low, and the external voltage is supplied as an operating power source to the first internal circuit and a transition to a low consumed power state is carried out if a command is not input for a certain period. The card device stops the operation of the regulator and suppresses the supply of the internal voltage to the second internal circuit in the transition to the low consumed power state. In the low consumed power state, consequently, it is possible to suppress a power consumption in each of the regulator and the second internal circuit in the card device.
摘要翻译：卡装置具有调节器（5），第一内部电路（6）和第二内部电路（7），并且调节器向第二内部电路提供由外部电压（VCC）下降而产生的内部电压外部电压高，并且当外部电压低时，将外部电压作为内部电压精确地提供给第二内部电路，并且外部电压作为工作电源提供给第一内部电路并且转变到低电平如果在一段时间内没有输入命令，则执行消耗功率状态。卡装置停止调节器的操作，并且在过渡到低功耗状态时禁止向第二内部电路提供内部电压。因此，在低功耗状态下，可以抑制卡装置中的每个调节器和第二内部电路的功耗。

6. 发明申请

US20080133860A1 MEMORY CARD AND INITIALIZATION SETTING METHOD THEREOF 审中-公开
标题翻译：记忆卡及其初始化设置方法
公开(公告)号：US20080133860A1
公开(公告)日：2008-06-05
申请号：US11925004
申请日：2007-10-26
申请人： Motoki Kanamori , Shigeo Kurakata , Chiaki Kumahara , Hidefumi Odate , Atsushi Shikata
发明人： Motoki Kanamori , Shigeo Kurakata , Chiaki Kumahara , Hidefumi Odate , Atsushi Shikata
IPC分类号： G06F12/00
CPC分类号： G06F13/4291 , G06F13/4239 , G11C5/00 , G11C5/04
摘要： Whether an initial command outputted from a host is ‘CMD1’ or ‘CMD55+CMD41’ is detected with an initial command detection portion 8, and the result of detection is set in an SD/MMC register 13. Reset process for hardware and that for firmware are carried out based on the result of detection set in the SD/MMC register 13. Thereafter, a microcomputer 7 sets data indicating in which mode, MultiMedia Card mode or SD mode, the firmware reset process was carried out, in a F/W process SD/MMC register 14. A H/W-F/W mode comparison circuit 15 compares data in the SD/MMC register 13 with data in the F/W process SD/MMC register 14. If these data agree with each other, busy state is released, and command wait state is established. If they disagree with each other, a disagreement occurrence detection signal is outputted to the microcomputer 7, and power-on reset processing is performed again.
摘要翻译：用初始命令检测部分8检测从主机输出的初始命令是“CMD1”还是“CMD55 + CMD41”，并将检测结果设置在SD / MMC寄存器13中。基于SD / MMC寄存器13中设置的检测结果进行硬件和固件的复位处理。此后，微型计算机7在F / W进程SD / MMC寄存器14中设置表示在多模式卡模式或SD模式中执行固件复位处理的模式的数据。 H / W-F / W模式比较电路15将SD / MMC寄存器13中的数据与F / W处理SD / MMC寄存器14中的数据进行比较。如果这些数据彼此一致，则释放忙状态，建立命令等待状态。如果彼此不同意，则将不一致发生检测信号输出到微型计算机7，并再次执行上电复位处理。

7. 发明授权

US07296097B2 Memory card and initialization setting method thereof to avoid initializing operation failure in a memory card 有权
标题翻译：存储卡及其初始化设置方法，以避免初始化存储卡中的操作故障
公开(公告)号：US07296097B2
公开(公告)日：2007-11-13
申请号：US10549614
申请日：2003-03-20
申请人： Motoki Kanamori , Shigeo Kurakata , Chiaki Kumahara , Hidefumi Odate , Atsushi Shikata
发明人： Motoki Kanamori , Shigeo Kurakata , Chiaki Kumahara , Hidefumi Odate , Atsushi Shikata
IPC分类号： G06F3/00 , G06F5/00 , G06F11/00 , G06F9/44
CPC分类号： G06F13/4291 , G06F13/4239 , G11C5/00 , G11C5/04
摘要： Whether an initial command outputted from a host is ‘CMD1’ or ‘CMD55+CMD41’ is detected with an initial command detection portion 8, and the result of detection is set in an SD/MMC register 13. Reset process for hardware and that for firmware are carried out based on the result of detection set in the SD/MMC register 13. Thereafter, a microcomputer 7 sets data indicating in which mode, MultiMedia Card mode or SD mode, the firmware reset process was carried out, in a F/W process SD/MMC register 14. A H/W-F/W mode comparison circuit 15 compares data in the SD/MMC register 13 with data in the F/W process SD/MMC register 14. If these data agree with each other, busy state is released, and command wait state is established. If they disagree with each other, a disagreement occurrence detection signal is outputted to the microcomputer 7, and power-on reset processing is performed again.
摘要翻译：使用初始命令检测部分8检测从主机输出的初始命令是“CMD 1”还是“CMD 55+ CMD 41”，并将检测结果设置在SD / MMC寄存器13中。基于SD / MMC寄存器13中设置的检测结果进行硬件和固件的复位处理。此后，微型计算机7在F / W进程SD / MMC寄存器14中设置表示在多模式卡模式或SD模式中执行固件复位处理的模式的数据。 H / W-F / W模式比较电路15将SD / MMC寄存器13中的数据与F / W处理SD / MMC寄存器14中的数据进行比较。如果这些数据彼此一致，则释放忙状态，建立命令等待状态。如果彼此不同意，则将不一致发生检测信号输出到微型计算机7，并再次执行上电复位处理。

8. 发明申请

US20070108293A1 Card device 有权
标题翻译：卡设备
公开(公告)号：US20070108293A1
公开(公告)日：2007-05-17
申请号：US10561521
申请日：2004-12-21
申请人： Hidefumi Odate , Atsushi Shikata , Chiaki Kumahara
发明人： Hidefumi Odate , Atsushi Shikata , Chiaki Kumahara
IPC分类号： G06K19/06
CPC分类号： G06K19/0701 , G06F1/3203 , G06F1/3275 , G06K19/07 , G11C5/14 , Y02D10/14 , Y02D50/20
摘要： A card device has a regulator (5), a first internal circuit (6) and a second internal circuit (7), and the regulator supplies, to the second internal circuit, an internal voltage generated by dropping an external voltage (VCC) when the external voltage is high, and exactly supplies the external voltage as the internal voltage to the second internal circuit when the external voltage is low, and the external voltage is supplied as an operating power source to the first internal circuit and a transition to a low consumed power state is carried out if a command is not input for a certain period. The card device stops the operation of the regulator and suppresses the supply of the internal voltage to the second internal circuit in the transition to the low consumed power state. In the low consumed power state, consequently, it is possible to suppress a power consumption in each of the regulator and the second internal circuit in the card device.
摘要翻译：卡装置具有调节器（5），第一内部电路（6）和第二内部电路（7），并且调节器向第二内部电路提供由外部电压（VCC）下降而产生的内部电压外部电压高，并且当外部电压低时，将外部电压作为内部电压精确地提供给第二内部电路，并且外部电压作为工作电源提供给第一内部电路并且转变到低电平如果在一段时间内没有输入命令，则执行消耗功率状态。卡装置停止调节器的操作，并且在过渡到低功耗状态时禁止向第二内部电路提供内部电压。因此，在低功耗状态下，可以抑制卡装置中的每个调节器和第二内部电路的功耗。

9. 发明申请

US20080010478A1 CARD DEVICE 审中-公开
标题翻译：卡设备
公开(公告)号：US20080010478A1
公开(公告)日：2008-01-10
申请号：US11856204
申请日：2007-09-17
申请人： Hidefumi ODATE , Atsushi Shikata , Chiaki Kumahara
发明人： Hidefumi ODATE , Atsushi Shikata , Chiaki Kumahara
IPC分类号： G06F1/26 , G11C5/14
CPC分类号： G06K19/0701 , G06F1/3203 , G06F1/3275 , G06K19/07 , G11C5/14 , Y02D10/14 , Y02D50/20
摘要： A card device has a regulator (5), a first internal circuit (6) and a second internal circuit (7), and the regulator supplies, to the second internal circuit, an internal voltage generated by dropping an external voltage (VCC) when the external voltage is high, and exactly supplies the external voltage as the internal voltage to the second internal circuit when the external voltage is low, and the external voltage is supplied as an operating power source to the first internal circuit and a transition to a low consumed power state is carried out if a command is not input for a certain period. The card device stops the operation of the regulator and suppresses the supply of the internal voltage to the second internal circuit in the transition to the low consumed power state. In the low consumed power state, consequently, it is possible to suppress a power consumption in each of the regulator and the second internal circuit in the card device.
摘要翻译：卡装置具有调节器（5），第一内部电路（6）和第二内部电路（7），并且调节器向第二内部电路提供由外部电压（VCC）下降而产生的内部电压外部电压高，并且当外部电压低时，将外部电压作为内部电压精确地提供给第二内部电路，并且外部电压作为工作电源提供给第一内部电路并且转变到低电平如果在一段时间内没有输入命令，则执行消耗功率状态。卡装置停止调节器的操作，并且在过渡到低功耗状态时禁止向第二内部电路提供内部电压。因此，在低功耗状态下，可以抑制卡装置中的每个调节器和第二内部电路的功耗。

10. 发明授权

US06982919B2 Memory card and data processing system 有权
标题翻译：存储卡和数据处理系统
公开(公告)号：US06982919B2
公开(公告)日：2006-01-03
申请号：US10891297
申请日：2004-07-15
申请人： Chiaki Kumahara , Atsushi Shikata , Yasuhiro Nakamura , Hideo Kasai , Hidefumi Odate
发明人： Chiaki Kumahara , Atsushi Shikata , Yasuhiro Nakamura , Hideo Kasai , Hidefumi Odate
IPC分类号： G11C7/08
CPC分类号： G11C16/30
摘要： A memory card and a microcomputer with nonvolatile memory wherein operation under two different types of power supply specifications is achieved are provided.A MultiMediaCard includes a flash memory and a controller which controls the operation associated with the flash memory. When the controller judges the level of supply voltage supplied from host equipment, it operates as follows: the controller judges whether detecting point corresponding to the voltage level of 1.8V system has been exceeded. After the judgment of excess, the controller judges whether detecting point corresponding to the voltage level of 3.3V system has been exceeded. When the supply voltage is at the voltage level of 1.8V system, the controller causes the flash memory to operate in the 1.8V-system operation mode without driving regulators or level shifters. When the supply voltage is at the voltage level of 3.3V system, the controller drives the regulators and the level shifters to convert the voltage level and causes the flash memory to operate in the 3.3V-system operation mode.
摘要翻译：提供一种存储卡和具有非易失性存储器的微型计算机，其中实现了两种不同类型的电源规格下的操作。多媒体卡包括闪存和控制与闪存相关的操作的控制器。当控制器判断从主机设备供电的电平时，其操作如下：控制器判断是否超过了对应于1.8V系统电压等级的检测点。超过判定后，控制器判断是否超过与3.3V系统的电压电平对应的检测点。当电源电压处于1.8V系统的电压电平时，控制器使闪存在1.8V系统运行模式下工作，无需驱动稳压器或电平转换器。当电源电压处于3.3V系统的电压电平时，控制器驱动稳压器和电平转换器转换电压电平，并使闪存在3.3V系统运行模式下工作。

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