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1. 发明授权

US06465290B1 Method of manufacturing a semiconductor device using a polymer film pattern 失效
标题翻译：使用聚合物膜图案制造半导体器件的方法
公开(公告)号：US06465290B1
公开(公告)日：2002-10-15
申请号：US09818409
申请日：2001-03-27
申请人： Kyoichi Suguro , Kouji Matsuo , Atsushi Murakoshi , Yasuhiko Sato , Hiromi Niiyama
发明人： Kyoichi Suguro , Kouji Matsuo , Atsushi Murakoshi , Yasuhiko Sato , Hiromi Niiyama
IPC分类号： H01L21338
CPC分类号： H01L29/6659 , H01L29/66537 , H01L29/66545
摘要： Claimed and disclosed is a method of manufacturing a semiconductor device, the method comprising the steps of forming a dummy gate on a semiconductor substrate, forming a source-drain diffusion region by introducing an impurity into the semiconductor substrate having the dummy gate as a mask, removing the dummy gate to form an opening, and forming a gate electrode within the opening with a gate insulating film formed below the gate electrode. The dummy gate is further formed by coating the semiconductor substrate with a polymer having a higher carbon content than hydrogen content so as to form a polymer film, forming a photoresist pattern on the polymer film, and transferring the pattern shape of the photoresist pattern onto the polymer film.
摘要翻译：权利要求和公开的是一种制造半导体器件的方法，所述方法包括以下步骤：在半导体衬底上形成虚拟栅极，通过将杂质引入到具有伪栅极的半导体衬底中作为掩模形成源极 - 漏极扩散区域，去除所述虚拟栅极以形成开口，并且在所述开口内形成栅极电极，所述栅极绝缘膜形成在所述栅电极下方。通过用具有比氢含量高的碳含量的聚合物涂覆半导体衬底以形成聚合物膜，在聚合物膜上形成光刻胶图案，并将光致抗蚀剂图案的图案形状转印到聚合物膜。

2. 发明授权

US06376888B1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06376888B1
公开(公告)日：2002-04-23
申请号：US09559356
申请日：2000-04-27
申请人： Yoshitaka Tsunashima , Kyoichi Suguro , Atsushi Murakoshi , Kouji Matsuo , Toshihiko Iinuma
发明人： Yoshitaka Tsunashima , Kyoichi Suguro , Atsushi Murakoshi , Kouji Matsuo , Toshihiko Iinuma
IPC分类号： H01L2976
CPC分类号： H01L21/28185 , H01L21/28088 , H01L21/28194 , H01L21/28202 , H01L21/823842 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L29/66553 , H01L29/66583
摘要： Disclosed is a semiconductor device having an N-type MIS transistor formed in a first region and a P-type MIS transistor formed in a second region, wherein, the N-type MIS transistor includes a first gate insulating film formed on at least the bottom of a first concave portion formed in the first region and a first gate electrode formed on the first gate insulating film, the P-type MIS transistor includes a second gate insulating film formed on at least the bottom of a second concave portion formed in the second region and a second gate electrode formed on the second gate insulating film, each of the first and second gate electrodes includes at least one metal-containing film, and at least one of the first and second gate electrodes is of a laminate structure including a plurality of the metal-containing films, and the work function of the metal-containing film constituting at least a part of the first gate electrode and in contact with the first gate insulating film is smaller than the work function of the metal-containing film constituting at least a part of the second gate electrode and in contact with the second gate insulating film.
摘要翻译：公开了一种半导体器件，其具有形成在第一区域中的N型MIS晶体管和形成在第二区域中的P型MIS晶体管，其中，所述N型MIS晶体管包括形成在至少底部的第一栅极绝缘膜形成在所述第一区域中的第一凹部和形成在所述第一栅极绝缘膜上的第一栅电极，所述P型MIS晶体管包括形成在所述第二栅极绝缘膜的至少第二凹部的底部上的第二栅极绝缘膜，区域和形成在所述第二栅极绝缘膜上的第二栅极电极，所述第一和第二栅极电极中的每一个包括至少一个含金属膜，并且所述第一和第二栅极电极中的至少一个是包括多个的含金属膜的膜，并且构成第一栅电极的至少一部分并与第一栅极绝缘膜接触的含金属膜的功函数小于th 构成至少一部分第二栅电极并与第二栅极绝缘膜接触的含金属膜的功函数。

3. 发明授权

US06335534B1 Ion implantation apparatus, ion generating apparatus and semiconductor manufacturing method with ion implantation processes 失效
标题翻译：离子注入装置，离子发生装置和具有离子注入工艺的半导体制造方法
公开(公告)号：US06335534B1
公开(公告)日：2002-01-01
申请号：US09291967
申请日：1999-04-15
申请人： Kyoichi Suguro , Atsushi Murakoshi , Katsuya Okumura
发明人： Kyoichi Suguro , Atsushi Murakoshi , Katsuya Okumura
IPC分类号： H01J37317
CPC分类号： H01J37/3171 , H01J2237/31711
摘要： An electrically conductive mask having openings formed is located above a semiconductor substrate and ions are implanted into the surface of the semiconductor substrate through the electrically conductive mask, thereby forming ion implanted layers. For ion implantation under different conditions, a dedicated electrically conductive mask is used wit each ion implantation step.
摘要翻译：具有形成开口的导电掩模位于半导体衬底之上，并且通过导电掩模将离子注入到半导体衬底的表面中，从而形成离子注入层。对于在不同条件下的离子注入，每个离子注入步骤都使用专用的导电掩模。

4. 发明授权

US5640020A Ion generation device, ion irradiation device, and method of manufacturing a semiconductor device 失效
公开(公告)号：US5640020A
公开(公告)日：1997-06-17
申请号：US713123
申请日：1996-09-16
申请人： Atsushi Murakoshi , Kyoichi Suguro , Tatsuya Hatanaka
发明人： Atsushi Murakoshi , Kyoichi Suguro , Tatsuya Hatanaka
IPC分类号： C23F4/00 , H01J27/02 , H01J27/08 , H01J27/14 , H01J27/16 , H01J27/18 , H01J37/08 , H01J37/317 , H01L21/265 , H01J3/02
CPC分类号： H01J37/32477 , H01J27/022 , H01J27/08 , H01J27/16 , H01J2237/08 , H01J2237/31701
摘要： An ion generation device includes a chamber in which plasma is generated, a first opening for introducing gas to be ionized by the plasma, and a second opening for irradiating ions generated from the gas. The inner wall of the chamber is coated with metal which is resistant to chemical etching by the ions and radicals.

5. 发明申请

US20050062115A1 Semiconductor device having gate electrodes with polymetal structure of polycrystalline silicon films and metal films 有权
标题翻译：具有多晶硅膜和金属膜的多金属结构的栅电极的半导体装置
公开(公告)号：US20050062115A1
公开(公告)日：2005-03-24
申请号：US10962504
申请日：2004-10-13
申请人： Fumio Ohtake , Yasushi Akasaka , Atsushi Murakoshi , Kyoichi Suguro
发明人： Fumio Ohtake , Yasushi Akasaka , Atsushi Murakoshi , Kyoichi Suguro
IPC分类号： H01L29/78 , H01L21/28 , H01L29/49 , H01L29/76 , H01L21/3205
CPC分类号： H01L29/6656 , H01L21/28061 , H01L21/28247 , H01L29/4941
摘要： The semiconductor device comprises a pair of impurity diffused regions formed in a silicon substrate 10, spaced from each other, and a gate electrode 26 formed above the silicon substrate 10 between the pair of impurity diffused regions 38 intervening a gate insulation film 12 therebetween. The gate electrode 26 is formed of a polycrystalline silicon film 16 formed on the gate insulation film 12, a polycrystalline silicon film 30 formed on the polycrystalline silicon film 16 and having crystal grain boundaries discontinuous to the polycrystalline silicon film 16, a metal nitride film 20 formed on the polycrystalline silicon film 30, and a metal film 22 formed on the barrier metal film 20. Whereby diffusion of the boron from the first polycrystalline silicon film 16 toward the metal nitride film 20 can be decreased. Thus, depletion of the gate electrode 26 can be suppressed.
摘要翻译：半导体器件包括彼此间隔开的形成在硅衬底10中的一对杂质扩散区域，以及在栅极绝缘膜12之间形成的一对杂质扩散区域38之间形成在硅衬底10上方的栅电极26。栅电极26由形成在栅极绝缘膜12上的多晶硅膜16，形成在多晶硅膜16上并具有与多晶硅膜16不连续的晶粒边界的多晶硅膜30，金属氮化物膜20 形成在多晶硅膜30上的金属膜22和形成在阻挡金属膜20上的金属膜22.由此可以减少硼从第一多晶硅膜16朝向金属氮化物膜20的扩散。因此，能够抑制栅电极26的耗尽。

6. 发明授权

US06541393B2 Method for fabricating semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US06541393B2
公开(公告)日：2003-04-01
申请号：US09779531
申请日：2001-02-09
申请人： Taro Sugizaki , Toshiro Nakanishi , Kyoichi Suguro , Atsushi Murakoshi
发明人： Taro Sugizaki , Toshiro Nakanishi , Kyoichi Suguro , Atsushi Murakoshi
IPC分类号： H01L2131
CPC分类号： H01L21/0214 , H01L21/02238 , H01L21/02255 , H01L21/02299 , H01L21/02332 , H01L21/02337 , H01L21/31662 , H01L21/823462 , H01L21/823481
摘要： A semiconductor device is fabricated by a method comprising the steps of: selectively introducing a halogen element or argon into a device region 14 of a silicon substrate 10; and wet oxidizing the silicon substrate 10 in an ambient atmosphere which an H2O partial pressure is less than 1 atm to thereby form a silicon oxide film 22 in the device region 14 of the silicon substrate 10, and a silicon oxide film 24 thinner than the silicon oxide film 22 in a device region 16 of the silicon substrate 10. Whereby the silicon oxide film in a device region 14 with the halogen element or argon introduced can be selectively formed thick. The silicon oxide films are formed by the wet oxidation, whereby the gate insulation films can be more reliable than those formed by the dry oxidation.
摘要翻译：通过包括以下步骤的方法制造半导体器件：将卤素元素或氩选择性地引入到硅衬底10的器件区域14中; 并且在H 2 O分压小于1atm的环境气氛中湿硅氧化硅衬底10，从而在硅衬底10的器件区域14中形成氧化硅膜22，并且比硅薄的氧化硅膜24 氧化膜22在硅衬底10的器件区域16中。由此，可以选择性地形成具有引入的卤素元素或氩的器件区域14中的氧化硅膜。通过湿式氧化形成氧化硅膜，由此能够比通过干式氧化形成的栅绝缘膜更可靠。

7. 发明授权

US06403452B1 Ion implantation method and ion implantation equipment 失效
标题翻译：离子注入法和离子注入设备
公开(公告)号：US06403452B1
公开(公告)日：2002-06-11
申请号：US09510240
申请日：2000-02-22
申请人： Atsushi Murakoshi , Kyoichi Suguro
发明人： Atsushi Murakoshi , Kyoichi Suguro
IPC分类号： H01L2104
CPC分类号： H01J37/3171 , H01L21/26513
摘要： In an ion implantation method using an ion implantation equipment having an extraction electrode and a post accelerator, ion is uniformly implanted into a shallow region from the surface of a sample by setting an applied volt. of the post accelerator higher than an applied volt. of the extraction electrode.
摘要翻译：在使用具有提取电极和后加速器的离子注入设备的离子注入方法中，通过设定施加电压，将离子从样品的表面均匀地注入浅区域。的后加速器高于施加电压。的提取电极。

8. 发明授权

US06939787B2 Method for fabricating semiconductor device having gate electrode with polymetal structure of polycrystalline silicon film and metal film 有权
标题翻译：具有多晶硅膜和金属膜多金属结构的栅电极的半导体器件的制造方法
公开(公告)号：US06939787B2
公开(公告)日：2005-09-06
申请号：US10962504
申请日：2004-10-13
申请人： Fumio Ohtake , Yasushi Akasaka , Atsushi Murakoshi , Kyoichi Suguro
发明人： Fumio Ohtake , Yasushi Akasaka , Atsushi Murakoshi , Kyoichi Suguro
IPC分类号： H01L29/78 , H01L21/28 , H01L29/49 , H01L21/3205 , H01L21/4763
CPC分类号： H01L29/6656 , H01L21/28061 , H01L21/28247 , H01L29/4941
摘要： The semiconductor device comprises a pair of impurity diffused regions formed in a silicon substrate 10, spaced from each other, and a gate electrode 26 formed above the silicon substrate 10 between the pair of impurity diffused regions 38 intervening a gate insulation film 12 therebetween. The gate electrode 26 is formed of a polycrystalline silicon film 16 formed on the gate insulation film 12, a polycrystalline silicon film 30 formed on the polycrystalline silicon film 16 and having crystal grain boundaries discontinuous to the polycrystalline silicon film 16, a metal nitride film 20 formed on the polycrystalline silicon film 30, and a metal film 22 formed on the barrier metal film 20. Whereby diffusion of the boron from the first polycrystalline silicon film 16 toward the metal nitride film 20 can be decreased. Thus, depletion of the gate electrode 26 can be suppressed.
摘要翻译：半导体器件包括彼此间隔开的形成在硅衬底10中的一对杂质扩散区域，以及在栅极绝缘膜12之间形成的一对杂质扩散区域38之间形成在硅衬底10上方的栅电极26。栅电极26由形成在栅极绝缘膜12上的多晶硅膜16，形成在多晶硅膜16上并具有与多晶硅膜16不连续的晶粒边界的多晶硅膜30，金属氮化物膜20 形成在多晶硅膜30上，金属膜22形成在阻挡金属膜20上。由此可以减少硼从第一多晶硅膜16朝向金属氮化物膜20的扩散。因此，能够抑制栅电极26的耗尽。

9. 发明授权

US06875986B1 Ion generation method and filament for ion generation apparatus 失效
标题翻译：用于离子发生装置的离子生成方法和长丝
公开(公告)号：US06875986B1
公开(公告)日：2005-04-05
申请号：US09559345
申请日：2000-04-27
申请人： Atsushi Murakoshi , Kyoichi Suguro , Katsuya Okumura
发明人： Atsushi Murakoshi , Kyoichi Suguro , Katsuya Okumura
IPC分类号： H01J27/02 , H01J27/08 , H01J37/08
CPC分类号： H01J27/08 , H01J27/02 , H01J2237/08 , H01J2237/31701
摘要： According to the ion generation method, ion source material composed of an element of desired ions to be generated and I is heated so that vapor of the compound is generated, and the ions are generated by discharging the vapor. The iodide has no corrosiveness, and can be stably ionized. Further, it hardly reacts with oxygen or water and is safe.
摘要翻译：根据离子产生方法，由要产生的所需离子的元素组成的离子源材料被加热，使得产生化合物的蒸汽，并且通过排出蒸气产生离子。碘化物没有腐蚀性，可以稳定地电离。此外，它几乎不与氧气或水反应并且是安全的。

10. 发明授权

US06693023B2 Ion implantation method and ion implantation equipment 失效
标题翻译：离子注入法和离子注入设备
公开(公告)号：US06693023B2
公开(公告)日：2004-02-17
申请号：US10079490
申请日：2002-02-22
申请人： Atsushi Murakoshi , Kyoichi Suguro
发明人： Atsushi Murakoshi , Kyoichi Suguro
IPC分类号： H01L2104
CPC分类号： H01J37/3171 , H01L21/26513
摘要： In an ion implantation method using an ion implantation equipment having an extraction electrode and a post accelerator, ion is uniformly implanted into a shallow region from the surface of a sample by setting an applied volt. of the post accelerator higher than an applied volt. of the extraction electrode.
摘要翻译：在使用具有提取电极和后加速器的离子注入设备的离子注入方法中，通过设定施加电压，将离子从样品的表面均匀地注入浅区域。的后加速器高于施加电压。的提取电极。

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