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1. 发明申请

US20070018758A1 Matching circuit 有权
标题翻译：匹配电路
公开(公告)号：US20070018758A1
公开(公告)日：2007-01-25
申请号：US10548559
申请日：2004-03-15
申请人： Atsushi Fukuda , Hiroshi Okazaki , Yasushi Yamao , Tetsuo Hirota
发明人： Atsushi Fukuda , Hiroshi Okazaki , Yasushi Yamao , Tetsuo Hirota
IPC分类号： H03H7/38 , H01P1/00
CPC分类号： H03H7/383 , H01P5/02 , H03F1/56 , H03F2200/111 , H04B1/0067 , H04B1/0458
摘要： A matching circuit including a main matching block 51 inserted in a signal path and a series matching block 522, one end of which is connected to the main matching block 51, in which one end of a series connection of a switch 542 and a parallel matching block 532 is connected to the signal path at the other end of the series matching block 522 and impedance matching between input/output is performed at any one of two frequencies by setting the switch to ON/OFF.
摘要翻译：包括插入在信号路径中的主匹配块51和串联匹配块52＆lt; 2＆gt;的匹配电路，其一端连接到主匹配块51，其中串联连接的一端开关54＆lt; 2＆gt;和并行匹配块53＆lt; 2＆gt;连接到串联匹配块52的另一端的信号路径。并且通过将开关设置为ON / OFF，在两个频率中的任何一个处执行输入/输出之间的阻抗匹配。

2. 发明授权

US08098114B2 Matching circuit 有权
标题翻译：匹配电路
公开(公告)号：US08098114B2
公开(公告)日：2012-01-17
申请号：US10548559
申请日：2004-03-15
申请人： Atsushi Fukuda , Hiroshi Okazaki , Yasushi Yamao , Tetsuo Hirota
发明人： Atsushi Fukuda , Hiroshi Okazaki , Yasushi Yamao , Tetsuo Hirota
IPC分类号： H03H7/38 , H01P7/08
CPC分类号： H03H7/383 , H01P5/02 , H03F1/56 , H03F2200/111 , H04B1/0067 , H04B1/0458
摘要： A matching circuit including a main matching block 51 inserted in a signal path and a series matching block 522, one end of which is connected to the main matching block 51, in which one end of a series connection of a switch 542 and a parallel matching block 532 is connected to the signal path at the other end of the series matching block 522 and impedance matching between input/output is performed at any one of two frequencies by setting the switch to ON/OFF.
摘要翻译：包括插入在信号路径中的主匹配块51和串联匹配块522的匹配电路，其一端连接到主匹配块51，其中开关542的串联连接的一端和并行匹配块532连接到串联匹配块522的另一端的信号路径，并且通过将开关设置为ON / OFF，在两个频率中的任何一个处执行输入/输出之间的阻抗匹配。

3. 发明授权

US07084717B2 Quadrature hybrid circuit 失效
标题翻译：正交混合电路
公开(公告)号：US07084717B2
公开(公告)日：2006-08-01
申请号：US10936692
申请日：2004-09-09
申请人： Hiroshi Okazaki , Tetsuo Hirota , Atsushi Fukuda
发明人： Hiroshi Okazaki , Tetsuo Hirota , Atsushi Fukuda
IPC分类号： H01P1/10
CPC分类号： H01P5/227 , H01P5/04
摘要： In a quadrature hybrid circuit which has first and second two-port circuits 11 and 12 inserted between I/O ports P1 and P2 and between I/O ports P4 and P3, respectively, and third and fourth two-port circuits inserted between I/O ports P1 and P4 and between I/O ports P2 and P3, respectively, and which is configured so that under the condition that the I/O ports P1 to P4 are matched, a high-frequency signal fed via the I/O port P1 is divided between the I/O ports P2 and P3 and the divided two signals are output 90° out of phase with each other but no signal is provided to the I/O ports P4, there are provided SPST switches 7 and 8 responsive to external control to control electromagnetic connections or coupling across a plane of symmetry 5 of the quadrature hybrid circuit passing through intermediate points of symmetry 23 and 24 of the third and fourth two-port circuits 21 and 22.
摘要翻译：在正交混合电路中，分别具有分别插入在I / O端口P 1和P 2之间以及I / O端口P 4和P 3之间的第一和第二双端口电路11和12以及第三和第四双端口电路插入在I / O端口P 1和P 4之间以及I / O端口P 2和P 3之间，并且被配置为使得在I / O端口P 1至P 4匹配的条件下，高通过I / O端口P 1馈送的频率信号被分配在I / O端口P 2和P 3之间，并且分开的两个信号彼此相位输出90°，但是没有向I / O提供信号端口P 4，提供响应于外部控制的SPST开关7和8，以控制通过第三和第四双端口的对称中间对称23和24的正交混合电路的对称平面5的电磁连接或耦合电路21和22。

4. 发明申请

US20050052259A1 Quadrature hybrid circuit 失效
标题翻译：正交混合电路
公开(公告)号：US20050052259A1
公开(公告)日：2005-03-10
申请号：US10936692
申请日：2004-09-09
申请人： Hiroshi Okazaki , Tetsuo Hirota , Atsushi Fukuda
发明人： Hiroshi Okazaki , Tetsuo Hirota , Atsushi Fukuda
IPC分类号： H01P1/10 , H01P5/04 , H01P5/12 , H01P5/18 , H01P5/22 , H03H7/48
CPC分类号： H01P5/227 , H01P5/04
摘要： In a quadrature hybrid circuit which has first and second two-port circuits 11 and 12 inserted between I/O ports P1 and P2 and between I/O ports P4 and P3, respectively, and third and fourth two-port circuits inserted between I/O ports P1 and P4 and between I/O ports P2 and P3, respectively, and which is configured so that under the condition that the I/O ports P1 to P4 are matched, a high-frequency signal fed via the I/O port P1 is divided between the I/O ports P2 and P3 and the divided two signals are output 90° out of phase with each other but no signal is provided to the I/O ports P4, there are provided SPST switches 7 and 8 responsive to external control to control electromagnetic connections or coupling across a plane of symmetry 5 of the quadrature hybrid circuit passing through intermediate points of symmetry 23 and 24 of the third and fourth two-port circuits 21 and 22.
摘要翻译：在正交混合电路中，分别具有分别插入在I / O端口P1和P2之间以及I / O端口P4和P3之间的第一和第二双端口电路11和12，以及插入在I / O端口P1和P2之间的第三和第四双端口电路。 O端口P1和P4以及I / O端口P2和P3之间，并且被配置为使得在I / O端口P1至P4匹配的条件下，经由I / O端口馈送的高频信号 P1在I / O端口P2和P3之间划分，并且分开的两个信号彼此相位输出90°，但是没有向I / O端口P4提供信号，因此提供SPST开关7和8响应于外部控制以控制通过第三和第四双端口电路21和22的对称中间对称23和24的正交混合电路的对称平面5的电磁连接或耦合。

5. 发明授权

US07183874B2 Casing contained filter 失效
标题翻译：套管包含过滤器
公开(公告)号：US07183874B2
公开(公告)日：2007-02-27
申请号：US11046885
申请日：2005-02-01
申请人： Kei Satoh , Shoichi Narahashi , Tetsuo Hirota , Yasushi Yamao
发明人： Kei Satoh , Shoichi Narahashi , Tetsuo Hirota , Yasushi Yamao
IPC分类号： H01P1/04
CPC分类号： H01P1/20381 , H01P1/2013
摘要： A filter is provided which maintains a low insertion loss characteristic of a filter contained in a casing with a very simple construction that the internal wall of the casing is formed by a superconductor. A coplanar waveguide filter 22 comprises a dielectric substrate 1, a plurality of resonators 5a, 5b, 5c and 5d and input/output terminal sections 4a and 4b, each of which is formed by a center conductor 2 and ground conductors 3a and 3b, both formed on the same surface of the dielectric substrate 1, with the ground conductors 3a to 3d being formed on the opposite sides of and in parallel relationship with the center conductor 2. The filter 22 is contained within a casing 21 having an internal wall, the surface of which is formed with a layer of superconductor 23. By way of example, a high temperature superconductor such as lanthanum-, yttrium-, bismuth- or thallium-superconductor is deposited as a film on a substrate of a metal oxide material such as MgO, SrTiO3, LaGaO3, LaAlO3 to provide a superconductor filmed substrate 25, which is applied to the internal surface of the casing 21. Electromagnetic power which is irradiated from the filter 22 does not produce a power loss when it impinges on the layer of superconductor 23 in its superconducting state, but is reflected therefrom to be absorbed by the filter 22, thus reducing the filter insertion loss.
摘要翻译：提供一种过滤器，其以非常简单的结构保持包含在壳体中的过滤器的低插入损耗特性，使得壳体的内壁由超导体形成。共面波导滤波器22包括电介质基板1，多个谐振器5a，5b，5c和5d以及输入/输出端子部分4a和4b，每个谐振器由中心导体2和地面导体3a和3b都形成在电介质基片1的相同表面上，其中接地导体3a至3d形成在中心导体2的相对侧并与之平行。过滤器22包含在具有内壁的壳体21内，其内表面形成有超导体层23。例如，将诸如镧，钇，铋或铊 - 超导体的高温超导体作为薄膜沉积在金属氧化物材料如MgO，SrTiO 3， LaGaO 3，LaAlO 3 3，以提供施加到壳体21的内表面的超导薄膜基底25。从过滤器22照射的电磁功率在超导状态的超导体23的层上碰撞时不产生功率损失，而是被反射从而被过滤器22吸收，从而降低了过滤器插入损耗。

6. 发明申请

US20050184826A1 Filter 失效
标题翻译：过滤
公开(公告)号：US20050184826A1
公开(公告)日：2005-08-25
申请号：US11046885
申请日：2005-02-01
申请人： Kei Satoh , Shoichi Narahashi , Tetsuo Hirota , Yasushi Yamao
发明人： Kei Satoh , Shoichi Narahashi , Tetsuo Hirota , Yasushi Yamao
IPC分类号： H01P1/201 , H01P1/203 , H01B12/02
CPC分类号： H01P1/20381 , H01P1/2013
摘要： A filter is provided which maintains a low insertion loss characteristic of a filter contained in a casing with a very simple construction that the internal wall of the casing is formed by a superconductor. A coplanar waveguide filter 22 comprises a dielectric substrate 1, a plurality of resonators 5a, 5b, 5c and 5d and input/output terminal sections 4a and 4b, each of which is formed by a center conductor 2 and ground conductors 3a and 3b, both formed on the same surface of the dielectric substrate 1, with the ground conductors 3a to 3d being formed on the opposite sides of and in parallel relationship with the center conductor 2. The filter 22 is contained within a casing 21 having an internal wall, the surface of which is formed with a layer of superconductor 23. By way of example, a high temperature superconductor such as lanthanum-, yttrium-, bismuth- or thallium-superconductor is deposited as a film on a substrate of a metal oxide material such as MgO, SrTiO3, LaGaO3, LaAlO3 to provide a superconductor filmed substrate 25, which is applied to the internal surface of the casing 21. Electromagnetic power which is irradiated from the filter 22 does not produce a power loss when it impinges on the layer of superconductor 23 in its superconducting state, but is reflected therefrom to be absorbed by the filter 22, thus reducing the filter insertion loss.
摘要翻译：提供一种过滤器，其以非常简单的结构保持包含在壳体中的过滤器的低插入损耗特性，使得壳体的内壁由超导体形成。共面波导滤波器22包括电介质基板1，多个谐振器5a，5b，5c和5d以及输入/输出端子部分4a和4b，每个谐振器由中心导体2和地面导体3a和3b都形成在电介质基片1的相同表面上，其中接地导体3a至3d形成在中心导体2的相对侧并与之平行。过滤器22包含在具有内壁的壳体21内，其内表面形成有超导体层23。例如，将诸如镧，钇，铋或铊 - 超导体的高温超导体作为薄膜沉积在金属氧化物材料如MgO，SrTiO 3， LaGaO 3，LaAlO 3 3，以提供施加到壳体21的内表面的超导薄膜基底25。从过滤器22照射的电磁功率在超导状态的超导体23的层上碰撞时不会产生功率损耗，而是被反射从而被过滤器22吸收，从而降低了过滤器插入损耗。

7. 发明授权

US07119621B2 Power amplifier 失效
标题翻译：功率放大器
公开(公告)号：US07119621B2
公开(公告)日：2006-10-10
申请号：US10912116
申请日：2004-08-06
申请人： Ning Chen , Yasunori Suzuki , Tetsuo Hirota , Yasushi Yamao
发明人： Ning Chen , Yasunori Suzuki , Tetsuo Hirota , Yasushi Yamao
IPC分类号： H03F3/68
CPC分类号： H03F3/72 , H03F1/0277 , H03F3/2178 , H03F2200/75
摘要： A power amplifier for receiving and amplifying an input signal and outputting an output signal includes N power amplifying units (N is an integer larger than 1) connected in parallel so as to output amplified signals in response to the input signal; an output combining unit for combining the output signals from the N power amplifying units and outputting a combined signal as the output signal of the power amplifier; and an amplitude controlling unit for selectively turning ON each of the N power amplifying units based on an amplitude of the input signal. In the power amplifier, the amplitude controlling unit may includes N amplitude adjusters connected in parallel for adjusting the amplitude of the input signal of the power amplifier; and a controller for selectively turning ON each of the N power amplifying units and controlling the amplitude adjusters so that an amplitude of the output signal becomes a substantially continuous function with respect to the amplitude of the input signal.
摘要翻译：用于接收和放大输入信号并输出输出信号的功率放大器包括并联连接的N个功率放大单元（N是大于1的整数），以响应输入信号输出放大的信号; 输出组合单元，用于组合来自N个功率放大单元的输出信号，并输出组合信号作为功率放大器的输出信号; 以及幅度控制单元，用于基于输入信号的幅度有选择地接通N个功率放大单元中的每一个。在功率放大器中，振幅控制单元可以包括并联连接的N个振幅调节器，用于调节功率放大器的输入信号的幅度; 以及控制器，用于选择性地接通N个功率放大单元中的每一个并且控制幅度调节器，使得输出信号的幅度相对于输入信号的幅度变为基本上连续的函数。

8. 发明授权

US07170342B2 Linear power amplification method and linear power amplifier 有权
标题翻译：线性功率放大法和线性功率放大器
公开(公告)号：US07170342B2
公开(公告)日：2007-01-30
申请号：US10730141
申请日：2003-12-09
申请人： Yasunori Suzuki , Shinji Mizuta , Tetsuo Hirota , Yasushi Yamao
发明人： Yasunori Suzuki , Shinji Mizuta , Tetsuo Hirota , Yasushi Yamao
IPC分类号： H03F1/30 , H03F3/66
CPC分类号： H03F1/3247 , H03F1/3258
摘要： A combined signal of a digital pilot signal and a digital transmission signal is applied to a digital predistorter (20), wherein it is added with odd-order distortions based on a power series model to generate a predistorted signal, then the predistorted signal is converted by a DA converter (31) to an analog signal, then the analog signal is upconverted by a frequency upconverting part (33) to a send frequency band, and the upconverted signal is output after being amplified by a power amplifier (37). A pilot signal component is extracted from the power amplifier output, then odd-order distortion components of the power series model are extracted by a digital predistorter control part (50) from the pilot signal component, and the odd-order distortions in the digital predistorter (20) are controlled to decrease the levels of the distortion components.
摘要翻译：数字导频信号和数字传输信号的组合信号被施加到数字预失真器（20），其中基于功率级数模型添加奇数失真以产生预失真信号，然后转换预失真信号通过DA转换器（31）到模拟信号，则模拟信号由上变频部分（33）上变频到发送频带，并且上变频信号在被功率放大器（37）放大后输出。从功率放大器输出提取导频信号分量，然后由数字预失真器控制部分（50）从导频信号分量提取功率系列模型的奇数阶失真分量，并且数字预失真器中的奇数阶失真（20）被控制以降低失真分量的水平。

9. 发明申请

US20050206480A1 Coplanar waveguide filter and method of forming same 有权
标题翻译：共面波导滤波器及其形成方法
公开(公告)号：US20050206480A1
公开(公告)日：2005-09-22
申请号：US11046923
申请日：2005-02-01
申请人： Kei Satoh , Shoichi Narahashi , Tetsuo Hirota , Yasushi Yamao
发明人： Kei Satoh , Shoichi Narahashi , Tetsuo Hirota , Yasushi Yamao
IPC分类号： H01P1/203 , H01P1/201 , H01P7/08
CPC分类号： H01P1/2013
摘要： A plurality of one-quarter wavelength coplanar resonators 5a to 5d are formed in series on a dielectric substrate 1, and coplanar input/output terminal sections 4a and 4b are formed on the dielectric substrate at opposite ends of the series connection for coupling with resonators 5a and 5d, respectively. A center conductor line width w1 of each of the resonators 5a to 5d is equal to a center conductor line width wio of each of the input/output terminal section 4a and 4b, but a ground conductor spacing d1 of each of the resonators 5a to 5d is greater than a ground conductor spacing dio of each of input/output terminal section 4a and 4b. Maintaining the accuracy of design is facilitated and a reduction in the maximum current density in the resonator is enabled.
摘要翻译：在电介质基板1上串联形成多个四分之一波长的共面谐振器5a至5d，并且在串联连接的相对端的电介质基板上形成共面输入输出端子部分4a和4b，分别与谐振器5a和5d耦合。每个谐振器5a至5d的中心导体线宽度W 1 N 1等于每个输入/输出端子部分的中心导体线宽度w IN 如图4A和4B所示，但是每个谐振器5a至5d的接地导体间隔d 1 SUB大于每个输入端的接地导体间距d i /输出端子部分4a和4b。维护设计的精度便于实现谐振器中最大电流密度的降低。

10. 发明授权

US07245195B2 Coplanar waveguide filter and method of forming same 有权
标题翻译：共面波导滤波器及其形成方法
公开(公告)号：US07245195B2
公开(公告)日：2007-07-17
申请号：US11046923
申请日：2005-02-01
申请人： Kei Satoh , Shoichi Narahashi , Tetsuo Hirota , Yasushi Yamao
发明人： Kei Satoh , Shoichi Narahashi , Tetsuo Hirota , Yasushi Yamao
IPC分类号： H01P1/20 , H01P3/08
CPC分类号： H01P1/2013
摘要： A plurality of one-quarter wavelength coplanar resonators 5a to 5d are formed in series on a dielectric substrate 1, and coplanar input/output terminal sections 4a and 4b are formed on the dielectric substrate at opposite ends of the series connection for coupling with resonators 5a and 5d, respectively. A center conductor line width w1 of each of the resonators 5a to 5d is equal to a center conductor line width wio of each of the input/output terminal section 4a and 4b, but a ground conductor spacing d1 of each of the resonators 5a to 5d is greater than a ground conductor spacing dio of each of input/output terminal section 4a and 4b. Maintaining the accuracy of design is facilitated and a reduction in the maximum current density in the resonator is enabled.
摘要翻译：在电介质基板1上串联形成多个四分之一波长的共面谐振器5a至5d，并且在串联连接的相对端的电介质基板上形成共面输入输出端子部分4a和4b，分别与谐振器5a和5d耦合。每个谐振器5a至5d的中心导体线宽度W 1 N 1等于每个输入/输出端子部分的中心导体线宽度w IN 如图4A和4B所示，但是每个谐振器5a至5d的接地导体间隔d 1 SUB大于每个输入端的接地导体间距d i /输出端子部分4a和4b。维护设计的精度便于实现谐振器中最大电流密度的降低。

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