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1. 发明专利

JP2006108437A High withstand voltage semiconductor device covered with resin, and its manufacturing method 有权
标题翻译：带有树脂的高耐受电压半导体器件及其制造方法
公开(公告)号：JP2006108437A
公开(公告)日：2006-04-20
申请号：JP2004293873
申请日：2004-10-06
申请人： Asahi Denka Kogyo Kk , Kansai Electric Power Co Inc:The , 旭電化工業株式会社 , 関西電力株式会社
发明人： OKADA SHINICHI , SUGAWARA YOSHITAKA , ASANO KATSUNORI , TAKAYAMA DAISUKE , SHOJI YOSHIKAZU , SHANADO TADASHI , SUEYOSHI TAKASHI , HIWATARI KENICHIRO
IPC分类号： H01L21/56 , H01L23/29 , H01L23/31
CPC分类号： H01L23/24 , H01L23/296 , H01L23/3121 , H01L24/48 , H01L2224/48137 , H01L2224/4823 , H01L2224/8592 , H01L2924/00014 , H01L2924/01004 , H01L2924/01078 , H01L2924/10272 , H01L2924/1305 , H01L2924/13055 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： PROBLEM TO BE SOLVED: To solve the problem that, if the semiconductor chip of a high withstand voltage is mounted on a substrate and a package and is sealed with a resin, a leak current in application of a high reverse voltage is large and unstable, and a dielectric breakdown power as designed may not be obtained. SOLUTION: When a sealing resin is applied to the high withstand voltage semiconductor mounted on a package or a substrate and is hardened, the resin is hardened while applying a high voltage between at least one electrode terminal connected from the electrode of a chip or the chip by wiring such as a wire and another electrode which requires a dielectric withstand voltage between it and the electrode terminal. The sealing resin uses a synthetic high polymer wherein organosilicon polymer C is constituted by linking organosilicon polymer A with a bridge structure by siloxane and organosilicon polymer B with a liner linkage structure by siloxane (Si-O-Si combination) alternately by siloxane bond and linking it in three-dimensional manner by covalent bond. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：解决的问题为了解决如果高耐压的半导体芯片安装在基板和封装上并用树脂密封的问题，则施加高反向电压的漏电流大并且不稳定，并且不能获得所设计的绝缘击穿功率。解决方案：当将密封树脂施加到安装在封装或基板上的高耐压半导体并被硬化时，树脂硬化，同时在从芯片的电极连接的至少一个电极端子之间施加高电压或者通过诸如电线和另一电极之类的布线的芯片，该电极和电极端子之间需要介电耐受电压。密封树脂使用合成高分子，其中有机硅聚合物C通过硅氧烷和有机硅聚合物B通过硅氧烷键交联地通过硅氧烷（Si-O-Si组合）与衬里连接结构连接有机硅聚合物A和桥结构而构成，它以三维方式通过共价键。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2015005570A 半導体装置审中-公开
标题翻译：半导体器件
公开(公告)号：JP2015005570A
公开(公告)日：2015-01-08
申请号：JP2013128774
申请日：2013-06-19
申请人：関西電力株式会社 , Kansai Electric Power Co Inc:The
发明人： HAYASHI TOSHIHIKO , ITSUMI TETSURO , IZUMI TORU , ASANO KATSUNORI
IPC分类号： H01L23/36 , H01L23/12 , H01L23/13
摘要：【課題】高電圧で使用した場合にも絶縁性を確保できると共に熱抵抗を低減できる半導体装置を提供する。【解決手段】この半導体装置によれば、第1,第2の2層の絶縁層5,7の間に第1の熱拡散層6を挟んだ構造によって、2層の絶縁層5,7でもって高電圧での使用時の電気的な絶縁性を確保できると共に第1の熱拡散層6によって各層5〜6の表面に沿った方向への熱拡散を促進でき、熱抵抗を低減できる。【選択図】図1
摘要翻译：要解决的问题：提供一种能够在高电压下使用时能够确保绝缘性并能够降低耐热性的半导体器件。解决方案：在具有第一热扩散层6夹持的结构的半导体器件中在绝缘层5,7或第一和第二层之间，两层或绝缘层5,7确保在高电压下使用时的电绝缘性，此外，第一热扩散层6促进沿该方向的热扩散沿着层5-6的表面，以降低耐热性。

3. 发明专利

JP2011222869A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2011222869A
公开(公告)日：2011-11-04
申请号：JP2010092412
申请日：2010-04-13
申请人： Kansai Electric Power Co Inc:The , 関西電力株式会社
发明人： IZUMI TORU , ASANO KATSUNORI
IPC分类号： H01L23/29 , C08L83/05 , C08L83/07 , H01L23/31
CPC分类号： H01L2224/48091 , H01L2224/73265 , H01L2224/8592 , H01L2924/1301 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device capable of attaining high heat resistance and high voltage resistance and improving adhesion between a coating part of a semiconductor element and a support body of the semiconductor element to allow a use at a high-temperature.SOLUTION: An annular end part 23 of a second coating part 16 that coats a surface 15A of a first coating part 15 which coats a surface of an SiC GTO thyristor element 1 placed on an upper surface 3A of a copper support body 3, engages with an annular engagement groove 21 of the support body 3. Since the annular end part 23 of the second coating part 16 which is engaged with the engagement groove 21 of the support body 3 plays a role as an anchor to the support body 3, the second coating part 16, having much difference in linear expansion coefficient from the support body 3, can be suppressed from peeling from the support body 3 at a high temperature (for example, 200°C or higher).
摘要翻译：解决的问题：为了提供能够获得高耐热性和高耐电压性以及改善半导体元件的涂覆部分和半导体元件的支撑体之间的粘附性的半导体器件，以允许在高温下使用，温度。
解决方案：涂覆第一涂层部分15的表面15A的第二涂覆部分16的环形端部23，其涂覆放置在铜支撑体3的上表面3A上的SiC GTO晶闸管元件1的表面与支撑体3的环状接合槽21卡合。由于与支撑体3的卡合槽21卡合的第二涂布部16的环状端部23作为支撑体3的锚定部发挥作用可以抑制与支撑体3的线膨胀系数有很大差异的第二涂布部16在高温（例如200℃以上）下从支撑体3剥离。版权所有（C）2012，JPO＆INPIT

4. 发明专利

JP2009206313A Dry metal-evaporated film capacitor 审中-公开
标题翻译：干金属蒸发电容器
公开(公告)号：JP2009206313A
公开(公告)日：2009-09-10
申请号：JP2008047377
申请日：2008-02-28
申请人： Kansai Electric Power Co Inc:The , Nissin Electric Co Ltd , 日新電機株式会社 , 関西電力株式会社
发明人： SUGAWARA YOSHITAKA , OGATA SHUJI , ASANO KATSUNORI , YAMANOUCHI SHOSUKE , MATSUMURA NORIAKI
IPC分类号： H01G4/18
摘要： PROBLEM TO BE SOLVED: To provide a dry metal-evaporated film capacitor which contrives the practical use of a capacitor element having polyvinylidene fluoride as a dielectric and allows further miniaturization than the capacitor element having polyvinylidene fluoride as a dielectric.
SOLUTION: A polyvinylidene fluoride resin film 1 mixed with a high-dielectric-constant filler having a metal-evaporated layer 2, e.g., a barium titanate powder, is wound. On the end surface thereof, metal is thermal-sprayed to form electrodes 3a and 3b, and external terminals 4a and 4b are connected and fixed to the electrodes 3a and 3b to form the capacitor element. The external terminals 4a and 4b are led out and coated with a metal laminate film 5 formed of a surface resin layer 5a, a metal layer 5b and an internal resin layer 5c to form a dry metal-evaporated film capacitor.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种干电容薄膜电容器，其具有聚偏二氟乙烯作为电介质的电容器元件的实际用途，并且比具有聚偏二氟乙烯作为电介质的电容器元件进一步小型化。解决方案：缠绕与具有金属蒸发层2的高介电常数填料（例如钛酸钡粉末）混合的聚偏二氟乙烯树脂膜1。在其端面上，金属被热喷涂以形成电极3a和3b，外部端子4a和4b连接并固定到电极3a和3b以形成电容器元件。外部端子4a和4b被引出并涂覆有由表面树脂层5a，金属层5b和内部树脂层5c形成的金属层压膜5，以形成干式金属蒸镀膜电容器。版权所有（C）2009，JPO＆INPIT

5. 发明专利

JP2009011117A Power conversion device 审中-公开
标题翻译：电源转换器件
公开(公告)号：JP2009011117A
公开(公告)日：2009-01-15
申请号：JP2007172209
申请日：2007-06-29
申请人： Kansai Electric Power Co Inc:The , 関西電力株式会社
发明人： ASANO KATSUNORI , SUGAWARA YOSHITAKA
IPC分类号： H02M7/48 , H02H7/122
CPC分类号： H02M1/32 , H02M7/48
摘要： PROBLEM TO BE SOLVED: To provide a power conversion device that can prevent the expansion of an abnormal accident by detecting the occurrence of a DC short-circuit abnormality at high speed with a simple structure and by turning off a switching element. SOLUTION: This power conversion device includes: a switching element 10, which is arranged in a DC current path between the positive and negative electrodes of a DC voltage; a reactor L1, which is arranged in the DC current path and turned off by the switching element 10; a reflux diode D1 for the reactor connected in parallel to the reactor L1; a control section, which controls the ON/OFF of the switching element 10; and a DC short-circuit abnormality decision section, which decides whether or not it is a DC short-circuit abnormality caused by a short-circuit between the positive and negative electrodes of the DC voltage based on a reverse voltage supplied to the reflux diode D1 for the reactor. The control section turns off the switching element 10 of the power conversion section 1 when the DC short-circuit abnormality decision section decides that it is a DC short-circuit abnormality. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够通过以简单的结构检测高速直流短路异常的发生并通过关断开关元件来防止异常事故的扩大的电力转换装置。解决方案：该电力转换装置包括：开关元件10，其布置在直流电压的正极和负极之间的直流电流路径中; 电抗器L1，其布置在直流电流路径中并被开关元件10截止; 用于与反应器L1并联连接的反应器的回流二极管D1; 控制部，其控制开关元件10的ON / OFF; 以及直流短路异常判定部，其基于提供给回流二极管D1的反向电压，判定是否是由直流电压的正极和负极之间的短路引起的直流短路异常为反应堆。当DC短路异常判定部判定为DC短路异常时，控制部关闭电力转换部1的开关元件10。版权所有（C）2009，JPO＆INPIT

6. 发明专利

JP2009004499A pn DIODE, ELECTRICAL CIRCUIT DEVICE, AND POWER CONVERTER 审中-公开
标题翻译： pn二极管，电路设备和电源转换器
公开(公告)号：JP2009004499A
公开(公告)日：2009-01-08
申请号：JP2007162847
申请日：2007-06-20
申请人： Kansai Electric Power Co Inc:The , 関西電力株式会社
发明人： ASANO KATSUNORI , SUGAWARA YOSHITAKA , TANAKA ATSUTSUGU
IPC分类号： H01L29/861 , H01L21/822 , H01L27/04 , H01L29/744
CPC分类号： H01L27/0814 , H01L21/8213 , H01L29/1602 , H01L29/1608 , H01L29/2003 , H01L29/32 , H01L29/861 , H02M1/34 , H02M7/003 , Y02B70/1483
摘要： PROBLEM TO BE SOLVED: To provide a compact and inexpensive pn diode with large ON-resistance.
SOLUTION: A SiCpn diode is controlled in life time by irradiating electron beams of approximately 3×10
13 cm
-2 or larger. As a result of the life time control, as shown in current-voltage characteristics K10 in Fig.1, the current flows from approximately 32 V and ON-voltage when 100 A is supplied reaches 50 V in this SiCpn diode. The resistance when the SiCpn diode is ON is 0.5 Ω. A conductive region of the SiCpn diode is 0.4 cm
2 . Since the ON-resistance is increased by the life time control to 0.2 Ω cm
2 , a resistor can be dispensed with in an electric circuit device which has conventionally used the diode and the resistor connected in series for example.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供具有大导通电阻的紧凑且便宜的pn二极管。解决方案：SiCpn二极管通过照射大约3×10 13 cm -2 或更大的电子束来控制寿命。作为寿命控制的结果，如图1中的电流 - 电压特性K10所示，当在该SiCpn二极管中，当提供100A时，电流从大约32V和接通电压流过50V。当SiCpn二极管导通时的电阻为0.5Ω。 SiCpn二极管的导电区域为0.4cm 2 。由于导通电阻通过寿命控制增加到0.2Ωcm 2 ，所以可以在传统上使用二极管和串联电阻器的电路装置中省去电阻器。版权所有（C）2009，JPO＆INPIT

7. 发明专利

JP2008164629A Temperature measuring method of semiconductor device, and temperature measuring device of semiconductor device 审中-公开
标题翻译：半导体器件的温度测量方法和半导体器件的温度测量器件
公开(公告)号：JP2008164629A
公开(公告)日：2008-07-17
申请号：JP2008043227
申请日：2008-02-25
申请人： Kansai Electric Power Co Inc:The , 関西電力株式会社
发明人： ASANO KATSUNORI , SUGAWARA YOSHITAKA
IPC分类号： G01K7/00
摘要： PROBLEM TO BE SOLVED: To provide a temperature measuring method of a semiconductor device and a temperature measuring device of the semiconductor device capable of detecting a joining temperature of the semiconductor device accurately without delay.
SOLUTION: In this temperature measuring method of the semiconductor device, the joining temperature of SiC GTO is determined by utilizing the fact that a rising time tv of a voltage Vak between an anode and a cathode as a turn-off characteristic time of SiC GTO which is a semiconductor switching element has high temperature dependency. The rising time tv is defined, for example, as a time required for the voltage Vak to reach 90% from 10% of a peak value. Namely, in the temperature measuring method, a measured turn-off characteristic time is converted into the joining temperature of SiC GTO based on a relation characteristic between the rising time tv measured beforehand and the joining temperature.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供半导体器件的温度测量方法和能够准确无误地检测半导体器件的接合温度的半导体器件的温度测量器件。解决方案：在该半导体器件的温度测量方法中，通过利用阳极和阴极之间的电压Vak的上升时间tv作为关断特性时间，确定SiC GTO的接合温度作为半导体开关元件的SiCGTO具有高的温度依赖性。上升时间tv被定义为例如电压Vak从峰值的10％达到90％所需的时间。也就是说，在温度测量方法中，基于预先测量的上升时间tv和接合温度之间的关系特性，将测量的截止特征时间转换为SiC GTO的接合温度。版权所有（C）2008，JPO＆INPIT

8. 发明专利

JP2005268731A Voltage-controlled semiconductor device 有权
标题翻译：电压控制半导体器件
公开(公告)号：JP2005268731A
公开(公告)日：2005-09-29
申请号：JP2004083233
申请日：2004-03-22
申请人： Kansai Electric Power Co Inc:The , 関西電力株式会社
发明人： ASANO KATSUNORI , SUGAWARA YOSHITAKA
IPC分类号： H01L29/739 , H01L29/10 , H01L29/12 , H01L29/24 , H01L29/78
CPC分类号： H01L29/1095 , H01L29/0623 , H01L29/7391 , H01L29/7395
摘要： PROBLEM TO BE SOLVED: To lower on-voltage of SiC-IGBT, whose inverted channel's channel resistance is high due to the influence from the surface level of the interface between a gate insulation film and a base layer, and whose on-voltage is high.
SOLUTION: An embedded collector region is partially formed onto a base layer formed on an emitter layer of an SiC semiconductor. A channel layer is formed onto the base layer and embedded collector region to make up a storage-type channel. This accumulates holes on the top of the channel layer at the on time, and a low-resistance channel is formed. Current through the hole flows through the channel of the collector region to the emitter layer, becoming base current for an npn transistor made up of the embedded collector region, base layer, and emitter layer.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了降低由于栅极绝缘膜和基极层之间的界面的表面水平的影响而使反向沟道的沟道电阻高的SiC-IGBT的导通电压，电压高。解决方案：嵌入式集电极区域部分地形成在形成在SiC半导体的发射极层上的基底层上。沟道层形成在基极层和嵌入的集电极区域上，构成存储型沟道。导通时在通道层的顶部蓄积孔，形成低电阻通道。通过该孔的电流流过集电极区域的沟道到发射极层，成为由嵌入式集电极区域，基极层和发射极层构成的npn晶体管的基极电流。版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2005167035A Silicon carbide semiconductor device and manufacturing method thereof 审中-公开
标题翻译：硅碳化硅半导体器件及其制造方法
公开(公告)号：JP2005167035A
公开(公告)日：2005-06-23
申请号：JP2003405259
申请日：2003-12-03
申请人： Central Res Inst Of Electric Power Ind , Kansai Electric Power Co Inc:The , 財団法人電力中央研究所 , 関西電力株式会社
发明人： NAKAYAMA KOJI , SUGAWARA YOSHITAKA , ASANO KATSUNORI , TSUCHIDA SHUICHI , KAMATA ISAO , MITSUYANAGI TOSHIYUKI , NAKAMURA TOMONOBU
IPC分类号： H01L21/331 , H01L21/04 , H01L21/329 , H01L21/336 , H01L29/04 , H01L29/12 , H01L29/24 , H01L29/73 , H01L29/739 , H01L29/78 , H01L29/861
CPC分类号： H01L29/868 , H01L29/045 , H01L29/0619 , H01L29/1608 , H01L29/66068 , H01L29/73 , H01L29/7397
摘要： PROBLEM TO BE SOLVED: To prevent the increase of a forward voltage due to aging of a bipolar semiconductor device using a silicon carbide semiconductor.
SOLUTION: The plane having an off-angle θ as 8° with respect to the (000-1) carbon plane of a silicon carbide semiconductor crystal is made to be a growth plane of crystal. A buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on this growth plane with an increase speed of the film thickness per hour (h) which is not less than 3 times larger than that in the prior art, i.e. with film formation speed of 10 μm/h. The flow rate of the raw material gases, which are silane, propane, and a dopant gas are greatly increased to increase the film formation speed.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了防止由于使用碳化硅半导体的双极性半导体器件的老化引起的正向电压的增加。解决方案：将具有相对于碳化硅半导体晶体的（000-1）碳平面的偏角θ为8°的平面制成晶体的生长平面。在该生长平面上形成缓冲层，漂移层和其他p型和n型半导体层，每小时（h）的膜厚度的增加速度不小于先前的3倍即成膜速度为10μm/ h。作为硅烷，丙烷和掺杂剂气体的原料气体的流量大大增加以提高成膜速度。版权所有（C）2005，JPO＆NCIPI

10. 发明专利

JP2014175604A Semiconductor device and attachment structure of semiconductor element 审中-公开
标题翻译：半导体器件的半导体器件和附件结构
公开(公告)号：JP2014175604A
公开(公告)日：2014-09-22
申请号：JP2013049345
申请日：2013-03-12
申请人： Kansai Electric Power Co Inc:The , 関西電力株式会社
发明人： HAYASHI TOSHIHIKO , IZUMI TORU , ASANO KATSUNORI
IPC分类号： H01L21/52 , H01L23/36 , H01L23/48
CPC分类号： H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/181 , H01L2924/19107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device in which thermal stress, occurring between a semiconductor element and a support, is relaxed without lowering the thermal conductivity at the connection of the semiconductor element and support, and thereby destruction due to thermal stress can be avoided while ensuring superior heat dissipation.SOLUTION: In a semiconductor device, a groove 21 of a cathode electrode 9 made of Au and a protrusion 22 of a solder layer 4 made of an Au/Sn eutectic alloy are fitted, and the cathode electrode 9 is bonded to an SiC semiconductor laminate 20 on the first bonding surface 9B on the reverse side of the second bonding surface 9A to the solder layer 4, and has ductility higher than that of the solder layer 4. Consequently, when the solder layer 4 is expanded or contracted by heating or cooling, the cathode electrode 9 deforms plastically by receiving a force from the protrusion 22 of the solder layer 4 at the groove 21. By the plastic deformation of the cathode electrode 9, thermal stress occurring between an SiC GTO thyristor element 1 and a support 3 can be relaxed.
摘要翻译：要解决的问题：提供半导体元件和支撑体之间发生热应力的半导体器件，而不会降低半导体元件和支撑件的连接处的导热性，从而可以由于热应力而导致的破坏避免同时确保优异的散热。解决方案：在半导体器件中，安装由Au制成的阴极9的凹槽21和由Au / Sn共晶合金制成的焊料层4的突起22，并且阴极电极9 在第二接合面9A的相反侧的第一接合面9B上与焊料层4接合到SiC半导体层叠体20，并且具有比焊料层4更高的延展性。因此，当焊料层4为通过加热或冷却而膨胀或收缩，阴极电极9通过在槽21处接收来自焊料层4的突起22的力而塑性变形。通过塑性变形阴极电极9的离子，可以放松在SiC GTO晶闸管元件1和支撑体3之间产生的热应力。

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