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1. 发明申请

US20100015813A1 GAP PROCESSING 有权
标题翻译： GAP处理
公开(公告)号：US20100015813A1
公开(公告)日：2010-01-21
申请号：US12175200
申请日：2008-07-17
申请人： Arthur J. McGinnis , Sachin Joshi , Chan Lim
发明人： Arthur J. McGinnis , Sachin Joshi , Chan Lim
IPC分类号： H01L21/31
CPC分类号： H01L21/31608 , H01L21/02164 , H01L21/02274 , H01L21/7682 , H01L21/76885
摘要： Among various methods, devices, and apparatuses, a number of methods are provided for forming a gap between circuitry. One such method includes depositing a first oxide precursor material on at least two conductive lines having at least one gap between the at least two conductive lines, and forming a breadloaf configuration with the first oxide precursor material on a top of each of the at least two conductive lines that leaves a space between a closest approach of at least two adjacent breadloaf configurations. The method also includes depositing a second oxide precursor material over the first oxide precursor material, where depositing the second oxide precursor material results in closing the space between the closest approach of the at least two adjacent breadloaf configurations.
摘要翻译：在各种方法中，设备和装置提供了用于在电路之间形成间隙的多种方法。一种这样的方法包括在至少两条导线之间沉积第一氧化物前体材料，所述至少两条导线在至少两条导电线之间具有至少一个间隙，并且在至少两条导线中的每一条的顶部上形成具有第一氧化物前体材料的面包构型在至少两个相邻的面包构造的最接近的方式之间留下空间的导电线。该方法还包括在第一氧化物前体材料上沉积第二氧化物前体材料，其中沉积第二氧化物前体材料导致封闭至少两个相邻的面包构型的最接近的方式之间的空间。

2. 发明申请

US20120040534A1 GAP PROCESSING 有权
标题翻译： GAP处理
公开(公告)号：US20120040534A1
公开(公告)日：2012-02-16
申请号：US13282563
申请日：2011-10-27
申请人： Arthur J. McGinnis , Sachin Joshi , Chan Lim
发明人： Arthur J. McGinnis , Sachin Joshi , Chan Lim
IPC分类号： H01L21/31
CPC分类号： H01L21/31608 , H01L21/02164 , H01L21/02274 , H01L21/7682 , H01L21/76885
摘要： Among various methods, devices, and apparatuses, a number of methods are provided for forming a gap between circuitry. One such method includes depositing a first oxide precursor material on at least two conductive lines having at least one gap between the at least two conductive lines, and forming a breadloaf configuration with the first oxide precursor material on a top of each of the at least two conductive lines that leaves a space between a closest approach of at least two adjacent breadloaf configurations. The method also includes depositing a second oxide precursor material over the first oxide precursor material, where depositing the second oxide precursor material results in closing the space between the closest approach of the at least two adjacent breadloaf configurations.
摘要翻译：在各种方法中，设备和装置提供了用于在电路之间形成间隙的多种方法。一种这样的方法包括在至少两条导线之间沉积第一氧化物前体材料，所述至少两条导线在至少两条导电线之间具有至少一个间隙，并且在至少两条导线中的每一条的顶部上形成具有第一氧化物前体材料的面包构型在至少两个相邻的面包构造的最接近的方式之间留下空间的导电线。该方法还包括在第一氧化物前体材料上沉积第二氧化物前体材料，其中沉积第二氧化物前体材料导致封闭至少两个相邻的面包构型的最接近的方式之间的空间。

3. 发明授权

US08058138B2 Gap processing 有权
标题翻译：差距处理
公开(公告)号：US08058138B2
公开(公告)日：2011-11-15
申请号：US12175200
申请日：2008-07-17
申请人： Arthur J. McGinnis , Sachin Joshi , Chan Lim
发明人： Arthur J. McGinnis , Sachin Joshi , Chan Lim
IPC分类号： H01L21/76
CPC分类号： H01L21/31608 , H01L21/02164 , H01L21/02274 , H01L21/7682 , H01L21/76885
摘要： Among various methods, devices, and apparatuses, a number of methods are provided for forming a gap between circuitry. One such method includes depositing a first oxide precursor material on at least two conductive lines having at least one gap between the at least two conductive lines, and forming a breadloaf configuration with the first oxide precursor material on a top of each of the at least two conductive lines that leaves a space between a closest approach of at least two adjacent breadloaf configurations. The method also includes depositing a second oxide precursor material over the first oxide precursor material, where depositing the second oxide precursor material results in closing the space between the closest approach of the at least two adjacent breadloaf configurations.
摘要翻译：在各种方法中，设备和装置提供了用于在电路之间形成间隙的多种方法。一种这样的方法包括在至少两条导线之间沉积第一氧化物前体材料，所述至少两条导线在至少两条导电线之间具有至少一个间隙，并且在至少两条导线中的每一条的顶部上形成具有第一氧化物前体材料的面包构型在至少两个相邻的面包构造的最接近的方式之间留下空间的导电线。该方法还包括在第一氧化物前体材料上沉积第二氧化物前体材料，其中沉积第二氧化物前体材料导致封闭至少两个相邻的面包构型的最接近的方式之间的空间。

4. 发明授权

US08293617B2 Gap processing 有权
标题翻译：差距处理
公开(公告)号：US08293617B2
公开(公告)日：2012-10-23
申请号：US13282563
申请日：2011-10-27
申请人： Arthur J. McGinnis , Sachin Joshi , Chan Lim
发明人： Arthur J. McGinnis , Sachin Joshi , Chan Lim
IPC分类号： H01L21/76
CPC分类号： H01L21/31608 , H01L21/02164 , H01L21/02274 , H01L21/7682 , H01L21/76885
摘要： Among various methods, devices, and apparatuses, a number of methods are provided for forming a gap between circuitry. One such method includes depositing a first oxide precursor material on at least two conductive lines having at least one gap between the at least two conductive lines, and forming a breadloaf configuration with the first oxide precursor material on a top of each of the at least two conductive lines that leaves a space between a closest approach of at least two adjacent breadloaf configurations. The method also includes depositing a second oxide precursor material over the first oxide precursor material, where depositing the second oxide precursor material results in closing the space between the closest approach of the at least two adjacent breadloaf configurations.
摘要翻译：在各种方法中，设备和装置提供了用于在电路之间形成间隙的多种方法。一种这样的方法包括在至少两条导线之间沉积第一氧化物前体材料，所述至少两条导线在至少两条导电线之间具有至少一个间隙，并且在至少两条导线中的每一条的顶部上形成具有第一氧化物前体材料的面包构型在至少两个相邻的面包构造的最接近的方式之间留下空间的导电线。该方法还包括在第一氧化物前体材料上沉积第二氧化物前体材料，其中沉积第二氧化物前体材料导致封闭至少两个相邻的面包构型的最接近的方式之间的空间。

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