专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US4323638A Reducing charging effects in charged-particle-beam lithography 失效
标题翻译：减少带电粒子束光刻中的充电效应
公开(公告)号：US4323638A
公开(公告)日：1982-04-06
申请号：US178988
申请日：1980-08-18
申请人： Arthur C. Adams , Frank B. Alexander, Jr. , Hyman J. Levinstein , Louis R. Thibault
发明人： Arthur C. Adams , Frank B. Alexander, Jr. , Hyman J. Levinstein , Louis R. Thibault
IPC分类号： H01L21/027 , B05D3/06
CPC分类号： H01L21/0271 , H01L21/0277 , Y10S430/143
摘要： In a charged-particle-beam lithographic system, charge accumulation on the workpiece during alignment or writing can cause significant pattern placement errors. A film (16) formed directly under the resist layer (56) to be patterned is utilized as a charge-conducting medium during lithography. The pattern delineated in the resist layer (56) is transferred into the film (16) and subsequently into an underlying layer (20). The film (16) is highly compatible with standard lithographic and etching processes used to fabricate LSI and VLSI circuits.
摘要翻译：在带电粒子束光刻系统中，对准或写入期间工件上的电荷累积可能导致显着的图案放置误差。在光刻过程中，作为导电介质，利用形成在图案化抗蚀剂层（56）正下方的膜（16）。在抗蚀剂层（56）中描绘的图案被转移到膜（16）中并随后转移到下层（20）中。薄膜（16）与用于制造LSI和VLSI电路的标准光刻和蚀刻工艺高度兼容。

2. 发明授权

US4136434A Fabrication of small contact openings in large-scale-integrated devices 失效
标题翻译：在大型集成设备中制造小型接触开口
公开(公告)号：US4136434A
公开(公告)日：1979-01-30
申请号：US805408
申请日：1977-06-10
申请人： Louis R. Thibault , Leopoldo D. Yau
发明人： Louis R. Thibault , Leopoldo D. Yau
IPC分类号： H01L21/321 , H01L21/768 , B01J17/00
CPC分类号： H01L21/32105 , H01L21/76888 , Y10S148/02 , Y10S148/117 , Y10S438/949
摘要： In one embodiment, a relatively thin layer of polysilicon is deposited on an underlying region to which spaced-apart electrical contacts are to be made through a subsequently formed relatively thick insulating layer. The polysilicon is selectively masked by a patterned silicon nitride layer in the regions where contact windows are to be formed. The unmasked polysilicon is then converted to a relatively thick insulating layer in an oxidizing step. Thereafter the silicon nitride portions are removed and the remaining polysilicon is utilized to provide conductive regions in the defined windows. In another embodiment, a relatively thick layer of polysilicon is selectively masked and partially converted to silicon dioxide to define both the insulating layer and the conductive regions. In still another embodiment, a relatively thin layer of polysilicon is patterned and then entirely converted to silicon dioxide to form an insulating layer having windows defined therein.
摘要翻译：在一个实施例中，相对薄的多晶硅层沉积在下一个区域上，通过随后形成的相对较厚的绝缘层将间隔开的电触点制成。在要形成接触窗口的区域中，多晶硅被图案化的氮化硅层选择性地掩蔽。然后在氧化步骤中将未掩模的多晶硅转变成相对较厚的绝缘层。此后，去除氮化硅部分，并且使用剩余的多晶硅来在限定的窗口中提供导电区域。在另一个实施例中，相对厚的多晶硅层被选择性地掩蔽并部分地转换成二氧化硅以限定绝缘层和导电区域。在另一个实施例中，将相对较薄的多晶硅层图案化，然后完全转化为二氧化硅，以形成其中限定有窗口的绝缘层。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式