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1. 发明授权

US07129884B1 Multiple antenna radar signal detection and estimation 有权
标题翻译：多天线雷达信号检测和估计
公开(公告)号：US07129884B1
公开(公告)日：2006-10-31
申请号：US10884785
申请日：2004-07-01
申请人： Ardavan Maleki Tehrani , Xiaoru Zhang , Paul J. Husted , Jeffrey M. Gilbert
发明人： Ardavan Maleki Tehrani , Xiaoru Zhang , Paul J. Husted , Jeffrey M. Gilbert
IPC分类号： G01S7/40 , G01S7/285 , G01S7/35 , G01S13/00
CPC分类号： H04W16/14 , G01S7/021 , H04K3/226 , H04K3/822 , H04K2203/18 , H04W24/00
摘要： A radar detection technique in a WLAN device can include a short pulse detection technique and a long pulse detection technique that can be performed using multiple receive chains. Short pulse detection is particularly effective when the incoming signal includes one or a limited number of main pulses and some residual pulses. In contrast, long pulse detection is particularly effective when the incoming signal is longer, thereby allowing various characteristics of the incoming signal to be accurately measured.
摘要翻译： WLAN设备中的雷达检测技术可以包括可以使用多个接收链执行的短脉冲检测技术和长脉冲检测技术。当输入信号包括一个或有限数量的主脉冲和一些残留脉冲时，短脉冲检测特别有效。相比之下，当输入信号较长时，长脉冲检测特别有效，从而允许准确地测量输入信号的各种特性。

2. 发明授权

US07463704B1 Multi-chain signal detection and gain control for automatic gain control systems 有权
标题翻译：用于自动增益控制系统的多链信号检测和增益控制
公开(公告)号：US07463704B1
公开(公告)日：2008-12-09
申请号：US10884787
申请日：2004-07-01
申请人： Ardavan Maleki Tehrani , Xiaoru Zhang , Paul J. Husted , Jeffrey M. Gilbert
发明人： Ardavan Maleki Tehrani , Xiaoru Zhang , Paul J. Husted , Jeffrey M. Gilbert
IPC分类号： H04L27/08
CPC分类号： H03G3/3068 , H03G3/3078
摘要： A wireless local area network (WLAN) system can have multiple antennas to improve signal detection and decoding. A WLAN receiver in such a system includes multiple amplifiers that can appropriately size an incoming signal and an automatic gain control unit to process the received incoming signals. The amplifiers of a chain of the WLAN receiver, i.e. an antenna and associated receiver components, can be adjusted with computed gains. To optimize the wireless system detection and decoding, the automatic gain control unit can advantageously compute these gains for each amplifier in the WLAN receiver.
摘要翻译：无线局域网（WLAN）系统可以具有多个天线来改善信号检测和解码。这种系统中的WLAN接收机包括可以适当地调整输入信号的大小的放大器和自动增益控制单元来处理接收到的输入信号。可以利用计算的增益来调整WLAN接收器链的放大器，即天线和相关联的接收器组件。为了优化无线系统检测和解码，自动增益控制单元可以有利地计算WLAN接收机中每个放大器的这些增益。

3. 发明授权

US07924932B2 Decoding system and method for digital communications 有权
标题翻译：数字通信解码系统和方法
公开(公告)号：US07924932B2
公开(公告)日：2011-04-12
申请号：US12615024
申请日：2009-11-09
申请人： John S. Thomson , Paul J. Husted , Ardavan Maleki Tehrani , Jeffrey M. Gilbert , William J. McFarland , Lars E. Thon , Yi-Hsiu Wang
发明人： John S. Thomson , Paul J. Husted , Ardavan Maleki Tehrani , Jeffrey M. Gilbert , William J. McFarland , Lars E. Thon , Yi-Hsiu Wang
IPC分类号： H04K1/10 , H04L27/28
CPC分类号： H04L25/067 , H03M13/25 , H03M13/3961 , H03M13/41 , H03M13/6325 , H03M13/6362 , H04K3/228 , H04L1/005 , H04L1/0054 , H04L27/38
摘要： A Viterbi decoding system interprets bits in received QAM constellations as many-valued parameters rather than binary valued parameters. It performs the Viterbi algorithm using these many-valued parameters to provide results superior to hard decision decoding. Rather than applying a hard 0-1 function to the QAM data, the system uses a non-stepped linear or curved transfer function to assign values to the bits. In another aspect, a system differentiates between data bits based on their estimated reliability, giving more emphasis to decoding reliable bits than unreliable bits using any of a variety of techniques. By differentiating between good and bad bits and de-emphasizing or ignoring unreliable bits, the system can provide a significant reduction in uncorrectable errors and packet loss.
摘要翻译：维特比解码系统将接收的QAM星座中的比特解释为多值参数，而不是二进制值参数。它使用这些多值参数来执行维特比算法，以提供优于硬判决解码的结果。系统使用非阶梯线性或弯曲传递函数来向位指定值，而不是将硬0-1函数应用于QAM数据。在另一方面，一种系统基于其估计的可靠性来区分数据比特，更多地强调使用各种技术中的任何一种来解码可靠比特比不可靠比特。通过区分好坏位和去强调或忽略不可靠位，系统可以显着减少不可纠正的错误和数据包丢失。

4. 发明授权

US07636400B2 Decoding system and method for digital communications 有权
公开(公告)号：US07636400B2
公开(公告)日：2009-12-22
申请号：US11621940
申请日：2007-01-10
申请人： John S. Thomson , Paul J. Husted , Ardavan Maleki Tehrani , Jeffrey M. Gilbert , William J. McFarland , Lars E. Thon , Yi-Hsiu Wang
发明人： John S. Thomson , Paul J. Husted , Ardavan Maleki Tehrani , Jeffrey M. Gilbert , William J. McFarland , Lars E. Thon , Yi-Hsiu Wang
IPC分类号： H04K1/10 , H04L27/28
CPC分类号： H04L25/067 , H03M13/25 , H03M13/3961 , H03M13/41 , H03M13/6325 , H03M13/6362 , H04K3/228 , H04L1/005 , H04L1/0054 , H04L27/38
摘要： A Viterbi decoding system interprets bits in received QAM constellations as many-valued parameters rather than binary valued parameters. It performs the Viterbi algorithm using these many-valued parameters to provide results superior to hard decision decoding. Rather than applying a hard 0-1 function to the QAM data, the system uses a non-stepped linear or curved transfer function to assign values to the bits. In another aspect, a system differentiates between data bits based on their estimated reliability, giving more emphasis to decoding reliable bits than unreliable bits using any of a variety of techniques. By differentiating between god and bad bits and de-emphasizing or ignoring unreliable bits, the system can provide a significant reduction in uncorrectable errors and packet loss.

5. 发明授权

US08498589B2 Polar modulator with path delay compensation 失效
标题翻译：具有路径延迟补偿的极调制器
公开(公告)号：US08498589B2
公开(公告)日：2013-07-30
申请号：US12172375
申请日：2008-07-14
申请人： Paul J. Husted , William W. Si , David J. Weber , Xiaoru Zhang
发明人： Paul J. Husted , William W. Si , David J. Weber , Xiaoru Zhang
IPC分类号： H04B1/66
CPC分类号： H03C5/00 , H04B2001/0491
摘要： A modulation system comprising a signal processing unit and a modulator. The signal processing unit may generate a low frequency modulator signal, a high frequency modulator signal, and a modulator amplitude control signal. The modulator may generate a modulated signal for transmission via a wireless network based, at least in part, on the low frequency modulator signal, the high frequency modulator signal, and the modulator amplitude control signal. The signal processing unit comprises a delay compensation unit for delaying the generation of the high frequency modulator signal and the modulator amplitude control signal based, at least in part, on signal generation and modulation path delays associated with the low frequency modulator signal to substantially align the modulator signals at the output of the modulation system.
摘要翻译：一种包括信号处理单元和调制器的调制系统。信号处理单元可以生成低频调制器信号，高频调制器信号和调制器幅度控制信号。该调制器可以至少部分地基于低频调制器信号，高频调制器信号和调制器幅度控制信号，经由无线网络生成用于传输的调制信号。信号处理单元包括延迟补偿单元，用于至少部分地基于与低频调制器信号相关联的信号产生和调制路径延迟来延迟高频调制器信号和调制器幅度控制信号的产生，以基本对准调制器信号在调制系统的输出端。

6. 发明申请

US20090311979A1 POLAR MODULATOR WITH PATH DELAY COMPENSATION 失效
标题翻译：具有路径延迟补偿的极性调制器
公开(公告)号：US20090311979A1
公开(公告)日：2009-12-17
申请号：US12172375
申请日：2008-07-14
申请人： Paul J. Husted , William W. Si , David J. Weber , Xiaoru Zhang
发明人： Paul J. Husted , William W. Si , David J. Weber , Xiaoru Zhang
IPC分类号： H04B1/02
CPC分类号： H03C5/00 , H04B2001/0491
摘要： A modulation system comprising a signal processing unit and a modulator. The signal processing unit may generate a low frequency modulator signal, a high frequency modulator signal, and a modulator amplitude control signal. The modulator may generate a modulated signal for transmission via a wireless network based, at least in part, on the low frequency modulator signal, the high frequency modulator signal, and the modulator amplitude control signal. The signal processing unit comprises a delay compensation unit for delaying the generation of the high frequency modulator signal and the modulator amplitude control signal based, at least in part, on signal generation and modulation path delays associated with the low frequency modulator signal to substantially align the modulator signals at the output of the modulation system.
摘要翻译：一种包括信号处理单元和调制器的调制系统。信号处理单元可以生成低频调制器信号，高频调制器信号和调制器幅度控制信号。该调制器可以至少部分地基于低频调制器信号，高频调制器信号和调制器幅度控制信号，经由无线网络生成用于传输的调制信号。信号处理单元包括延迟补偿单元，用于至少部分地基于与低频调制器信号相关联的信号产生和调制路径延迟来延迟高频调制器信号和调制器幅度控制信号的产生，以基本对准调制器信号在调制系统的输出端。

7. 发明申请

US20090311972A1 SYNTHESIZER AND MODULATOR FOR A WIRELESS TRANSCEIVER 失效
标题翻译：无线收发器的合成器和调制器
公开(公告)号：US20090311972A1
公开(公告)日：2009-12-17
申请号：US12172374
申请日：2008-07-14
申请人： Paul J. Husted , Soner Ozgur , Xiaoru Zhang
发明人： Paul J. Husted , Soner Ozgur , Xiaoru Zhang
IPC分类号： H04B1/40 , H03C5/00
CPC分类号： H03C5/00 , H04B2001/0491
摘要： A transceiver including a transmit modulator and a receiver. The modulator may accept a channel selection input, a first modulation input, a second modulation input, and an amplitude input. During transmit time slots, the modulator may generate a modulated output having a carrier frequency selected by the channel selection input. The carrier frequency may be frequency modulated by the first modulation inputs, phase modulated by the second modulation input, and amplitude modulated by the amplitude input. During receive time slots, the modulator may generate a carrier frequency selected by the channel selection input and offset by the first modulation input. The modulator may alternate between providing modulated transmit signals during transmit time slots and providing a local oscillator for the receiver during receive time slots.
摘要翻译：包括发射调制器和接收机的收发器。调制器可以接受信道选择输入，第一调制输入，第二调制输入和幅度输入。在发送时隙期间，调制器可以生成具有由频道选择输入选择的载波频率的调制输出。载波频率可以由第一调制输入进行频率调制，由第二调制输入进行相位调制，并由振幅输入进行幅度调制。在接收时隙期间，调制器可以产生由信道选择输入选择的载波频率，并由第一调制输入偏移。调制器可以在发送时隙期间在提供调制的发送信号之间交替，并且在接收时隙期间为接收机提供本地振荡器。

8. 发明授权

US08170494B2 Synthesizer and modulator for a wireless transceiver 失效
标题翻译：无线收发器的合成器和调制器
公开(公告)号：US08170494B2
公开(公告)日：2012-05-01
申请号：US12172374
申请日：2008-07-14
申请人： Paul J. Husted , Soner Ozgur , Xiaoru Zhang
发明人： Paul J. Husted , Soner Ozgur , Xiaoru Zhang
IPC分类号： H04B1/38
CPC分类号： H03C5/00 , H04B2001/0491
摘要： A transceiver including a transmit modulator and a receiver. The modulator may accept a channel selection input, a first modulation input, a second modulation input, and an amplitude input. During transmit time slots, the modulator may generate a modulated output having a carrier frequency selected by the channel selection input. The carrier frequency may be frequency modulated by the first modulation inputs, phase modulated by the second modulation input, and amplitude modulated by the amplitude input. During receive time slots, the modulator may generate a carrier frequency selected by the channel selection input and offset by the first modulation input. The modulator may alternate between providing modulated transmit signals during transmit time slots and providing a local oscillator for the receiver during receive time slots.
摘要翻译：包括发射调制器和接收机的收发器。调制器可以接受信道选择输入，第一调制输入，第二调制输入和幅度输入。在发送时隙期间，调制器可以生成具有由频道选择输入选择的载波频率的调制输出。载波频率可以由第一调制输入进行频率调制，由第二调制输入进行相位调制，并由振幅输入进行幅度调制。在接收时隙期间，调制器可以产生由信道选择输入选择的载波频率，并由第一调制输入偏移。调制器可以在发送时隙期间在提供调制的发送信号之间交替，并且在接收时隙期间为接收机提供本地振荡器。

9. 发明申请

US20100098183A1 Decoding System And Method For Digital Communications 有权
标题翻译：数字通信解码系统和方法
公开(公告)号：US20100098183A1
公开(公告)日：2010-04-22
申请号：US12615024
申请日：2009-11-09
申请人： John S. Thomson , Paul J. Husted , Ardavan M. Tehrani , Jeffrey M. Gilbert , William J. McFarland , Lars E. Thon , Yi-Hsiu Wang
发明人： John S. Thomson , Paul J. Husted , Ardavan M. Tehrani , Jeffrey M. Gilbert , William J. McFarland , Lars E. Thon , Yi-Hsiu Wang
IPC分类号： H04L5/12
CPC分类号： H04L25/067 , H03M13/25 , H03M13/3961 , H03M13/41 , H03M13/6325 , H03M13/6362 , H04K3/228 , H04L1/005 , H04L1/0054 , H04L27/38
摘要： A Viterbi decoding system interprets bits in received QAM constellations as many-valued parameters rather than binary valued parameters. It performs the Viterbi algorithm using these many-valued parameters to provide results superior to hard decision decoding. Rather than applying a hard 0-1 function to the QAM data, the system uses a non-stepped linear or curved transfer function to assign values to the bits. In another aspect, a system differentiates between data bits based on their estimated reliability, giving more emphasis to decoding reliable bits than unreliable bits using any of a variety of techniques. By differentiating between god and bad bits and de-emphasizing or ignoring unreliable bits, the system can provide a significant reduction in uncorrectable errors and packet loss.
摘要翻译：维特比解码系统将接收的QAM星座中的比特解释为多值参数，而不是二进制值参数。它使用这些多值参数来执行维特比算法，以提供优于硬判决解码的结果。系统使用非阶梯线性或弯曲传递函数来向位指定值，而不是将硬0-1函数应用于QAM数据。在另一方面，一种系统基于其估计的可靠性来区分数据比特，更多地强调使用各种技术中的任何一种来解码可靠比特比不可靠比特。通过区分神和坏位，并且不强调或忽略不可靠比特，系统可以显着减少不可校正的错误和分组丢失。

10. 再颁专利

USRE45236E1 Multi-channel binding in data transmission 有权
标题翻译：数据传输中的多通道绑定
公开(公告)号：USRE45236E1
公开(公告)日：2014-11-11
申请号：US13231733
申请日：2011-09-13
申请人： Paul J. Husted , William J. McFarland , Jeffrey M. Gilbert
发明人： Paul J. Husted , William J. McFarland , Jeffrey M. Gilbert
IPC分类号： H04J1/00
CPC分类号： H04W74/00 , H04L29/06 , H04L69/14 , H04W28/20
摘要： A system and method are described for binding together a plurality of wireless data communications channels, whereby an aggregate throughput improvement is realized. A master channel amongst the channels to be bound is compatible with existing standards-based wireless data communications equipment. The master channel serves to perform MAC association and flow control. Aggregate throughput is improved by sending and receiving either multiple sets of separately encoded packets, commonly encoded packets or redundantly encoded packets.
摘要翻译：描述了用于将多个无线数据通信信道绑定在一起的系统和方法，从而实现了聚合吞吐量的提高。要绑定的频道中的主频道与现有的基于标准的无线数据通信设备兼容。主信道用于执行MAC关联和流控制。通过发送和接收多组单独编码的数据包（通常是编码数据包或冗余编码数据包）来提高总体吞吐量。

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