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1. 发明授权

US07138844B2 Variable delay circuitry 有权
标题翻译：可变延迟电路
公开(公告)号：US07138844B2
公开(公告)日：2006-11-21
申请号：US11083482
申请日：2005-03-18
申请人： Andy L. Lee , Gary Lai , Changsong Zhang , Vaughn Betz , Ryan Fung
发明人： Andy L. Lee , Gary Lai , Changsong Zhang , Vaughn Betz , Ryan Fung
IPC分类号： H03H11/26
CPC分类号： H03K5/133 , H03K2005/00058
摘要： Circuitry for providing an input data signal to other circuitry on an integrated circuit includes a course delay chain and a fine delay chain. These two delay chains are cascadable, if desired, to provide a very wide range of possible amounts of delay which can be finely graded by use of the fine delay chain.
摘要翻译：用于向集成电路上的其它电路提供输入数据信号的电路包括一个课程延迟链和一个精细延迟链。如果需要，这两个延迟链是可级联的，以提供可以通过使用精细延迟链精细分级的可能的延迟量的非常宽的范围。

2. 发明申请

US20060208785A1 VARIABLE DELAY CIRCUITRY 有权
标题翻译：可变延迟电路
公开(公告)号：US20060208785A1
公开(公告)日：2006-09-21
申请号：US11083482
申请日：2005-03-18
申请人： Andy Lee , Gary Lai , Changsong Zhang , Vaughn Betz , Ryan Fung
发明人： Andy Lee , Gary Lai , Changsong Zhang , Vaughn Betz , Ryan Fung
IPC分类号： H03H11/26
CPC分类号： H03K5/133 , H03K2005/00058
摘要： Circuitry for providing an input data signal to other circuitry on an integrated circuit includes a course delay chain and a fine delay chain. These two delay chains are cascadable, if desired, to provide a very wide range of possible amounts of delay which can be finely graded by use of the fine delay chain.
摘要翻译：用于向集成电路上的其它电路提供输入数据信号的电路包括一个课程延迟链和一个精细延迟链。如果需要，这两个延迟链是可级联的，以提供可以通过使用精细延迟链精细分级的可能的延迟量的非常宽的范围。

3. 发明授权

US07911240B1 Clock switch-over circuits and methods 有权
标题翻译：时钟切换电路和方法
公开(公告)号：US07911240B1
公开(公告)日：2011-03-22
申请号：US11750293
申请日：2007-05-17
申请人： Gary Lai , Andy L. Lee , Ryan Fung , Vaughn Betz , Marcel A. LeBlanc
发明人： Gary Lai , Andy L. Lee , Ryan Fung , Vaughn Betz , Marcel A. LeBlanc
IPC分类号： G06F1/08
CPC分类号： G06F1/10
摘要： Clock switch-over circuits and methods provide clock signals to clock routing networks. According to one embodiment, a multiplexer selects between a first clock signal and a second clock signal in response to a switch select signal received from a control circuit. A storage circuit stores an enable signal in response to an output clock signal of the multiplexer. A logic circuit transmits the output clock signal of the multiplexer to a clock routing network in response to the enable signal from the storage circuit. At least one signal is transmitted from the clock switch-over circuit to the control circuit.
摘要翻译：时钟切换电路和方法为时钟路由网络提供时钟信号。根据一个实施例，多路复用器响应于从控制电路接收的开关选择信号在第一时钟信号和第二时钟信号之间进行选择。存储电路响应于多路复用器的输出时钟信号而存储使能信号。响应于来自存储电路的使能信号，逻辑电路将多路复用器的输出时钟信号传输到时钟路由网络。至少一个信号从时钟切换电路发送到控制电路。

4. 发明授权

US08248110B1 Clock switch-over circuits and methods 有权
标题翻译：时钟切换电路和方法
公开(公告)号：US08248110B1
公开(公告)日：2012-08-21
申请号：US13048241
申请日：2011-03-15
申请人： Gary Lai , Andy L. Lee , Ryan Fung , Vaughn Betz , Marcel A. LeBlanc
发明人： Gary Lai , Andy L. Lee , Ryan Fung , Vaughn Betz , Marcel A. LeBlanc
IPC分类号： H01H71/22
CPC分类号： G06F1/10
摘要： Clock switch-over circuits and methods provide clock signals to clock routing networks. According to one embodiment, a multiplexer selects between a first clock signal and a second clock signal in response to a switch select signal received from a control circuit. A storage circuit stores an enable signal in response to an output clock signal of the multiplexer. A logic circuit transmits the output clock signal of the multiplexer to a clock routing network in response to the enable signal from the storage circuit. At least one signal is transmitted from the clock switch-over circuit to the control circuit.
摘要翻译：时钟切换电路和方法为时钟路由网络提供时钟信号。根据一个实施例，多路复用器响应于从控制电路接收的开关选择信号在第一时钟信号和第二时钟信号之间进行选择。存储电路响应于多路复用器的输出时钟信号而存储使能信号。响应于来自存储电路的使能信号，逻辑电路将多路复用器的输出时钟信号传输到时钟路由网络。至少一个信号从时钟切换电路发送到控制电路。

5. 发明授权

US07737751B1 Periphery clock distribution network for a programmable logic device 有权
标题翻译：用于可编程逻辑器件的周边时钟分配网络
公开(公告)号：US07737751B1
公开(公告)日：2010-06-15
申请号：US11668521
申请日：2007-01-30
申请人： Gary Lai , Andy L. Lee , Ryan Fung , Vaughn Betz
发明人： Gary Lai , Andy L. Lee , Ryan Fung , Vaughn Betz
IPC分类号： H03K3/013
CPC分类号： G06F1/10
摘要： A programmable logic device (PLD) includes a signal distribution network, separate from the high-quality, low-skew clock distribution networks of the PLD, for distributing, from peripheral input/output regions of the PLD, clock-type signals. The signal distribution network includes a central periphery clock bus, located near a group of peripheral input/output regions, for conducting clock-type signals from those regions onto a clock spine of the PLD. The clock spine may be dedicated to the signal distribution network, or may be part of a high-quality, low-skew clock distribution network covering all or part of the PLD. The signal distribution network allows greater skew than such high-quality, low-skew clock distribution networks, but nevertheless is of higher quality, and allows less skew, than the general programmable interconnect and routing resources.
摘要翻译：可编程逻辑器件（PLD）包括与PLD的高质量，低偏移时钟分配网络分离的信号分配网络，用于从PLD的外围输入/输出区域分配时钟型信号。信号分配网络包括位于一组外围输入/输出区域附近的中央周边时钟总线，用于将这些区域的时钟信号传导到PLD的时钟脊上。时钟脊可以专用于信号分配网络，或者可以是覆盖全部或部分PLD的高质量，低偏移时钟分配网络的一部分。信号分配网络允许比这种高质量的低偏移时钟分配网络更大的偏斜，但是仍然具有比一般的可编程互连和路由资源更高的质量，并且允许较少的偏移。

6. 发明申请

US20100326045A1 MULTIPLE-USE ROCKET ENGINES AND ASSOCIATED SYSTEMS AND METHODS 审中-公开
标题翻译：多用途发动机及相关系统及方法
公开(公告)号：US20100326045A1
公开(公告)日：2010-12-30
申请号：US12704690
申请日：2010-02-12
申请人： Gary Lai
发明人： Gary Lai
IPC分类号： F02K9/00 , B21D53/00 , F41F3/04 , B64G1/10
CPC分类号： F02K9/766 , B64G1/002 , B64G1/401 , F05D2230/61 , Y10T29/49346
摘要： Multiple-use rocket engines and associated systems and methods are disclosed. A method in accordance with a particular embodiment includes launching a two-stage vehicle have a first stage and a second stage carried by the first stage. The first stage can be powered with a first rocket engine having first rocket engine components, including a first combustion chamber, arranged in a first component configuration. The method can further include separating the second stage from the first stage, and powering the second stage with a second rocket engine having second engine components arranged in a second component configuration. The second rocket engine components can include a second combustion chamber that is interchangeable with the first combustion chamber. In further particular embodiments, recovered engine components from the first stage may be used to power the second stage of the same or a different two-stage vehicle.
摘要翻译：公开了多用途火箭发动机及相关系统和方法。根据特定实施例的方法包括启动具有由第一阶段承载的第一阶段和第二阶段的两阶段车辆。第一阶段可以用具有第一火箭发动机部件的第一火箭发动机来供电，第一火箭发动机部件包括布置在第一部件配置中的第一燃烧室。该方法还可以包括将第二阶段与第一阶段分开，并且用具有以第二组件配置布置的第二发动机部件的第二火箭发动机为第二阶段供电。第二火箭发动机部件可以包括可与第一燃烧室互换的第二燃烧室。在另外的特定实施例中，可以使用来自第一级的恢复的发动机部件为相同或不同的两级车辆的第二级提供动力。

7. 发明授权

US07354020B2 System for use of external secondary payloads 失效
标题翻译：使用外部辅助有效载荷的系统
公开(公告)号：US07354020B2
公开(公告)日：2008-04-08
申请号：US10698261
申请日：2003-10-31
申请人： George E. Mueller , Gary Lai , Thomas C. Taylor
发明人： George E. Mueller , Gary Lai , Thomas C. Taylor
IPC分类号： B64G1/22
CPC分类号： B64G1/62 , B64G1/105 , B64G1/14 , B64G1/58 , B64G1/641
摘要： An experiment system with six different re-entry experiment locations for testing high temperature re-entry materials, creating new thermal protection systems, proving innovative new concepts for spacecraft exterior surfaces and the incremental development of next generation aerospace materials. A commercial transportation system to and from orbit provides a 24-hour return cycle for the experiments on a surface actually re-entering the earth's atmosphere. Now using existing doors, hatches and other points on the reusable launch vehicle's exterior, the actual re-entry environment is experienced by test specimens with quick turn around for a wide variety of different re-entry temperatures ranges for broad testing and development purposes. The reusable launch vehicle launches, remains in orbit for 24 hours and returns to provide an actual test environment for the exterior experiment system.
摘要翻译：具有六个不同重新进入实验位置的实验系统，用于测试高温重入物料，创建新的热保护系统，为航天器外表面提供创新的新概念，以及下一代航空材料的增量开发。往返轨道的商业运输系统为实际重新进入地球大气层的表面提供了24小时的循环。现在在可重复使用的运载火箭的外部使用现有的门，舱口和其他点，实际的重入环境经历了快速转弯的各种不同的重新进入温度范围，用于广泛的测试和开发目的。可重复使用的运载火箭发射，保持在轨道上24小时，并返回，为外部实验系统提供实际的测试环境。

8. 发明授权

US08436646B1 Reconfigurable logic block with user RAM 有权
标题翻译：用户RAM可重构逻辑块
公开(公告)号：US08436646B1
公开(公告)日：2013-05-07
申请号：US13175662
申请日：2011-07-01
申请人： David W. Mendel , Triet M. Nguyen , Lu Zhou , Gary Lai
发明人： David W. Mendel , Triet M. Nguyen , Lu Zhou , Gary Lai
IPC分类号： H03K19/173
CPC分类号： H03K19/17724
摘要： A programmable logic device includes logic blocks such as a logic array blocks (LAB) that can be configured as a random access memory (RAM) or as a lookup table (LUT). A mode flag is provided to indicate the mode of operation of configuration logic such as a configuration RAM (CRAM) used during partial reconfiguration of a logic block. If the mode flag indicates a design state, the configuration logic associated with the logic block is included in data verification and correction processes. If the mode flag indicates a user defined state, the configuration logic associated with the logic block is excluded from data verification and correction processes. Thus, exclusion and inclusion of portions of a region of configuration logic from data verification and correction processes allow a region of configuration logic to store both a design state and a user defined state without causing deleterious effects.
摘要翻译：可编程逻辑器件包括诸如可被配置为随机存取存储器（RAM）或查找表（LUT）的逻辑阵列块（LAB）的逻辑块。提供模式标志以指示诸如在逻辑块的部分重新配置期间使用的配置RAM（CRAM）的配置逻辑的操作模式。如果模式标志指示设计状态，则与逻辑块相关联的配置逻辑被包括在数据验证和校正处理中。如果模式标志指示用户定义的状态，则与逻辑块相关联的配置逻辑从数据验证和校正处理中排除。因此，排除和包含来自数据验证和校正处理的配置逻辑区域的部分允许配置逻辑的区域既存储设计状态又限制用户定义的状态，而不会造成有害影响。

9. 发明授权

US08572538B2 Reconfigurable logic block 有权
公开(公告)号：US08572538B2
公开(公告)日：2013-10-29
申请号：US13369226
申请日：2012-02-08
申请人： David W. Mendel , Gary Lai , Lu Zhou , Bruce B. Pedersen
发明人： David W. Mendel , Gary Lai , Lu Zhou , Bruce B. Pedersen
IPC分类号： G06F17/50 , H03K19/173
CPC分类号： G06F17/5054 , G06F11/1008 , H03K19/17756 , H03K19/17776
摘要： A programmable logic device includes logic blocks such as a logic array blocks (LAB) that can be configured as a random access memory (RAM) or as a lookup table (LUT). A mode flag is provided to indicate the mode of operation of configuration logic such as a configuration RAM (CRAM) used during partial reconfiguration of a logic block. An enable read flag is provided to indicate if values stored in the configuration logic are to be read out or a known state is to be read out during a data verification process. Thus, exclusion and inclusion of portions of a region of configuration logic from data verification and correction processes allow a region of configuration logic to store both a design state and a user defined state. Moreover, the region of configuration logic may be dynamically reconfigured from one state to another without causing verification errors.

10. 发明申请

US20110017872A1 SEA LANDING OF SPACE LAUNCH VEHICLES AND ASSOCIATED SYSTEMS AND METHODS 有权
标题翻译：空间启动车辆和相关系统和方法的海上着陆
公开(公告)号：US20110017872A1
公开(公告)日：2011-01-27
申请号：US12815306
申请日：2010-06-14
申请人： Jeffrey P. Bezos , Gary Lai , Sean R. Findlay
发明人： Jeffrey P. Bezos , Gary Lai , Sean R. Findlay
IPC分类号： B64G1/00
CPC分类号： B64G1/62 , B63B38/00 , B64G1/002
摘要： Launch vehicle systems and methods for landing and recovering a booster stage and/or other portions thereof on a platform at sea or on another body of water are disclosed. In one embodiment, a reusable space launch vehicle is launched from a coastal launch site in a trajectory over water. After booster engine cutoff and upper stage separation, the booster stage reenters the earth's atmosphere in a tail-first orientation. The booster engines are then restarted and the booster stage performs a vertical powered landing on the deck of a pre-positioned sea-going platform. In one embodiment, bidirectional aerodynamic control surfaces control the trajectory of the booster stage as it glides through the earth's atmosphere toward the sea-going platform. The sea-going platform can broadcast its real-time position to the booster stage so that the booster stage can compensate for errors in the position of the sea-going platform due to current drift and/or other factors. After landing, the sea-going platform can be towed by, e.g., a tug, or it can use its own propulsion system, to transport the booster stage back to the coastal launch site or other site for reconditioning and reuse. In another embodiment, the booster stage can be transferred to another vessel for transport. In still further embodiments, the booster can be refurbished while in transit from a sea-based or other landing site.
摘要翻译：公开了用于在海上或另一水体上的平台上着陆和恢复升压台和/或其他部分的运载工具系统和方法。在一个实施例中，从沿海发射场地以水中的轨迹发射可重复使用的空间运载火箭。在增压发动机切断和上段分离后，增压级以尾部第一方向重新输入地球大气。增压发动机然后重新启动，增压级在预定位的海上平台的甲板上执行垂直动力着陆。在一个实施例中，双向空气动力学控制表面控制升压级的轨迹，因为其沿着地球大气层朝向海上平台滑行。海上平台可以将其实时位置广播到增压阶段，以便增压阶段可以补偿由于电流漂移和/或其他因素导致的海上平台位置的错误。登陆后，海上平台可以通过例如拖船拖动，或者可以使用自己的推进系统，将升压台运送回沿海发射场所或其他场所进行修复和再利用。在另一个实施例中，增压级可以转移到另一个容器进行运输。在另外的实施例中，助推器可以在从海基或其他着陆部位运输的同时进行翻新。

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