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1. 发明授权

US06819274B2 Method for tuning a bandpass analog-to-digital converter and associated architecture 有权
标题翻译：用于调谐带通模数转换器和相关架构的方法
公开(公告)号：US06819274B2
公开(公告)日：2004-11-16
申请号：US10412961
申请日：2003-04-14
申请人： Andrew W. Krone , Ramin Khoini-Poorfard
发明人： Andrew W. Krone , Ramin Khoini-Poorfard
IPC分类号： H03M100
CPC分类号： H03L7/18 , H03J3/26
摘要： Methods and architectures for tuning bandpass analog-to-digital converters (ADCs) are disclosed that can be used, for example, with receiver architectures and associated methods that are also disclosed. The notch of the bandpass ADC can be tuned to the desired channel frequency by adjusting the notch to reduce noise energy in the output signal through a feedback process that adjusts the tuning signal. In addition, a master-slave approach can be implemented to tune a tunable bandpass filter configured as a slave circuit based upon the tuning adjustments made to the master bandpass ADC circuit. In addition, receiver architectures and associated methods are disclosed that utilize coarse analog tune circuitry to provide initial analog coarse tuning of desired channels within a received spectrum signal, such as a set-top box signal spectrum for satellite communications.
摘要翻译：公开了用于调谐带通模数转换器（ADC）的方法和架构，其可以用于例如还公开的接收机架构和相关联的方法。带通ADC的陷波可以通过调整陷波来调节到所需的信道频率，以通过调整调谐信号的反馈过程来减少输出信号中的噪声能量。此外，可以实现主从方法，以基于对主带通ADC电路的调谐调整来调整配置为从电路的可调谐带通滤波器。此外，公开了接收机架构和相关方法，其利用粗略的模拟调谐电路来提供接收频谱信号（例如用于卫星通信的机顶盒信号频谱）内的期望信道的初始模拟粗调。

2. 发明授权

US07167694B2 Integrated multi-tuner satellite receiver architecture and associated method 失效
标题翻译：综合多调谐卫星接收机架构及相关方法
公开(公告)号：US07167694B2
公开(公告)日：2007-01-23
申请号：US10412871
申请日：2003-04-14
申请人： Ramin Khoini-Poorfard , Andrew W. Krone
发明人： Ramin Khoini-Poorfard , Andrew W. Krone
IPC分类号： H04B7/08
CPC分类号： H04N5/4446 , H03D3/006 , H03D3/007 , H03L7/18 , H04H40/90 , H04N5/4401 , H04N5/50 , H04N7/20 , H04N21/4263
摘要： Multi-tuner receiver architectures and associated methods are disclosed that provide initial analog coarse tuning of desired channels within a received signal spectrum, such as transponder channels within a set-top box signal spectrum for satellite communications. These multi-tuner satellite receiver architectures provide significant advantages over prior direct down-conversion (DDC) architectures and low intermediate-frequency (IF) architectures, particularly where two tuners are desired on the same integrated circuit. Rather than using a low-IF frequency or directly converting the desired channel frequency to DC, initial coarse tuning provided by analog coarse tuning circuitry allows for a conversion to a frequency range around DC. This coarse tuning circuitry can be implemented, for example, using a large-step local oscillator (LO) that provides a coarse tune analog mixing signal. Once mixed down, the desired channel may then be fine-tuned through digital processing, such as through the use of a wide-band analog-to-digital converter (ADC) or a narrow-band tunable bandpass ADC.
摘要翻译：公开了多调谐器接收机架构和相关方法，其提供在接收信号频谱内的期望信道的初始模拟粗调，例如用于卫星通信的机顶盒信号频谱内的应答器信道。这些多调谐器卫星接收机架构提供了优于先前的直接下变频（DDC）架构和低中频（IF）架构的显着优点，特别是在同一集成电路上需要两个调谐器时。不是使用低IF频率或直接将期望的信道频率转换为DC，而是由模拟粗调谐电路提供的初始粗调调可以转换到大约DC的频率范围。该粗调谐电路可以例如使用提供粗调模拟混频信号的大步本地振荡器（LO）来实现。一旦混合，则可以通过数字处理（例如通过使用宽带模数转换器（ADC）或窄带可调谐带通ADC）来微调所需的信道。

3. 发明授权

US07904040B2 Receiver architectures utilizing coarse analog tuning and associated methods 有权
标题翻译：采用粗略模拟调谐和相关方法的接收机架构
公开(公告)号：US07904040B2
公开(公告)日：2011-03-08
申请号：US12004006
申请日：2007-12-19
申请人： Ramin Khoini-Poorfard , Andrew W. Krone
发明人： Ramin Khoini-Poorfard , Andrew W. Krone
IPC分类号： H04B7/08
CPC分类号： H04N5/4446 , H03D3/006 , H03D3/007 , H03L7/18 , H04H40/90 , H04N5/4401 , H04N5/50 , H04N7/20 , H04N21/4263
摘要： Receiver architectures and associated methods are disclosed that provide initial analog coarse tuning of desired channels within a received signal spectrum, such as a set-top box signal spectrum for satellite communications. These architectures provide significant advantages over prior direct down-conversion (DDC) architectures and low intermediate-frequency (IF) architectures, particularly where two tuners are desired on the same integrated circuit. Rather than using a low-IF frequency or directly converting the desired channel frequency to DC, initial coarse tuning provided by analog coarse tuning circuitry allows for a conversion to a frequency range around DC. This coarse tuning circuitry can be implemented, for example, using a large-step local oscillator (LO) that provides a coarse tune analog mixing signal. Once mixed down, the desired channel may then be fine-tuned through digital processing, such as through the use of a wide-band analog-to-digital converter (ADC) or a narrow-band tunable bandpass ADC.
摘要翻译：公开了接收机架构和相关方法，其提供接收信号频谱内的期望信道的初始模拟粗调，例如用于卫星通信的机顶盒信号频谱。这些架构与先前的直接下变频（DDC）架构和低中频（IF）架构相比具有显着的优势，特别是在同一集成电路上需要两个调谐器的情况下。不是使用低IF频率或直接将期望的信道频率转换为DC，而是由模拟粗调谐电路提供的初始粗调调可以转换到大约DC的频率范围。该粗调谐电路可以例如使用提供粗调模拟混频信号的大步本地振荡器（LO）来实现。一旦混合，则可以通过数字处理（例如通过使用宽带模数转换器（ADC）或窄带可调谐带通ADC）来微调所需的信道。

4. 发明申请

US20080250460A1 Receiver architectures utilizing coarse analog tuning and associated methods 有权
公开(公告)号：US20080250460A1
公开(公告)日：2008-10-09
申请号：US12004006
申请日：2007-12-19
申请人： Ramin Khoini-Poorfard , Andrew W. Krone
发明人： Ramin Khoini-Poorfard , Andrew W. Krone
IPC分类号： H04N7/20 , H04B1/18
CPC分类号： H04N5/4446 , H03D3/006 , H03D3/007 , H03L7/18 , H04H40/90 , H04N5/4401 , H04N5/50 , H04N7/20 , H04N21/4263
摘要： Receiver architectures and associated methods are disclosed that provide initial analog coarse tuning of desired channels within a received signal spectrum, such as a set-top box signal spectrum for satellite communications. These architectures provide significant advantages over prior direct down-conversion (DDC) architectures and low intermediate-frequency (IF) architectures, particularly where two tuners are desired on the same integrated circuit. Rather than using a low-IF frequency or directly converting the desired channel frequency to DC, initial coarse tuning provided by analog coarse tuning circuitry allows for a conversion to a frequency range around DC. This coarse tuning circuitry can be implemented, for example, using a large-step local oscillator (LO) that provides a coarse tune analog mixing signal. Once mixed down, the desired channel may then be fine-tuned through digital processing, such as through the use of a wide-band analog-to-digital converter (ADC) or a narrow-band tunable bandpass ADC.

5. 发明授权

US07340230B2 Receiver architectures utilizing coarse analog tuning and associated methods 有权
标题翻译：采用粗略模拟调谐和相关方法的接收机架构
公开(公告)号：US07340230B2
公开(公告)日：2008-03-04
申请号：US10412963
申请日：2003-04-14
申请人： Ramin Khoini-Poorfard , Andrew W. Krone
发明人： Ramin Khoini-Poorfard , Andrew W. Krone
IPC分类号： H04B7/08
CPC分类号： H04N5/4446 , H03D3/006 , H03D3/007 , H03L7/18 , H04H40/90 , H04N5/4401 , H04N5/50 , H04N7/20 , H04N21/4263
摘要： Receiver architectures and associated methods are disclosed that provide initial analog coarse tuning of desired channels within a received signal spectrum, such as a set-top box signal spectrum for satellite communications. These architectures provide significant advantages over prior direct down-conversion (DDC) architectures and low intermediate-frequency (IF) architectures, particularly where two tuners are desired on the same integrated circuit. Rather than using a low-IF frequency or directly converting the desired channel frequency to DC, initial coarse tuning provided by analog coarse tuning circuitry allows for a conversion to a frequency range around DC. This coarse tuning circuitry can be implemented, for example, using a large-step local oscillator (LO) that provides a coarse tune analog mixing signal. Once mixed down, the desired channel may then be fine-tuned through digital processing, such as through the use of a wide-band analog-to-digital converter (ADC) or a narrow-band tunable bandpass ADC.
摘要翻译：公开了接收机架构和相关方法，其提供接收信号频谱内的期望信道的初始模拟粗调，例如用于卫星通信的机顶盒信号频谱。这些架构与先前的直接下变频（DDC）架构和低中频（IF）架构相比具有显着的优势，特别是在同一集成电路上需要两个调谐器的情况下。不是使用低IF频率或直接将期望的信道频率转换为DC，而是由模拟粗调谐电路提供的初始粗调调可以转换到大约DC的频率范围。该粗调谐电路可以例如使用提供粗调模拟混频信号的大步本地振荡器（LO）来实现。一旦混合，则可以通过数字处理（例如通过使用宽带模数转换器（ADC）或窄带可调谐带通ADC）来微调所需的信道。

6. 发明申请

US20130335639A1 Configurable Buffer For An Integrated Circuit 有权
标题翻译：用于集成电路的可配置缓冲器
公开(公告)号：US20130335639A1
公开(公告)日：2013-12-19
申请号：US13526060
申请日：2012-06-18
申请人： András Vince Horvath , Abdulkerim L. Coban , Pio Balmelli , Ramin Khoini-Poorfard , Alessandro Piovaccari
发明人： András Vince Horvath , Abdulkerim L. Coban , Pio Balmelli , Ramin Khoini-Poorfard , Alessandro Piovaccari
IPC分类号： H03L5/00 , H04N5/50
CPC分类号： H04N5/50 , H03J5/24 , H04L25/0292 , H04N5/165 , H04N5/455 , H04N21/42607
摘要： In one embodiment, an internal buffer may be provided within an integrated circuit (IC) to convert a signal to an output current to be output via a pin of the IC, under control of a switch which can be controlled based on a configuration setting of the IC, and may selectively directly couple the signal to the pin when the IC is coupled to an external driver circuit.
摘要翻译：在一个实施例中，内部缓冲器可以设置在集成电路（IC）内，以在开关的控制下将信号转换成经由IC的引脚输出的输出电流，该开关可以基于配置设置 IC，并且当IC耦合到外部驱动器电路时，可以选择性地将信号耦合到引脚。

7. 发明授权

US08587398B2 Shielded differential inductor 有权
标题翻译：屏蔽差分电感
公开(公告)号：US08587398B2
公开(公告)日：2013-11-19
申请号：US12570462
申请日：2009-09-30
申请人： Sherry X. Wu , Mustafa H. Koroglu , Ramin Khoini-Poorfard , Alessandro Piovaccari
发明人： Sherry X. Wu , Mustafa H. Koroglu , Ramin Khoini-Poorfard , Alessandro Piovaccari
IPC分类号： H01F27/32
CPC分类号： H01F17/0006 , H01F2017/008 , H01L23/5225 , H01L23/5227 , H03B5/1212 , H03B5/1228 , H03B5/124
摘要： A shielded differential inductor forms a high quality factor (high-Q) inductor that is configured to attenuate frequency spurs and/or noise from magnetic coupling generated by electrical structures on or off of a substrate as well as interference received by other components from magnetic coupling generated by the inductor. The shielded differential inductor includes a differential inductor and a shield that substantially isolates the electrical field between the inductor and the substrate to reduce substrate current loss. The shield includes sets of finger structures that extend beyond the width of the inductor and a hub and spoke configuration of ground conductors that connect the sets of finger structures to ground.
摘要翻译：屏蔽差分电感器形成高质量因子（高Q）电感器，其被配置为衰减由电气结构产生的磁耦合引起的基板的频率杂散和/或噪声以及由其他部件从磁耦合接收的干扰由电感产生。屏蔽差分电感器包括差分电感器和屏蔽层，其基本上隔离电感器和衬底之间的电场，以减少衬底电流损耗。护罩包括延伸超过电感器宽度的指状结构的集合以及将手指结构组连接到地的接地导体的轮毂和轮辐配置。

8. 发明授权

US08494470B2 Integrated receivers and integrated circuit having integrated inductors 有权
标题翻译：具有集成电感器的集成接收器和集成电路
公开(公告)号：US08494470B2
公开(公告)日：2013-07-23
申请号：US13160564
申请日：2011-06-15
申请人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager , Abdulkerim L. Coban
发明人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager , Abdulkerim L. Coban
IPC分类号： H04B1/06
CPC分类号： H04B1/28 , H03H11/04 , H04B1/30 , H04L27/148 , H04N5/455 , H04N5/50
摘要： An integrated wideband receiver includes first and second signal processing paths and a controller. The first signal processing path has an input, and an output for providing a first processed signal, and comprises a first tracking bandpass filter having a first integrated inductor. The second signal processing path has an input, and an output for providing a second processed signal, and comprises a second tracking bandpass filter having a second integrated inductor. The controller is for enabling one of the first and second signal processing paths corresponding to a selected channel of a radio frequency (RF) input signal to provide an output signal. The controller, the first integrated inductor, and said second integrated inductor are formed on a single integrated circuit chip.
摘要翻译：集成宽带接收机包括第一和第二信号处理路径和控制器。第一信号处理路径具有输入和用于提供第一处理信号的输出，并且包括具有第一集成电感器的第一跟踪带通滤波器。第二信号处理路径具有输入和用于提供第二处理信号的输出，并且包括具有第二集成电感器的第二跟踪带通滤波器。控制器用于启用与射频（RF）输入信号的选定信道相对应的第一和第二信号处理路径之一以提供输出信号。控制器，第一集成电感器和所述第二集成电感器形成在单个集成电路芯片上。

9. 发明授权

US08385867B2 Tracking filter for a television tuner 有权
标题翻译：电视调谐器的跟踪滤波器
公开(公告)号：US08385867B2
公开(公告)日：2013-02-26
申请号：US12493819
申请日：2009-06-29
申请人： Aslamali A. Rafi , Chunyu Xin , Ruifeng Sun , Abhishek Kammula , Ramin Khoini-Poorfard , Alessandro Piovaccari , Peter J. Vancorenland
发明人： Aslamali A. Rafi , Chunyu Xin , Ruifeng Sun , Abhishek Kammula , Ramin Khoini-Poorfard , Alessandro Piovaccari , Peter J. Vancorenland
IPC分类号： H04B1/18
CPC分类号： H03J3/06 , H03J3/32 , H03J2200/10 , H03J2200/32 , H04N5/50
摘要： In one embodiment, a set of tracking filters to be coupled between an amplifier and a mixer is provided. The tracking filters may be differently configured depending on band of operation. For example, a first set of the filters can be configured to maintain a substantially constant Q value across their operating bandwidth while a second set of the filters can be configured to maintain a substantially constant bandwidth across their operating bandwidth.
摘要翻译：在一个实施例中，提供要耦合在放大器和混频器之间的一组跟踪滤波器。根据操作频带，跟踪滤波器可以被不同地配置。例如，可以将第一组滤波器配置为在其工作带宽上维持基本上恒定的Q值，而第二组滤波器可被配置为在其工作带宽上维持基本恒定的带宽。

10. 发明申请

US20110215848A1 FREQUENCY SYNTHESIZER 有权
标题翻译：频率合成器
公开(公告)号：US20110215848A1
公开(公告)日：2011-09-08
申请号：US12715728
申请日：2010-03-02
申请人： Mustafa H. Koroglu , Sherry X. Wu , Ramin Khoini-Poorfard , Alessandro Piovaccari
发明人： Mustafa H. Koroglu , Sherry X. Wu , Ramin Khoini-Poorfard , Alessandro Piovaccari
IPC分类号： H03L7/06
CPC分类号： H03L7/06
摘要： A frequency synthesizer includes a controlled oscillator configured to extend a temperature range and phase noise of the synthesizer without compromising the frequency coverage of the synthesizer. The frequency synthesizer also includes bias generation circuitry that sets a bias current of a charge pump to reduce bandwidth variations of the synthesizer. The frequency synthesizer further includes switching circuitry to dynamically turn a charge pump on and off to reduce effects of current leakage in the charge pump.
摘要翻译：频率合成器包括受控振荡器，其被配置为在不损害合成器的频率覆盖的情况下延长合成器的温度范围和相位噪声。频率合成器还包括偏置产生电路，其设置电荷泵的偏置电流以减少合成器的带宽变化。频率合成器还包括开关电路，以动态地打开和关闭电荷泵，以减少电荷泵中电流泄漏的影响。

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