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    • 4. 发明授权
    • Chip-level processing for joint demodulation in CDMA receivers
    • 用于CDMA接收机联合解调的​​芯片级处理
    • US08787427B2
    • 2014-07-22
    • US13468680
    • 2012-05-10
    • Andres ReialStephen GrantMichael Samuel BebawyYi-Pin Eric Wang
    • Andres ReialStephen GrantMichael Samuel BebawyYi-Pin Eric Wang
    • H04B1/00
    • H04B1/7105H04B1/7097H04B1/71052H04B1/71057H04L25/03331
    • A CDMA multi-code joint demodulation solution in which impairment suppression and channel matching operations are performed prior to despreading. Embodiments include a linear front end that performs chip-level suppression of signal components that are not included in a subsequent joint demodulation process. The pre-processing stage also carries out metric preparation and provides a vector decision statistic that is processed by a joint demodulation stage to extract per-code soft values for the symbols of interest in the received signal. Both code-specific and code-averaged versions of the linear processing are disclosed, as are several front-end configurations with equivalent performance, but different complexity trade-offs. These new approaches use a block formulation, requiring a set of input chip samples as an input, and perform all operations as matrix-vector multiplications, which is an approach amenable to efficient DSP or hardware implementation.
    • 一种CDMA解码解码方案,其中在解扩之前执行损伤抑制和信道匹配操作。 实施例包括执行不包括在随后的联合解调处理中的信号分量的芯片级抑制的线性前端。 预处理阶段还执行度量准备,并提供由联合解调级处理以提取接收信号中感兴趣符号的每码软值的向量决策统计量。 公开了线性处理的代码特定和代码平均版本,以及具有相同性能但是不同复杂性权衡的若干前端配置。 这些新方法使用块公式,需要一组输入芯片样本作为输入,并执行所有操作作为矩阵向量乘法,这是一种适合高效DSP或硬件实现的方法。
    • 6. 发明申请
    • Chip-Level Processing for Joint Demodulation in CDMA Receivers
    • CDMA接收机联合解调的​​芯片级处理
    • US20130301686A1
    • 2013-11-14
    • US13468680
    • 2012-05-10
    • Andres ReialStephen GrantMichael Samuel BebawyYi-Pin Eric Wang
    • Andres ReialStephen GrantMichael Samuel BebawyYi-Pin Eric Wang
    • H04B1/7105
    • H04B1/7105H04B1/7097H04B1/71052H04B1/71057H04L25/03331
    • A CDMA multi-code joint demodulation solution in which impairment suppression and channel matching operations are performed prior to despreading. Embodiments include a linear front end that performs chip-level suppression of signal components that are not included in a subsequent joint demodulation process. The pre-processing stage also carries out metric preparation and provides a vector decision statistic that is processed by a joint demodulation stage to extract per-code soft values for the symbols of interest in the received signal. Both code-specific and code-averaged versions of the linear processing are disclosed, as are several front-end configurations with equivalent performance, but different complexity trade-offs. These new approaches use a block formulation, requiring a set of input chip samples as an input, and perform all operations as matrix-vector multiplications, which is an approach amenable to efficient DSP or hardware implementation.
    • 一种CDMA解码解码方案,其中在解扩之前执行损伤抑制和信道匹配操作。 实施例包括执行不包括在随后的联合解调处理中的信号分量的芯片级抑制的线性前端。 预处理阶段还执行度量准备,并提供由联合解调级处理以提取接收信号中感兴趣符号的每码软值的向量决策统计量。 公开了线性处理的代码特定和代码平均版本,以及具有相同性能但是不同复杂性权衡的若干前端配置。 这些新方法使用块公式,需要一组输入芯片样本作为输入,并执行所有操作作为矩阵向量乘法,这是一种适合高效DSP或硬件实现的方法。
    • 8. 发明授权
    • Method and apparatus for soft information transfer between constituent processor circuits in a soft-value processing apparatus
    • 用于软值处理装置中的组成处理器电路之间的软信息传送的方法和装置
    • US08713414B2
    • 2014-04-29
    • US13358978
    • 2012-01-26
    • Matthias KamufAndres Reial
    • Matthias KamufAndres Reial
    • H03M13/03
    • H04L25/03318H03M13/2957H03M13/6505H03M13/6577H04L1/005H04L1/1861H04L25/03171H04L25/067
    • In one or more aspects, the present invention improves the efficiency of soft information transfer within a soft-value processing apparatus, by reducing in some sense the “amount” of soft information transferred between constituent processor circuits within the apparatus, without forfeiting or otherwise compromising the transfer of “valuable” soft information. In one example, the soft values produced by a constituent processor circuit are identified as being reliable or unreliable according to a reliability threshold. Some or all of the unreliable values are omitted from a soft value information transfer to another constituent processor circuit, or they are quantized for such transfer. The reduction in memory requirements for soft information transfer advantageously allows the use of lower power, less complex, and less expensive circuitry than would otherwise be required in the apparatus, which may be, as a non-limiting example, a Turbo receiver in a wireless communication device.
    • 在一个或多个方面,本发明通过在某种意义上减少在装置内的组成处理器电路之间传送的软信息的“量”来提高软值处理装置内软信息传送的效率,而不会丧失或以其他方式折中 转移“有价值”的软信息。 在一个示例中,由组成处理器电路产生的软值根据可靠性阈值被识别为可靠或不可靠。 从另一个构成处理器电路的软值信息中省略了一部分或全部不可靠的值,也可以对这些值进行量化。 软信息传输的存储器要求的减少有利地允许使用比设备中另外需要的更低功率,更不复杂和更便宜的电路,其可以作为非限制性示例,无线的Turbo接收器 通讯装置
    • 9. 发明申请
    • Method and Apparatus for Soft Information Transfer between Constituent Processor Circuits in a Soft-Value Processing Apparatus
    • 用于软值处理设备中组成处理器电路之间的软信息传输的方法和装置
    • US20130198591A1
    • 2013-08-01
    • US13358978
    • 2012-01-26
    • Matthias KamufAndres Reial
    • Matthias KamufAndres Reial
    • H03M13/45G06F11/10
    • H04L25/03318H03M13/2957H03M13/6505H03M13/6577H04L1/005H04L1/1861H04L25/03171H04L25/067
    • In one or more aspects, the present invention improves the efficiency of soft information transfer within a soft-value processing apparatus, by reducing in some sense the “amount” of soft information transferred between constituent processor circuits within the apparatus, without forfeiting or otherwise compromising the transfer of “valuable” soft information. In one example, the soft values produced by a constituent processor circuit are identified as being reliable or unreliable according to a reliability threshold. Some or all of the unreliable values are omitted from a soft value information transfer to another constituent processor circuit, or they are quantized for such transfer. The reduction in memory requirements for soft information transfer advantageously allows the use of lower power, less complex, and less expensive circuitry than would otherwise be required in the apparatus, which may be, as a non-limiting example, a Turbo receiver in a wireless communication device.
    • 在一个或多个方面,本发明通过在某种意义上减少在装置内的组成处理器电路之间传送的软信息的“量”来提高软值处理装置内软信息传送的效率,而不会丧失或以其他方式折衷 转移“有价值”的软信息。 在一个示例中,由组成处理器电路产生的软值根据可靠性阈值被识别为可靠或不可靠。 从另一个构成处理器电路的软值信息中省略了一部分或全部不可靠的值,也可以对这些值进行量化。 软信息传输的存储器要求的减少有利地允许使用比设备中另外需要的更低功率,更不复杂和更便宜的电路,其可以作为非限制性示例,无线的Turbo接收器 通讯装置
    • 10. 发明申请
    • Parity Bit Soft Estimation Method and Apparatus
    • 奇偶位软估计方法和装置
    • US20100088578A1
    • 2010-04-08
    • US12245963
    • 2008-10-06
    • Matthias KamufAndres Reial
    • Matthias KamufAndres Reial
    • H03M13/05G06F11/10
    • H04L1/0045H04L1/005H04L25/03318
    • The systematic and parity bits of a symbol are tightly coupled to each other based on the way in which the symbol is encoded. The relationship between the systematic and parity bits can be exploited to improve the accuracy of soft bit estimation for both the systematic bits and parity bits. In one embodiment, a received symbol is processed by demodulating the received symbol to determine an initial soft estimate of each systematic bit and corresponding one or more parity bits in the sequence. The systematic bit sequence is iteratively decoded to revise the soft estimate of the systematic bit. The initial soft estimate of the one or more parity bits associated with each systematic bit is revised based on the revised soft estimate of each systematic bit. The received symbol can be decoded or regenerated based on the revised soft estimate of each systematic bit and corresponding one or more parity bits.
    • 基于符号被编码的方式,符号的系统和奇偶校验位彼此紧密耦合。 可以利用系统和奇偶校验位之间的关系来提高系统位和奇偶校验位的软比特估计的精度。 在一个实施例中,通过对接收到的符号进行解调来处理接收到的符号,以确定序列中每个系统位和对应的一个或多个奇偶校验位的初始软估计。 对系统位序列进行迭代解码,以修正系统位的软估计。 基于每个系统位的修改的软估计,修正与每个系统位相关联的一个或多个奇偶校验位的初始软估计。 可以基于每个系统位的修改的软估计和对应的一个或多个奇偶校验位来解码或再生所接收的符号。