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    • 8. 发明授权
    • Apparatus and method for providing multiple channel clock-data alignment
    • 用于提供多通道时钟数据对准的装置和方法
    • US06173380B2
    • 2001-01-09
    • US09118700
    • 1998-07-16
    • Robert X. JinEric T. WestStephen F. Dreyer
    • Robert X. JinEric T. WestStephen F. Dreyer
    • G06F1300
    • H04L25/14G06F2213/0038H04L7/0008
    • An apparatus and method for aligning any number of multiple parallel channels of data signals according to a single clock is provided. The synchronization process is accomplished through the use of a First-In-First-Out (FIFO) principle and individual storage elements implementing the FIFO principle for each received data channel. Each channel's data signals are read into a corresponding storage element, maintained in order, and read out upon the assertion of read signals in synchronization with a designated single clock signal. The apparatus and method preferably uses indications of data ready to be read from a storage element implementing the FIFO principle and the presence of a master clock signal to activate the reading of the data from the corresponding storage element. Therefore, each data channel is fully aligned with the master clock signal. The clock-data alignment function may be implemented for a 100BASE-T4 receiver.
    • 提供了一种用于根据单个时钟对准任意数量的数据信号的多个并行通道的装置和方法。 通过使用先入先出(FIFO)原理和为每个接收到的数据信道实现FIFO原理的各个存储元件来实现同步过程。 每个通道的数据信号被读入对应的存储元件,按顺序保持,并且在与指定的单个时钟信号同步的断言读出信号时被读出。 该装置和方法优选地使用准备从实现FIFO原理的存储元件读取的数据的指示和主时钟信号的存在,以激活从对应的存储元件读取数据。 因此,每个数据通道与主时钟信号完全对齐。 可以为100BASE-T4接收机实现时钟数据对准功能。