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1. 发明申请

US20130290944A1 METHOD AND APPARATUS FOR RECOMMENDING PRODUCT FEATURES IN A SOFTWARE APPLICATION IN REAL TIME 有权
标题翻译：在实时软件应用中推荐产品特性的方法和装置
公开(公告)号：US20130290944A1
公开(公告)日：2013-10-31
申请号：US13456948
申请日：2012-04-26
申请人： Anand M. Menon , Gaurav Singh , Anuj Mittal
发明人： Anand M. Menon , Gaurav Singh , Anuj Mittal
IPC分类号： G06F9/44
CPC分类号： G06F9/4446 , G06F9/453
摘要： A computer implemented method and apparatus for recommending product features in a software application in real time comprising analyzing an object to detect at least one issue to be addressed in the object; identifying at least one user action taken to address the at least one issue in the object; accessing a recommendations library to find at least one recommendation to address the at least one issue in the object; and displaying the at least one recommendation.
摘要翻译：一种用于在软件应用程序中实时推荐产品特征的计算机实现的方法和装置，包括分析对象以检测对象中至少一个待解决的问题; 识别用于解决对象中的至少一个问题的至少一个用户动作; 访问建议库以找到至少一个解决对象中的至少一个问题的建议; 以及显示所述至少一个推荐。

2. 发明授权

US09262180B2 Method and apparatus for recommending product features in a software application in real time 有权
标题翻译：用于在软件应用中实时推荐产品特征的方法和装置
公开(公告)号：US09262180B2
公开(公告)日：2016-02-16
申请号：US13456948
申请日：2012-04-26
申请人： Anand M. Menon , Gaurav Singh , Anuj Mittal
发明人： Anand M. Menon , Gaurav Singh , Anuj Mittal
IPC分类号： G06F9/44
CPC分类号： G06F9/4446 , G06F9/453
摘要： A computer implemented method and apparatus for recommending product features in a software application in real time comprising analyzing an object to detect at least one issue to be addressed in the object; identifying at least one user action taken to address the at least one issue in the object; accessing a recommendations library to find at least one recommendation to address the at least one issue in the object; and displaying the at least one recommendation.
摘要翻译：一种用于在软件应用程序中实时推荐产品特征的计算机实现的方法和装置，包括分析对象以检测对象中至少一个待解决的问题; 识别用于解决对象中的至少一个问题的至少一个用户动作; 访问建议库以找到至少一个解决对象中的至少一个问题的建议; 以及显示所述至少一个推荐。

3. 发明申请

US20110013643A1 ADVANCED TELECOMMUNICATIONS ROUTER AND CROSSBAR SWITCH CONTROLLER 有权
标题翻译：高级电信路由器和交叉开关控制器
公开(公告)号：US20110013643A1
公开(公告)日：2011-01-20
申请号：US12890551
申请日：2010-09-24
申请人： Brian Hang Wai Yang , Kai-Yeung (Sunny) Siu , Mizanur M. Rahman , Wei-Han Lien , Gaurav Singh
发明人： Brian Hang Wai Yang , Kai-Yeung (Sunny) Siu , Mizanur M. Rahman , Wei-Han Lien , Gaurav Singh
IPC分类号： H04L12/56
CPC分类号： H04L49/25 , H04L49/101 , H04L49/3027 , H04L49/3045
摘要： The invention relates to a crossbar switch controller including an input terminal configured to receive a set of service request signals from a set of virtual output queues each comprising a set of packets. The invention also includes a matrix circuit coupled to the input terminal and configured to represent the set of service request signals in the form of a matrix, wherein each service request signal is described by a row position M and a column position N. The invention further includes an output terminal configured to receive a portion of the set of packets during an epoch, an arbiter circuit configured to iteratively scan the matrix during the epoch and issue the set of grant signals to the virtual output queues to determine which service requests are granted, and an arbiter controller configured to initiate the arbiter circuit with an array of non-conflicting matrix elements. Whereby, the arbiter circuit scans the matrix during a first epoch, issues the set of grant signals, allows the set of granted service requests to substantially complete, and if necessary, scans the matrix during subsequent epochs. The invention also relates to a crossbar switch controller including an arbitration pre-processor coupled to the input terminal and the matrix circuit, and configured to represent the set of service request signals in the form of a mapping matrix, and further configured to transform a first mapping position of the service request signal to a second mapping position based, in part, on a mapping algorithm. The invention also includes an arbitration post-processor coupled to the output terminal and the matrix circuit, and further configured to transform the second mapping position of the service request signal back to the first mapping position.
摘要翻译：本发明涉及一种交叉开关控制器，其包括输入端子，该输入端子被配置为从包括一组分组的一组虚拟输出队列接收一组服务请求信号。本发明还包括耦合到输入端并被配置为以矩阵的形式表示服务请求信号集合的矩阵电路，其中每个服务请求信号由行位置M和列位置N描述。本发明进一步包括被配置为在历元期间接收所述一组分组的一部分的输出终端，所述仲裁器电路被配置为在所述时期期间迭代地扫描所述矩阵，并向所述虚拟输出队列发出所述一组授权信号以确定哪些服务请求被授权，以及仲裁器控制器，被配置为使用非冲突矩阵元素的阵列启动仲裁器电路。由此，仲裁器电路在第一纪元期间扫描矩阵，发出授权信号集合，允许一组授权的服务请求基本上完成，并且如果需要，在随后的时期期间扫描矩阵。本发明还涉及一种交叉开关控制器，其包括耦合到输入端和矩阵电路的仲裁预处理器，并且被配置为以映射矩阵的形式表示该组服务请求信号，并且还被配置为将第一部分地基于映射算法将服务请求信号的映射位置映射到第二映射位置。本发明还包括耦合到输出端和矩阵电路的仲裁后处理器，还被配置为将服务请求信号的第二映射位置转换回第一映射位置。

4. 发明申请

US20080320478A1 AGE MATRIX FOR QUEUE DISPATCH ORDER 失效
标题翻译：年龄排序的年龄矩阵
公开(公告)号：US20080320478A1
公开(公告)日：2008-12-25
申请号：US11830727
申请日：2007-07-30
申请人： Gaurav Singh , Srivatsan Srinivasan , Lintsung Wong
发明人： Gaurav Singh , Srivatsan Srinivasan , Lintsung Wong
IPC分类号： G06F9/46
CPC分类号： G06F9/3814 , G06F9/3838
摘要： An apparatus for queue allocation. An embodiment of the apparatus includes a dispatch order data structure, a bit vector, and a queue controller. The dispatch order data structure corresponds to a queue. The dispatch order data structure stores a plurality of dispatch indicators associated with a plurality of pairs of entries of the queue to indicate a write order of the entries in the queue. The bit vector stores a plurality of mask values corresponding to the dispatch indicators of the dispatch order data structure. The queue controller interfaces with the queue and the dispatch order data structure. The queue controller excludes at least some of the entries from a queue operation based on the mask values of the bit vector.
摘要翻译：一种用于队列分配的装置。该装置的实施例包括调度顺序数据结构，位向量和队列控制器。调度订单数据结构对应于一个队列。调度订单数据结构存储与队列的多对条目相关联的多个调度指示符，以指示队列中条目的写入顺序。位向量存储对应于调度顺序数据结构的调度指示符的多个掩码值。队列控制器与队列和调度订单数据结构接口。队列控制器基于位向量的掩码值从队列操作中排除至少一些条目。

5. 发明申请

US20080270774A1 Universal branch identifier for invalidation of speculative instructions 有权
标题翻译：推测说明无效的通用分支标识符
公开(公告)号：US20080270774A1
公开(公告)日：2008-10-30
申请号：US11799293
申请日：2007-04-30
申请人： Gaurav Singh , Srivatsan Srinivasan , Ricardo Ramirez , Wei-Hsiang Chen , Hai Ngoc Nguyen
发明人： Gaurav Singh , Srivatsan Srinivasan , Ricardo Ramirez , Wei-Hsiang Chen , Hai Ngoc Nguyen
IPC分类号： G06F9/30
CPC分类号： G06F9/3842 , G06F9/3861
摘要： A system for speculative branch predictions. An embodiment of the system includes branch prediction logic, fetch logic, and branch identification logic. The branch prediction logic is configured to predict a branch path for a branch in an instruction stream. The fetch logic is coupled to the branch prediction logic. The fetch logic is configured to speculatively fetch an instruction corresponding to the predicted branch path. The branch identification logic is coupled to the branch prediction logic and the fetch logic. The branch identification logic is configured to mark the speculatively fetched instruction with a branch identifier using a universal branch identification format. The universal branch identification format includes a bit value at a bit position corresponding to the predicted branch path.
摘要翻译：投机分支预测系统。该系统的实施例包括分支预测逻辑，提取逻辑和分支识别逻辑。分支预测逻辑被配置为预测指令流中的分支的分支路径。提取逻辑耦合到分支预测逻辑。提取逻辑被配置为推测性地获取与预测的分支路径相对应的指令。分支识别逻辑耦合到分支预测逻辑和提取逻辑。分支识别逻辑被配置为使用通用分支标识格式使用分支标识符标记所推测的获取的指令。通用分支识别格式包括与预测分支路径相对应的比特位置处的比特值。

6. 发明申请

US20050122972A1 Prefix matching structure and method for fast packet switching 失效
标题翻译：用于快速分组交换的前缀匹配结构和方法
公开(公告)号：US20050122972A1
公开(公告)日：2005-06-09
申请号：US10968460
申请日：2004-10-18
申请人： Frederick Gruner , Gaurav Singh , Elango Ganesan , Samir Vora , Christopher Eccles , Brian Wai Yang
发明人： Frederick Gruner , Gaurav Singh , Elango Ganesan , Samir Vora , Christopher Eccles , Brian Wai Yang
IPC分类号： H04L12/28 , H04L12/56 , H04L29/12
CPC分类号： H04L29/12801 , H04L29/12009 , H04L45/00 , H04L45/7457 , H04L61/6004
摘要： A prefix matching apparatus for directing information to a destination port includes a memory configured to store a piece of data including an address and a plurality of levels each including a plurality of memory locations, the levels each representing a unique address space. A controller is coupled to the memory and to the plurality of levels, and is configured to read the data address and to direct the data to the next level associated with a unique address space associated with the data address. In one embodiment, the controller is configured to match the data address prefix to a plurality of addresses associated with the unique address spaces. Advantages of the invention include fast switch decisions and low switch latency.
摘要翻译：用于将信息引导到目的地端口的前缀匹配装置包括被配置为存储包括地址和多个级别的数据的存储器，每个级别包括多个存储器位置，每个级别表示唯一的地址空间。控制器耦合到存储器和多个电平，并且被配置为读取数据地址并将数据引导到与与数据地址相关联的唯一地址空间相关联的下一级。在一个实施例中，控制器被配置为将数据地址前缀匹配到与唯一地址空间相关联的多个地址。本发明的优点包括快速切换决定和低开关等待时间。

7. 发明申请

US20050083839A1 Encoding-based multicast packet duplication control suitable for VLAN systems 有权
标题翻译：基于编码的组播数据包复制控制适用于VLAN系统
公开(公告)号：US20050083839A1
公开(公告)日：2005-04-21
申请号：US10687784
申请日：2003-10-17
申请人： Gaurav Singh , Govind Malalur , Brian Yang
发明人： Gaurav Singh , Govind Malalur , Brian Yang
IPC分类号： H04L1/00 , H04L12/18 , H04L12/46
CPC分类号： H04L12/4641 , H04L12/1886
摘要： A packet duplication control system including an input port for receiving a packet and a plurality of output ports for outputting duplications of the packet is disclosed. The duplications can be suitable to support a Virtual Local Area Network (VLAN) system. The duplications can be controlled by descriptors arranged in a linked-list table. Also, the descriptors can have encoding formats, such as contiguous range encoding, non-contiguous range encoding, and discrete encoding. Further, the linked-list table can include at least one shared descriptor.
摘要翻译：公开了包括用于接收分组的输入端口和用于输出分组的重复的多个输出端口的分组复制控制系统。这些重复可以适用于支持虚拟局域网（VLAN）系统。这些重复可以由排列在链表中的描述符来控制。此外，描述符可以具有编码格式，例如连续范围编码，非连续范围编码和离散编码。此外，链表能够包括至少一个共享描述符。

8. 发明申请

US20140026140A1 METHOD AND APPARATUS FOR OPTIMIZING DOWNLOAD OPERATIONS 有权
标题翻译：用于优化下载操作的方法和装置
公开(公告)号：US20140026140A1
公开(公告)日：2014-01-23
申请号：US13551022
申请日：2012-07-17
申请人： Saurabh Gupta , Gaurav Singh
发明人： Saurabh Gupta , Gaurav Singh
IPC分类号： G06F15/16 , G06F9/50
CPC分类号： G06F9/5027 , G06F11/00 , G06F11/3433 , G06F2209/5011 , G06F2209/5018 , H04L43/0888 , H04L67/06
摘要： A method and apparatus for optimizing downloading operations is disclosed. The method comprises determining a condition for a download speed for a plurality of threads for a file to a computer, wherein each thread is used to download a portion of the file; evaluating a plurality of environmental factors on the computer, wherein evaluating is only performed when the download speed meets a given condition; and performing one of increasing, decreasing, and not changing a number of threads used to perform the download depending on the evaluated plurality of environmental factors.
摘要翻译：公开了一种用于优化下载操作的方法和装置。该方法包括确定用于文件到计算机的多个线程的下载速度的条件，其中每个线程用于下载文件的一部分; 评估计算机上的多个环境因素，其中评估仅在下载速度满足给定条件时执行; 并且根据评估的多个环境因素执行增加，减少和不改变用于执行下载的线程数。

9. 发明授权

US08514873B2 Advanced telecommunications router and crossbar switch controller 有权
标题翻译：先进的电信路由器和交叉开关控制器
公开(公告)号：US08514873B2
公开(公告)日：2013-08-20
申请号：US12890551
申请日：2010-09-24
申请人： Brian Hang Wai Yang , Kai-Yeung (Sunny) Siu , Mizanur M. Rahman , Wei-Han Lien , Gaurav Singh
发明人： Brian Hang Wai Yang , Kai-Yeung (Sunny) Siu , Mizanur M. Rahman , Wei-Han Lien , Gaurav Singh
IPC分类号： H04L12/54
CPC分类号： H04L49/25 , H04L49/101 , H04L49/3027 , H04L49/3045
摘要： An apparatus and method to receive first service request signals and second service request signals from virtual signal queues, to map the virtual signal queues according to a first mapping, to arbitrate the first service request signals in accordance with the first mapping of the virtual signal queues, and to re-map the virtual signal queues according to a second mapping, different from the first mapping, to allow arbitrating of the second service request signals in accordance with the second mapping of the virtual signal queues.
摘要翻译：一种从虚拟信号队列接收第一服务请求信号和第二服务请求信号的装置和方法，以根据第一映射映射虚拟信号队列，以根据虚拟信号队列的第一映射来仲裁第一服务请求信号并且根据与第一映射不同的第二映射来重新映射虚拟信号队列，以允许根据虚拟信号队列的第二映射来仲裁第二服务请求信号。

10. 发明授权

US07797509B2 Systems and methods for utilizing an extended translation look-aside buffer having a hybrid memory structure 失效
标题翻译：用于利用具有混合存储器结构的扩展翻译后备缓冲器的系统和方法
公开(公告)号：US07797509B2
公开(公告)日：2010-09-14
申请号：US11652827
申请日：2007-01-11
申请人： Gaurav Singh , Dave Hass , Daniel Chen
发明人： Gaurav Singh , Dave Hass , Daniel Chen
IPC分类号： G06F12/08
CPC分类号： G06F12/1027 , Y02D10/13
摘要： Extended translation look-aside buffers (eTLB) for converting virtual addresses into physical addresses are presented, the eTLB including, a physical memory address storage having a number of physical addresses, a virtual memory address storage configured to store a number of virtual memory addresses corresponding with the physical addresses, the virtual memory address storage including, a set associative memory structure (SAM), and a content addressable memory (CAM) structure; and comparison circuitry for determining whether a requested address is present in the virtual memory address storage, wherein the eTLB is configured to receive an index register for identifying the SAM structure and the CAM structure, and wherein the eTLB is configured to receive an entry register for providing a virtual page number corresponding with the plurality of virtual memory addresses.
摘要翻译：呈现用于将虚拟地址转换成物理地址的扩展翻译后备缓冲器（eTLB），eTLB包括具有多个物理地址的物理存储器地址存储器，虚拟存储器地址存储器，被配置为存储对应的多个虚拟存储器地址物理地址，虚拟存储器地址存储包括集合关联存储器结构（SAM）和内容可寻址存储器（CAM）结构; 以及用于确定所请求的地址是否存在于所述虚拟存储器地址存储器中的比较电路，其中所述eTLB被配置为接收用于识别所述SAM结构和所述CAM结构的索引寄存器，并且其中所述eTLB被配置为接收用于提供与所述多个虚拟存储器地址对应的虚拟页码。

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