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1. 发明授权

US06720259B2 Passivation method for improved uniformity and repeatability for atomic layer deposition and chemical vapor deposition 失效
标题翻译：用于改善原子层沉积和化学气相沉积的均匀性和重复性的钝化方法
公开(公告)号：US06720259B2
公开(公告)日：2004-04-13
申请号：US10262992
申请日：2002-10-02
申请人： Ana R. Londergan , Sasangan Ramanathan , Jereld Winkler , Thomas E. Seidel
发明人： Ana R. Londergan , Sasangan Ramanathan , Jereld Winkler , Thomas E. Seidel
IPC分类号： H01L2131
CPC分类号： H01L21/02189 , C23C16/4404 , H01L21/02175 , H01L21/3141 , H01L21/31641 , H01L21/31645
摘要： A method to deposit a passivating layer of a first material on an interior reactor surface of a cold or warm wall reactor, in which the first material is non-reactive with one or more precursor used to form a second materials. Subsequently when a film layer is deposited on a substrate by subjecting the substrate to the one or more precursors, in which at least one precursor has a low vapor pressure, uniformity and repeatability is improved by the passivation layer.
摘要翻译：一种将第一材料的钝化层沉积在冷或温壁反应器的内部反应器表面上的方法，其中第一材料与用于形成第二材料的一种或多种前体不反应。随后当通过使衬底经受一种或多种前体（其中至少一种前体具有低蒸气压）将膜层沉积在衬底上时，通过钝化层改善了均匀性和重复性。

2. 发明授权

US07981473B2 Transient enhanced atomic layer deposition 有权
标题翻译：瞬态增强原子层沉积
公开(公告)号：US07981473B2
公开(公告)日：2011-07-19
申请号：US10791334
申请日：2004-03-01
申请人： Gi Youl Kim , Anuranjan Srivastava , Thomas E. Seidel , Ana R. Londergan , Sasangan Ramanathan
发明人： Gi Youl Kim , Anuranjan Srivastava , Thomas E. Seidel , Ana R. Londergan , Sasangan Ramanathan
IPC分类号： C23C16/00
CPC分类号： C23C16/45525 , C23C16/45527
摘要： A process in which a wafer is exposed to a first chemically reactive precursor dose insufficient to result in a maximum saturated ALD deposition rate on the wafer, and then to a second chemically reactive precursor dose, the precursors being distributed in a manner so as to provide substantially uniform film deposition. The second chemically reactive precursor dose may likewise be insufficient to result in a maximum saturated ALD deposition rate on the wafer or, alternatively, sufficient to result in a starved saturating deposition on the wafer. The process may or may not include purges between the precursor exposures, or between one set of exposures and not another.
摘要翻译：其中晶片暴露于第一化学反应性前体剂量的过程不足以导致晶片上的最大饱和ALD沉积速率，然后到达第二化学反应前体剂量，所述前体以如下方式分布：基本均匀的膜沉积。第二化学反应前体剂量同样可能不足以导致晶片上的最大饱和ALD沉积速率，或者替代地，足以导致晶片上的饱和饱和沉积。该过程可以包括或可以不包括在前体曝光之间或在一组曝光之间的清洗，而不是另一组。

3. 发明申请

US20080131601A1 Transient enhanced atomic layer deposition 有权
标题翻译：瞬态增强原子层沉积
公开(公告)号：US20080131601A1
公开(公告)日：2008-06-05
申请号：US10791334
申请日：2004-03-01
申请人： Gi Youl Kim , Anuranjan Srivastava , Thomas E. Seidel , Ana R. Londergan , Sasangan Ramanathan
发明人： Gi Youl Kim , Anuranjan Srivastava , Thomas E. Seidel , Ana R. Londergan , Sasangan Ramanathan
IPC分类号： C23C16/00
CPC分类号： C23C16/45525 , C23C16/45527
摘要： A process in which a wafer is exposed to a first chemically reactive precursor dose insufficient to result in a maximum saturated ALD deposition rate on the wafer, and then to a second chemically reactive precursor dose, the precursors being distributed in a manner so as to provide substantially uniform film deposition. The second chemically reactive precursor dose may likewise be insufficient to result in a maximum saturated ALD deposition rate on the wafer or, alternatively, sufficient to result in a starved saturating deposition on the wafer. The process may or may not include purges between the precursor exposures, or between one set of exposures and not another.
摘要翻译：其中晶片暴露于第一化学反应性前体剂量的过程不足以导致晶片上的最大饱和ALD沉积速率，然后到达第二化学反应前体剂量，所述前体以如下方式分布：基本均匀的膜沉积。第二化学反应前体剂量同样可能不足以导致晶片上的最大饱和ALD沉积速率，或者替代地，足以导致晶片上的饱和饱和沉积。该过程可以包括或可以不包括在前体曝光之间或在一组曝光之间的清洗，而不是另一组。

4. 发明授权

US07164203B1 Methods and procedures for engineering of composite conductive by atomic layer deposition 有权
标题翻译：通过原子层沉积工程复合导电的方法和程序
公开(公告)号：US07164203B1
公开(公告)日：2007-01-16
申请号：US11216750
申请日：2005-08-30
申请人： Ana R. Londergan , Thomas E. Seidel
发明人： Ana R. Londergan , Thomas E. Seidel
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76843 , H01L21/28562 , H01L21/76846 , H01L23/5223 , H01L23/53238 , H01L2924/0002 , Y10S438/957 , H01L2924/00
摘要： A composite film comprised of three layers is formed by ALD on a substrate with a substrate interface surface. A first layer is coupled to the substrate interface surface. The first layer provides adhesion to the substrate interface surface and initiation of layer by layer ALD growth. A second layer is positioned between the first and third layers and provides a conducting diffusion barrier between the substrate and subsequent overlaying film. A third layer has a surface that is configured to provide adhesion and a texture template in preparation for a subsequent overlaying film. The composite engineered barrier structures are applied to interconnect, capacitor and transistor applications.
摘要翻译：由具有基板界面的基板上的ALD形成由三层构成的复合膜。第一层耦合到衬底界面表面。第一层提供对基底界面表面的粘附和逐层起始的ALD生长。第二层位于第一层和第三层之间，并且在衬底和随后的覆盖膜之间提供导电扩散阻挡层。第三层具有被配置为提供粘合的表面和纹理模板以准备随后的覆盖膜。复合工程的阻挡结构应用于互连，电容和晶体管应用。

5. 发明授权

US07183649B1 Methods and procedures for engineering of composite conductive films by atomic layer deposition 有权
标题翻译：通过原子层沉积工程复合导电膜的方法和程序
公开(公告)号：US07183649B1
公开(公告)日：2007-02-27
申请号：US10122643
申请日：2002-04-12
申请人： Ana R. Londergan , Thomas E. Seidel
发明人： Ana R. Londergan , Thomas E. Seidel
IPC分类号： H01L23/532
CPC分类号： H01L21/76843 , H01L21/28562 , H01L21/76846 , H01L23/5223 , H01L23/53238 , H01L2924/0002 , Y10S438/957 , H01L2924/00
摘要： A composite film comprised of three layers is formed by ALD on a substrate with a substrate interface surface. A first layer is coupled to the substrate interface surface. The first layer provides adhesion to the substrate interface surface and initiation of layer by layer ALD growth. A second layer is positioned between the first and third layers and provides a conducting diffusion barrier between the substrate and subsequent overlaying film. A third layer has a surface that is configured to provide adhesion and a texture template in preparation for a subsequent overlaying film. The composite engineered barrier structures are applied to interconnect, capacitor and transistor applications.
摘要翻译：由具有基板界面的基板上的ALD形成由三层构成的复合膜。第一层耦合到衬底界面表面。第一层提供对基底界面表面的粘附和逐层起始的ALD生长。第二层位于第一层和第三层之间，并且在衬底和随后的覆盖膜之间提供导电扩散阻挡层。第三层具有被配置为提供粘合的表面和纹理模板以准备随后的覆盖膜。复合工程的阻挡结构应用于互连，电容和晶体管应用。

6. 发明授权

US07129580B1 Methods and procedures for engineering of composite conductive films by atomic layer deposition 失效
标题翻译：通过原子层沉积工程复合导电膜的方法和程序
公开(公告)号：US07129580B1
公开(公告)日：2006-10-31
申请号：US11216751
申请日：2005-08-30
申请人： Ana R. Londergan , Thomas E. Seidel
发明人： Ana R. Londergan , Thomas E. Seidel
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/28562 , H01L21/28088 , H01L21/76843 , H01L21/76846 , H01L21/82345 , H01L21/823842 , H01L23/53238 , H01L27/0629 , H01L27/0805 , H01L27/0922 , H01L28/75 , H01L2924/0002 , H01L2924/00
摘要： A composite film comprised of three layers is formed by ALD on a substrate with a substrate interface surface. A first layer is coupled to the substrate interface surface. The first layer provides adhesion to the substrate interface surface and initiation of layer by layer ALD growth. A second layer is positioned between the first and third layers and provides a conducting diffusion barrier between the substrate and subsequent overlaying film. A third layer has a surface that is configured to provide adhesion and a texture template in preparation for a subsequent overlaying film. The composite engineered barrier structures are applied to interconnect, capacitor and transistor applications.
摘要翻译：由具有基板界面的基板上的ALD形成由三层构成的复合膜。第一层耦合到衬底界面表面。第一层提供对基底界面表面的粘附和逐层起始的ALD生长。第二层位于第一层和第三层之间，并且在衬底和随后的覆盖膜之间提供导电扩散阻挡层。第三层具有被配置为提供粘合的表面和纹理模板以准备随后的覆盖膜。复合工程的阻挡结构应用于互连，电容和晶体管应用。

7. 发明授权

US06905547B1 Method and apparatus for flexible atomic layer deposition 有权
标题翻译：柔性原子层沉积的方法和装置
公开(公告)号：US06905547B1
公开(公告)日：2005-06-14
申请号：US10175556
申请日：2002-06-17
申请人： Ana R. Londergan , Thomas E. Seidel , Lawrence D. Matthysse , Ed C. Lee
发明人： Ana R. Londergan , Thomas E. Seidel , Lawrence D. Matthysse , Ed C. Lee
IPC分类号： C23C16/00 , C23C16/455
CPC分类号： C23C16/45544 , C23C16/45536 , C23C16/45574 , C23C16/45576
摘要： An apparatus with a processing chamber subjects a substrate to atomic layer deposition and deposits a film layer. The processing chamber includes at least a first gas switching port. A gas switching manifold is coupled to the processing chamber and configured to mix reactants with a neutral carrier gas and provide gas switching functionality for ALD processes. An upstream gas source and pressure setting apparatus is coupled to the gas switching manifold. The upstream gas source and pressure setting apparatus includes at least a first reactant source, a second reactant source and a neutral gas source. Additionally, the upstream gas source and pressure setting apparatus is configured to provide a cascade of continuing, decreasing pressures.
摘要翻译：具有处理室的装置使基板进行原子层沉积并沉积膜层。处理室至少包括第一气体切换口。气体开关歧管联接到处理室并且被配置为将反应物与中性载气混合并为ALD工艺提供气体切换功能。上游气源和压力调节装置联接到气体开关歧管。上游气体源和压力设定装置至少包括第一反应物源，第二反应物源和中性气体源。另外，上游气体源和压力设定装置构造成提供连续的降低压力的级联。

8. 发明申请

US20100219155A1 EQUIPMENT AND METHODS FOR ETCHING OF MEMS 失效
标题翻译：用于蚀刻MEMS的设备和方法
公开(公告)号：US20100219155A1
公开(公告)日：2010-09-02
申请号：US12527864
申请日：2008-02-18
申请人： Khurshid Syed Alam , Evgeni Gousev , Marc Maurice Mignard , David Heald , Ana R. Londergan , Philip Don Floyd
发明人： Khurshid Syed Alam , Evgeni Gousev , Marc Maurice Mignard , David Heald , Ana R. Londergan , Philip Don Floyd
IPC分类号： C23F1/08 , C23F1/00
CPC分类号： H01L21/67069 , B81B2201/047 , B81C1/00531
摘要： Etching equipment and methods are disclosed herein for more efficient etching of sacrificial material from between permanent MEMS structures. An etching head includes an elongate etchant inlet structure, which may be slot-shaped or an elongate distribution of inlet holes. A substrate is supported in proximity to the etching head in a manner that defines a flow path substantially parallel to the substrate face, and permits relative motion for the etching head to scan across the substrate.
摘要翻译：本文公开了蚀刻设备和方法，用于从永久MEMS结构之间更有效地蚀刻牺牲材料。蚀刻头包括细长的蚀刻剂入口结构，其可以是槽形的或入口孔的细长分布。衬底以限定基本上平行于衬底面的流动路径的方式支撑在蚀刻头附近，并且允许蚀刻头相对于衬底扫描的相对运动。

9. 发明授权

US07733552B2 MEMS cavity-coating layers and methods 有权
标题翻译： MEMS空腔涂层及方法
公开(公告)号：US07733552B2
公开(公告)日：2010-06-08
申请号：US11689430
申请日：2007-03-21
申请人： Ana R. Londergan , Bangalore R. Natarajan , Evgeni Gousev , James Randolph Webster , David Heald
发明人： Ana R. Londergan , Bangalore R. Natarajan , Evgeni Gousev , James Randolph Webster , David Heald
IPC分类号： G02F1/00
CPC分类号： G02B26/001 , B81B3/0008 , B81B2201/047
摘要： Devices, methods, and systems comprising a MEMS device, for example, an interferometric modulator, that comprises a cavity in which a layer coats multiple surfaces. The layer is conformal or non-conformal. In some embodiments, the layer is formed by atomic layer deposition (ALD). Preferably, the layer comprises a dielectric material. In some embodiments, the MEMS device also exhibits improved characteristics, such as improved electrical insulation between moving electrodes, reduced stiction, and/or improved mechanical properties.
摘要翻译：包括MEMS器件（例如干涉式调制器）的器件，方法和系统，其包括其中层涂覆多个表面的空腔。该层是保形的或非保形的。在一些实施例中，该层由原子层沉积（ALD）形成。优选地，该层包括电介质材料。在一些实施例中，MEMS器件还表现出改进的特性，例如移动电极之间的改善的电绝缘性，降低的静摩擦力和/或改善的机械性能。

10. 发明申请

US20090324829A1 METHOD AND APPARATUS FOR PROVIDING UNIFORM GAS DELIVERY TO A REACTOR 失效
标题翻译：将均匀气体输送到反应器的方法和装置
公开(公告)号：US20090324829A1
公开(公告)日：2009-12-31
申请号：US12553917
申请日：2009-09-03
申请人： Jeremie J. Dalton , M. Ziaul Karim , Ana R. Londergan
发明人： Jeremie J. Dalton , M. Ziaul Karim , Ana R. Londergan
IPC分类号： C23C16/455
CPC分类号： C23C16/45565 , C23C16/45544 , C23C16/45574
摘要： A gas distribution system for a reactor having at least two distinct gas source orifice arrays displaced from one another along an axis defined by a gas flow direction from the gas source orifice arrays towards a work-piece deposition surface such that at least a lower one of the gas source orifice arrays is located between a higher one of the gas source orifice arrays and the work-piece deposition surface. Orifices in the higher one of the gas source orifice arrays may spaced an average of 0.2-0.8 times a distance between the higher one of the gas source orifice arrays and the work-piece deposition surface, while orifices in the lower one of the gas source orifice arrays may be spaced an average of 0.1-0.4 times a distance between the higher one of the gas source orifice arrays and the work-piece deposition surface.
摘要翻译：一种用于反应器的气体分配系统，具有至少两个不同的气体源孔口阵列，其沿着由气体流动方向限定的轴线相对于工件沉积表面彼此位移，使得至少一个气源孔阵列位于较高的一个气源孔阵列和工件沉积表面之间。较高气体源孔阵列中的孔可以间隔平均距离更高的气源孔阵列和工件沉积表面之间的距离的0.2-0.8倍，而下一个气源中的孔孔阵列可以间隔平均为较高气体源孔阵列和工件沉积表面之间的距离的0.1-0.4倍。

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