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1. 发明申请

US20130057237A1 MULTI-PHASE SWITCHING REGULATOR AND DROOP CIRCUIT THEREFOR 审中-公开
标题翻译：多相开关稳压器及其驱动电路
公开(公告)号：US20130057237A1
公开(公告)日：2013-03-07
申请号：US13226145
申请日：2011-09-06
申请人： An-Tung Chen , Yuan-Wen Hsiao , Yi-Cheng Wan
发明人： An-Tung Chen , Yuan-Wen Hsiao , Yi-Cheng Wan
IPC分类号： G05F1/00 , G05F1/10
CPC分类号： H02M3/1584 , H02M2001/0003
摘要： The present invention discloses a multi-phase switching regulator and a droop circuit therefor. The droop circuit includes: multiple first resistors, which are coupled to corresponding phase nodes respectively to sense current through the phase nodes; a second resistor, which is coupled to the multiple first resistors; an error amplifier circuit, which has an inverting input end and a non-inverting input end, wherein the inverting input end is coupled to the second resistor and an output end of the error amplifier circuit, and the non-inverting input end is coupled to an output node; and a droop capacitor, which is coupled between the second resistor and the output node; wherein the droop circuit provides the droop signal according to a voltage drop across the second resistor or current through the second resistor.
摘要翻译：本发明公开了一种多相开关调节器及其下垂电路。下垂电路包括：多个第一电阻器，其分别耦合到对应的相位节点以感测通过相位节点的电流; 第二电阻器，其耦合到所述多个第一电阻器; 误差放大器电路，其具有反相输入端和非反相输入端，其中反相输入端耦合到第二电阻器和误差放大器电路的输出端，并且非反相输入端耦合到输出节点; 以及下降电容器，其耦合在所述第二电阻器和所述输出节点之间; 其中所述下降电路根据所述第二电阻器上的电压降或通过所述第二电阻器的电流来提供所述下降信号。

2. 发明申请

US20140021929A1 MULTI-PHASE SWITCHING REGULATOR AND DROOP CIRCUIT THEREFOR 有权
标题翻译：多相开关稳压器及其驱动电路
公开(公告)号：US20140021929A1
公开(公告)日：2014-01-23
申请号：US13938154
申请日：2013-07-09
申请人： Yu-Ta Lin , Jian-Rong Huang , Yi-Cheng Wan , Chien-Hui Wang , Yuan-Wen Hsiao
发明人： Yu-Ta Lin , Jian-Rong Huang , Yi-Cheng Wan , Chien-Hui Wang , Yuan-Wen Hsiao
IPC分类号： G05F1/10
CPC分类号： G05F1/10 , H02M3/1584 , H02M2001/0009
摘要： The present invention provides a multi-phase switching regulator and a droop circuit for use in the multi-phase switching regulator. The multi-phase switching regulator generates pulse width modulation (PWM) signals according to an output voltage and a droop signal, to drive a plurality of switching sets to convert an input voltage to the output voltage. The droop circuit detects the sum of the currents generated by the plurality of switching sets and provides the droop signal which is related to the sum of the currents to the multi-phase switching regulator. The droop signal can be used for over current protection (OCP) or for the droop control.
摘要翻译：本发明提供一种用于多相开关调节器的多相开关调节器和下垂电路。多相开关调节器根据输出电压和下降信号产生脉冲宽度调制（PWM）信号，以驱动多个开关组以将输入电压转换为输出电压。下垂电路检测由多个开关组产生的电流的和，并提供与多相开关调节器的电流之和相关的下降信号。下垂信号可用于过流保护（OCP）或下垂控制。

3. 发明授权

US08917077B2 Multi-phase switching regulator and droop circuit therefor 有权
标题翻译：多相开关调节器及其下垂电路
公开(公告)号：US08917077B2
公开(公告)日：2014-12-23
申请号：US13938154
申请日：2013-07-09
申请人： Yu-Ta Lin , Jian-Rong Huang , Yi-Cheng Wan , Chien-Hui Wang , Yuan-Wen Hsiao
发明人： Yu-Ta Lin , Jian-Rong Huang , Yi-Cheng Wan , Chien-Hui Wang , Yuan-Wen Hsiao
IPC分类号： G05F1/00 , G05F1/10
CPC分类号： G05F1/10 , H02M3/1584 , H02M2001/0009
摘要： The present invention provides a multi-phase switching regulator and a droop circuit for use in the multi-phase switching regulator. The multi-phase switching regulator generates pulse width modulation (PWM) signals according to an output voltage and a droop signal, to drive a plurality of switching sets to convert an input voltage to the output voltage. The droop circuit detects the sum of the currents generated by the plurality of switching sets and provides the droop signal which is related to the sum of the currents to the multi-phase switching regulator. The droop signal can be used for over current protection (OCP) or for the droop control.
摘要翻译：本发明提供一种用于多相开关调节器的多相开关调节器和下垂电路。多相开关调节器根据输出电压和下降信号产生脉冲宽度调制（PWM）信号，以驱动多个开关组以将输入电压转换为输出电压。下垂电路检测由多个开关组产生的电流的和，并提供与多相开关调节器的电流之和相关的下降信号。下垂信号可用于过流保护（OCP）或下垂控制。

4. 发明授权

US07479698B2 Bonding pad structure disposed in semiconductor device and related method 有权
标题翻译：配置在半导体器件中的接合焊盘结构及相关方法
公开(公告)号：US07479698B2
公开(公告)日：2009-01-20
申请号：US11753567
申请日：2007-05-24
申请人： Ming-Dou Ker , Yuan-Wen Hsiao , Yuh-Kuang Tseng
发明人： Ming-Dou Ker , Yuan-Wen Hsiao , Yuh-Kuang Tseng
IPC分类号： H01L23/48
CPC分类号： H01L23/5227 , H01L24/03 , H01L24/05 , H01L24/48 , H01L2224/04042 , H01L2224/05553 , H01L2224/05556 , H01L2224/05599 , H01L2224/48463 , H01L2224/85399 , H01L2924/00014 , H01L2924/19042 , H01L2924/30105 , H01L2924/30107 , H01L2224/45099
摘要： The present invention discloses a bonding pad structure disposed in a semiconductor device and a method for forming the bonding pad structure. The semiconductor device includes a substrate. The bonding pad structure includes a connection structure and an induction structure. The connection structure allows for a direct connection with a bonding wire. The induction structure is coupled with the connection structure and lowers an effective capacitance between the bonding wire and the substrate.
摘要翻译：本发明公开了一种设置在半导体器件中的焊盘结构和形成焊盘结构的方法。半导体器件包括衬底。接合焊盘结构包括连接结构和感应结构。连接结构允许与接合线的直接连接。感应结构与连接结构耦合，降低了接合线和基片之间的有效电容。

5. 发明申请

US20080290457A1 BONDING PAD STRUCTURE DISPOSED IN SEMICONDUCTOR DEVICE AND RELATED METHOD 有权
标题翻译：在半导体器件中处理的贴片结构和相关方法
公开(公告)号：US20080290457A1
公开(公告)日：2008-11-27
申请号：US11753567
申请日：2007-05-24
申请人： Ming-Dou Ker , Yuan-Wen Hsiao , Yuh-Kuang Tseng
发明人： Ming-Dou Ker , Yuan-Wen Hsiao , Yuh-Kuang Tseng
IPC分类号： H01L23/482 , H01L21/44
CPC分类号： H01L23/5227 , H01L24/03 , H01L24/05 , H01L24/48 , H01L2224/04042 , H01L2224/05553 , H01L2224/05556 , H01L2224/05599 , H01L2224/48463 , H01L2224/85399 , H01L2924/00014 , H01L2924/19042 , H01L2924/30105 , H01L2924/30107 , H01L2224/45099
摘要： The present invention discloses a bonding pad structure disposed in a semiconductor device and a method for forming the bonding pad structure. The semiconductor device includes a substrate. The bonding pad structure includes a connection structure and an induction structure. The connection structure allows for a direct connection with a bonding wire. The induction structure is coupled with the connection structure and lowers an effective capacitance between the bonding wire and the substrate.
摘要翻译：本发明公开了一种设置在半导体器件中的焊盘结构和形成焊盘结构的方法。半导体器件包括衬底。接合焊盘结构包括连接结构和感应结构。连接结构允许与接合线的直接连接。感应结构与连接结构耦合，降低了接合线和基片之间的有效电容。

6. 发明授权

US07974053B2 ESD protection circuit for differential I/O pair 有权
标题翻译：差分I / O对的ESD保护电路
公开(公告)号：US07974053B2
公开(公告)日：2011-07-05
申请号：US12129230
申请日：2008-05-29
申请人： Ming-Dou Ker , Yuan-Wen Hsiao , Hsin-Chin Jiang
发明人： Ming-Dou Ker , Yuan-Wen Hsiao , Hsin-Chin Jiang
IPC分类号： H02H9/00 , H02H3/20 , H02H9/04
CPC分类号： H01L27/0251 , H03F1/523 , H03F3/45183
摘要： An ESD protection circuit for a differential I/O pair is provided. The circuit includes an ESD detection circuit, a discharge device, and four diodes. The first diode is coupled between the first I/O pin and the discharge device in a forward direction toward the discharge device. The second diode is coupled between the second I/O pin and the discharge device in a forward direction toward the second I/O pin. The third diode is coupled between the discharge device and the positive power line in a forward direction toward the positive power line. The fourth diode is coupled between the discharge device and the negative power line in a forward direction toward the discharge device. Via an output end, the ESD detection circuit triggers the discharge device during ESD events.
摘要翻译：提供了用于差分I / O对的ESD保护电路。该电路包括ESD检测电路，放电装置和四个二极管。第一二极管在朝向放电装置的正向方向上在第一I / O引脚和放电装置之间耦合。第二二极管在第二I / O引脚和放电装置之间朝向第二I / O引脚向前方连接。第三二极管朝着正电力线向前方连接在放电装置和正电力线之间。第四二极管在放电装置和负电源线之间朝向放电装置向前方连接。通过输出端，ESD检测电路在ESD事件期间触发放电装置。

7. 发明申请

US20090021872A1 ESD protection circuit with active triggering 有权
标题翻译：具有主动触发的ESD保护电路
公开(公告)号：US20090021872A1
公开(公告)日：2009-01-22
申请号：US11826634
申请日：2007-07-17
申请人： Ming-Dou Ker , Yuan-Wen Hsiao , Ryan Hsin-Chin Jiang
发明人： Ming-Dou Ker , Yuan-Wen Hsiao , Ryan Hsin-Chin Jiang
IPC分类号： H02H3/22
CPC分类号： H01L27/0266 , H01L2924/0002 , H01L2924/00
摘要： An ESD protection circuit is provided. The circuit includes a discharging component, a diode, and an ESD detection circuit. The discharging component is coupled between an input/output pad and a first power line of an IC. The diode is coupled between the input/output pad and a second power line of the IC in a forward direction toward the second power line. The ESD detection circuit includes a capacitor, a resistor, and a triggering component. The capacitor and the resistor are formed in series and coupled between the first power line and the second power line. The triggering component has a positive power end coupled to the input/output pad and a negative power end coupled to the first power line. An input of the triggering component is coupled to a node between the capacitor and the resistor.
摘要翻译：提供ESD保护电路。电路包括放电元件，二极管和ESD检测电路。放电元件耦合在IC的输入/输出焊盘和第一电源线之间。所述二极管在所述输入/输出焊盘和所述IC的第二电源线之间朝向所述第二电力线向前方连接。 ESD检测电路包括电容器，电阻器和触发部件。电容器和电阻器串联形成并耦合在第一电源线和第二电源线之间。触发组件具有耦合到输入/输出焊盘的正功率端和耦合到第一电源线的负功率端。触发元件的输入耦合到电容器和电阻器之间的节点。

8. 发明授权

US07880195B2 Electrostatic discharge protection device and related circuit 有权
标题翻译：静电放电保护装置及相关电路
公开(公告)号：US07880195B2
公开(公告)日：2011-02-01
申请号：US12329636
申请日：2008-12-08
申请人： Ming-Dou Ker , Yuan-Wen Hsiao , Chang-Tzu Wang
发明人： Ming-Dou Ker , Yuan-Wen Hsiao , Chang-Tzu Wang
IPC分类号： H01L29/66
CPC分类号： H01L27/0262
摘要： An ESD protection device comprises a P-type substrate, a first substrate-triggered silicon controlled rectifiers (STSCR) disposed in the P-type substrate and a second STSCR disposed in the P-type substrate. The first STSCR comprises a first N-well, a first P-well, a first N+ diffusion region, a first P+ diffusion region, and a first trigger node. The second STSCR comprises a second N-well electrically connected to the first N-well, a second P-well electrically connected to the first P-well, a second N+ diffusion region electrically connected to the first P+ diffusion region, a second P+ diffusion region electrically connected to the first N+ diffusion region, and a second trigger node. A layout area of an integrated circuit and a pin-to-pin ESD current path can be reduced.
摘要翻译： ESD保护装置包括P型衬底，设置在P型衬底中的第一衬底触发的可控硅整流器（STSCR）和设置在P型衬底中的第二STSCR。第一STSCR包括第一N阱，第一P阱，第一N +扩散区，第一P +扩散区和第一触发节点。第二STSCR包括电连接到第一N阱的第二N阱，电连接到第一P阱的第二P阱，电连接到第一P +扩散区的第二N +扩散区，第二P +扩散电连接到第一N +扩散区域的区域和第二触发器节点。可以减小集成电路的布局区域和引脚到针脚ESD电流路径。

9. 发明申请

US20100140659A1 ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND RELATED CIRCUIT 有权
标题翻译：静电放电保护装置及相关电路
公开(公告)号：US20100140659A1
公开(公告)日：2010-06-10
申请号：US12329636
申请日：2008-12-08
申请人： Ming-Dou Ker , Yuan-Wen Hsiao , Chang-Tzu Wang
发明人： Ming-Dou Ker , Yuan-Wen Hsiao , Chang-Tzu Wang
IPC分类号： H01L29/74
CPC分类号： H01L27/0262
摘要： An ESD protection device comprises a P-type substrate, a first substrate-triggered silicon controlled rectifiers (STSCR) disposed in the P-type substrate and a second STSCR disposed in the P-type substrate. The first STSCR comprises a first N-well, a first P-well, a first N+ diffusion region, a first P+ diffusion region, and a first trigger node. The second STSCR comprises a second N-well electrically connected to the first N-well, a second P-well electrically connected to the first P-well, a second N+ diffusion region electrically connected to the first P+ diffusion region, a second P+ diffusion region electrically connected to the first N+ diffusion region, and a second trigger node. A layout area of an integrated circuit and a pin-to-pin ESD current path can be reduced.
摘要翻译： ESD保护装置包括P型衬底，设置在P型衬底中的第一衬底触发的可控硅整流器（STSCR）和设置在P型衬底中的第二STSCR。第一STSCR包括第一N阱，第一P阱，第一N +扩散区，第一P +扩散区和第一触发节点。第二STSCR包括电连接到第一N阱的第二N阱，电连接到第一P阱的第二P阱，电连接到第一P +扩散区的第二N +扩散区，第二P +扩散电连接到第一N +扩散区域的区域和第二触发器节点。可以减小集成电路的布局区域和引脚到针脚ESD电流路径。

10. 发明授权

US07889470B2 ESD protection circuit with active triggering 有权
标题翻译：具有主动触发的ESD保护电路
公开(公告)号：US07889470B2
公开(公告)日：2011-02-15
申请号：US12656495
申请日：2010-02-01
申请人： Ming-Dou Ker , Yuan-Wen Hsiao , Ryan Hsin-Chin Jiang
发明人： Ming-Dou Ker , Yuan-Wen Hsiao , Ryan Hsin-Chin Jiang
IPC分类号： H02H9/00
CPC分类号： H01L27/0266 , H01L2924/0002 , H01L2924/00
摘要： An ESD protection circuit is provided. The circuit includes a discharging component, a diode, and an ESD detection circuit. The discharging component is coupled between an input/output pad and a first power line of an IC. The diode is coupled between the input/output pad and a second power line of the IC in a forward direction toward the second power line. The ESD detection circuit includes a capacitor, a resistor, and a triggering component. The capacitor and the resistor are formed in series and coupled between the first power line and the second power line. The triggering component has a positive power end coupled to the input/output pad and a negative power end coupled to the first power line. An input of the triggering component is coupled to a node between the capacitor and the resistor.
摘要翻译：提供ESD保护电路。电路包括放电元件，二极管和ESD检测电路。放电元件耦合在IC的输入/输出焊盘和第一电源线之间。所述二极管在所述输入/输出焊盘和所述IC的第二电源线之间朝向所述第二电力线向前方连接。 ESD检测电路包括电容器，电阻器和触发部件。电容器和电阻器串联形成并耦合在第一电源线和第二电源线之间。触发组件具有耦合到输入/输出焊盘的正功率端和耦合到第一电源线的负功率端。触发元件的输入耦合到电容器和电阻器之间的节点。

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