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1. 发明申请

US20090015722A1 SIGNAL RECEIVING CIRCUIT ADAPTED FOR MULTIPLE DIGITAL VIDEO/AUDIO TRANSMISSION INTERFACE STANDARDS 有权
标题翻译：适用于多个数字视频/音频传输接口标准的信号接收电路
公开(公告)号：US20090015722A1
公开(公告)日：2009-01-15
申请号：US12128634
申请日：2008-05-29
申请人： An-Ming Lee , Tzu-Chien Tzeng , Yu-Pin Chou , Tzuo-Bo Lin
发明人： An-Ming Lee , Tzu-Chien Tzeng , Yu-Pin Chou , Tzuo-Bo Lin
IPC分类号： H04N5/44
CPC分类号： H04N5/4401 , H04N5/46 , H04N5/765 , H04N21/42615 , H04N21/4305 , H04N21/436 , H04N21/4363
摘要： The invention provides a signal receiving circuit applied to multiple digital video/audio transmission interface standards. The signal receiving circuit includes at least an input interface for receiving an input signal, and at least an interface circuit. The input interface includes a set of shared input terminals, a set of first separate input terminals for receiving an input signal corresponding to a first transmission specification with the set of shared input terminals, and a set of second separate input terminals for receiving an input signal corresponding to a second transmission specification with the set of shared input terminals. The interface circuit includes a control circuit coupled to the input interface for supplying a control signal, and a processing module coupled to the input interface and the control circuit for processing the input signal according to the control signal to generate an output signal.
摘要翻译：本发明提供一种应用于多个数字视频/音频传输接口标准的信号接收电路。信号接收电路至少包括用于接收输入信号的输入接口和至少一个接口电路。输入接口包括一组共享输入端子，一组第一分离输入端子，用于接收与该组共享输入端子对应的第一传输规格的输入信号，以及一组用于接收输入信号的第二单独输入端子对应于具有该组共享输入端的第二传输规范。接口电路包括耦合到用于提供控制信号的输入接口的控制电路，以及耦合到输入接口和控制电路的处理模块，用于根据控制信号处理输入信号以产生输出信号。

2. 发明授权

US07945706B2 Signal receiving circuit adapted for multiple digital video/audio transmission interface standards 有权
标题翻译：信号接收电路适用于多个数字视频/音频传输接口标准
公开(公告)号：US07945706B2
公开(公告)日：2011-05-17
申请号：US12128634
申请日：2008-05-29
申请人： An-Ming Lee , Tzu-Chien Tzeng , Yu-Pin Chou , Tzuo-Bo Lin
发明人： An-Ming Lee , Tzu-Chien Tzeng , Yu-Pin Chou , Tzuo-Bo Lin
IPC分类号： G06F3/00 , G06F13/00
CPC分类号： H04N5/4401 , H04N5/46 , H04N5/765 , H04N21/42615 , H04N21/4305 , H04N21/436 , H04N21/4363
摘要： The invention provides a signal receiving circuit applied to multiple digital video/audio transmission interface standards. The signal receiving circuit includes at least an input interface for receiving an input signal, and at least an interface circuit. The input interface includes a set of shared input terminals, a set of first separate input terminals for receiving an input signal corresponding to a first transmission specification with the set of shared input terminals, and a set of second separate input terminals for receiving an input signal corresponding to a second transmission specification with the set of shared input terminals. The interface circuit includes a control circuit coupled to the input interface for supplying a control signal, and a processing module coupled to the input interface and the control circuit for processing the input signal according to the control signal to generate an output signal.
摘要翻译：本发明提供一种应用于多个数字视频/音频传输接口标准的信号接收电路。信号接收电路至少包括用于接收输入信号的输入接口和至少一个接口电路。输入接口包括一组共享输入端子，一组第一分离输入端子，用于接收与该组共享输入端子对应的第一传输规格的输入信号，以及一组用于接收输入信号的第二单独输入端子对应于具有该组共享输入端的第二传输规范。接口电路包括耦合到用于提供控制信号的输入接口的控制电路，以及耦合到输入接口和控制电路的处理模块，用于根据控制信号处理输入信号以产生输出信号。

3. 发明申请

US20080298504A1 SIGNAL RECEIVING METHOD FOR DETERMINING TRANSMISSION FORMAT OF INPUT SIGNAL AND RELATED SIGNAL RECEIVING CIRCUIT 有权
标题翻译：用于确定输入信号和相关信号接收电路的传输格式的信号接收方法
公开(公告)号：US20080298504A1
公开(公告)日：2008-12-04
申请号：US12125075
申请日：2008-05-22
申请人： An-Ming Lee , Tzu-Chien Tzeng , Yu-Pin Chou , Tzuo-Bo Lin
发明人： An-Ming Lee , Tzu-Chien Tzeng , Yu-Pin Chou , Tzuo-Bo Lin
IPC分类号： H04L27/06
CPC分类号： H04L25/0272 , H04L25/0262
摘要： The present invention discloses a signal receiving method for determining a transmission format of an input signal and a related signal receiving circuit. The signal receiving method includes: receiving the input signal; generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and determining the transmission format of the input signal according to the signal detecting result. The signal receiving circuit includes: an input interface, for receiving an input signal; a detecting module, for generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and a determining unit, for determining the transmission format of the input signal according to the signal detecting result.
摘要翻译：本发明公开了一种用于确定输入信号和相关信号接收电路的传输格式的信号接收方法。信号接收方法包括：接收输入信号; 根据所述信号传输通道的输出结果产生与至少多个信号传输通道的信号传输通道相对应的信号检测结果; 以及根据信号检测结果确定输入信号的传输格式。信号接收电路包括：输入接口，用于接收输入信号; 检测模块，用于根据所述信号传输通道的输出结果产生与至少多个信号传输通道的信号传输通道相对应的信号检测结果; 以及确定单元，用于根据信号检测结果确定输入信号的传输格式。

4. 发明授权

US08180932B2 Signal receiving method for determining transmission format of input signal and related signal receiving circuit 有权
标题翻译：用于确定输入信号和相关信号接收电路的传输格式的信号接收方法
公开(公告)号：US08180932B2
公开(公告)日：2012-05-15
申请号：US12125075
申请日：2008-05-22
申请人： An-Ming Lee , Tzu-Chien Tzeng , Yu-Pin Chou , Tzuo-Bo Lin
发明人： An-Ming Lee , Tzu-Chien Tzeng , Yu-Pin Chou , Tzuo-Bo Lin
IPC分类号： G06F3/00
CPC分类号： H04L25/0272 , H04L25/0262
摘要： The present invention discloses a signal receiving method for determining a transmission format of an input signal and a related signal receiving circuit. The signal receiving method includes: receiving the input signal; generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and determining the transmission format of the input signal according to the signal detecting result. The signal receiving circuit includes: an input interface, for receiving an input signal; a detecting module, for generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and a determining unit, for determining the transmission format of the input signal according to the signal detecting result.
摘要翻译：本发明公开了一种用于确定输入信号和相关信号接收电路的传输格式的信号接收方法。信号接收方法包括：接收输入信号; 根据所述信号传输通道的输出结果产生与至少多个信号传输通道的信号传输通道相对应的信号检测结果; 以及根据信号检测结果确定输入信号的传输格式。信号接收电路包括：输入接口，用于接收输入信号; 检测模块，用于根据所述信号传输通道的输出结果产生与至少多个信号传输通道的信号传输通道相对应的信号检测结果; 以及确定单元，用于根据信号检测结果确定输入信号的传输格式。

5. 发明申请

US20090015319A1 VOLTAGE CONTROLLED OSCILLATION CIRCUIT 审中-公开
标题翻译：电压控制振荡电路
公开(公告)号：US20090015319A1
公开(公告)日：2009-01-15
申请号：US12167952
申请日：2008-07-03
申请人： Tzu-Chien Tzeng
发明人： Tzu-Chien Tzeng
IPC分类号： G05F1/00
CPC分类号： H03K3/03 , H03L7/0995
摘要： The present invention provides a voltage controlled oscillator, which includes an amplifier circuit, an amplifier circuit tail current source, a latch circuit, a latch circuit tail current source, a load resistor, and a current modulation circuit. The amplifier circuit is provided with a first node, and an amplifier circuit tail current source having one end coupled to the first node and the other end coupled to the ground voltage (VGN). The latch circuit is provided with a second node, and a latch circuit tail current source having one end coupled to the second node and the other end coupled to the ground voltage. The load resistor has one end electrically connected to the amplifier circuit and the latch circuit and the other end electrically connected to the power source voltage (Vdd). The current modulation circuit comprises a first PMOS switch, a second PMOS switch and a modulation circuit tail current source, wherein the first PMOS switch is coupled to the first node, the second PMOS switch is coupled to the second node, and the modulation circuit tail current source has one end coupled to the first PMOS switch and the second PMOS switch, and the other end coupled to the power source voltage.
摘要翻译：本发明提供了一种压控振荡器，其包括放大器电路，放大器电路尾电流源，锁存电路，锁存电路尾电流源，负载电阻和电流调制电路。放大器电路设置有第一节点和放大器电路尾部电流源，其一端耦合到第一节点，另一端耦合到接地电压（VGN）。锁存电路设置有第二节点和锁存电路尾电流源，其一端耦合到第二节点，另一端耦合到接地电压。负载电阻器的一端电连接到放大器电路和锁存电路，另一端电连接到电源电压（Vdd）。当前调制电路包括第一PMOS开关，第二PMOS开关和调制电路尾电流源，其中第一PMOS开关耦合到第一节点，第二PMOS开关耦合到第二节点，调制电路尾电流源的一端耦合到第一PMOS开关和第二PMOS开关，另一端耦合到电源电压。

6. 发明申请

US20120235763A1 EQUALIZER AND EQUALIZING METHOD 有权
标题翻译：均衡和均衡方法
公开(公告)号：US20120235763A1
公开(公告)日：2012-09-20
申请号：US13048877
申请日：2011-03-16
申请人： Chao-Cheng Lee , Tzu-Chien Tzeng
发明人： Chao-Cheng Lee , Tzu-Chien Tzeng
IPC分类号： H04B3/04
CPC分类号： H04B3/04 , H04L25/03885
摘要： An equalizer and a related equalizing method for equalizing signal reflection caused by a stub at a transmitting end are provided. The equalizer includes a summing device and a delay device. The summing device is utilized for adding a feedback delay signal to the input signal to generate the equalized signal. The delay device is coupled to the summing device, and utilized for delaying the equalized signal to generate the feedback delay signal. Wherein the delay device has a variable delay time and the variable delay time is a non-integer multiple of a bit time of the input signal.
摘要翻译：提供了均衡器和相关均衡方法，用于均衡由发送端的短截线引起的信号反射。均衡器包括求和装置和延迟装置。求和装置用于将反馈延迟信号添加到输入信号以产生均衡信号。延迟装置耦合到求和装置，用于延迟均衡信号以产生反馈延迟信号。其中延迟装置具有可变的延迟时间，并且可变延迟时间是输入信号的位时间的非整数倍。

7. 发明授权

US08892617B2 Jitter generator for generating jittered clock signal 有权
标题翻译：用于产生抖动时钟信号的抖动发生器
公开(公告)号：US08892617B2
公开(公告)日：2014-11-18
申请号：US12324887
申请日：2008-11-27
申请人： Tzu-Chien Tzeng
发明人： Tzu-Chien Tzeng
IPC分类号： G06F1/04 , G01R31/317 , H03L7/081 , H03L7/099 , H03L7/089
CPC分类号： G06F1/04 , G01R31/31709 , H03L7/0812 , H03L7/0891 , H03L7/0995
摘要： A jitter generator for generating a jittered clock signal, includes a jitter control signal generator and a jittered clock generator. The jitter control signal generator is utilized for selecting a digital control code from a plurality of candidate digital control codes at individual time points and respectively outputting a plurality of selected digital control codes. The jittered clock generator is coupled to the jitter control signal generator, and utilized for generating the jittered clock signal. The jittered clock generator dynamically adjusts the jittered clock signal according to the plurality of different digital control codes.
摘要翻译：用于产生抖动时钟信号的抖动发生器包括抖动控制信号发生器和抖动时钟发生器。抖动控制信号发生器用于在各个时间点从多个候选数字控制码中选择数字控制码，并分别输出多个选择的数字控制码。抖动时钟发生器耦合到抖动控制信号发生器，并用于产生抖动的时钟信号。抖动时钟发生器根据多个不同的数字控制代码动态地调整抖动的时钟信号。

8. 发明授权

US07446595B2 Charge pump circuit with power management 有权
标题翻译：电荷泵电路具有电源管理功能
公开(公告)号：US07446595B2
公开(公告)日：2008-11-04
申请号：US11580828
申请日：2006-10-16
申请人： Chao-Cheng Lee , Tzu-Chien Tzeng
发明人： Chao-Cheng Lee , Tzu-Chien Tzeng
IPC分类号： G05F3/02
CPC分类号： H03L7/0896 , H03L7/0802
摘要： This invention provides a charge pump circuit used in phase-locked loop (PLL) having the function of power management for portable application. According to different applications, power management adjusts the power consumption modes of this PLL that will also correspond to different jitter degree. There are three kinds of modes contained in the PLL: the first mode is normal mode having the larger power consumption and smaller jitter, second mode is low power mode having moderate power consumption and moderate jitter, and third mode is the traditional mode having the smaller power consumption and the larger jitter.
摘要翻译：本发明提供一种具有用于便携式应用的电源管理功能的锁相环（PLL）中的电荷泵电路。根据不同的应用，电源管理调整了该PLL的功耗模式，这也将对应于不同的抖动度。 PLL中包含三种模式：第一种模式是具有较大功耗和较小抖动的正常模式，第二种模式是低功耗模式，具有适度的功耗和适中的抖动，第三种模式是传统模式的较小功耗和抖动较大。

9. 发明授权

US08115535B2 Leakage current suppressing circuit and semiconductor chip 有权
标题翻译：泄漏电流抑制电路和半导体芯片
公开(公告)号：US08115535B2
公开(公告)日：2012-02-14
申请号：US12424675
申请日：2009-04-16
申请人： Tzu-Chien Tzeng , Tay-Her Tsaur , Jian Liu
发明人： Tzu-Chien Tzeng , Tay-Her Tsaur , Jian Liu
IPC分类号： H03K3/01
CPC分类号： H03K19/0008 , H03K19/0016
摘要： A leakage current suppressing circuit includes a bias generating unit and a switch unit. The bias generating unit is adapted to be coupled to a power source and an output terminal, and generates a bias voltage substantially equal to a voltage at the power source when the power source is turned on, and substantially equal to a voltage at the output terminal when the power source is turned off. The switch unit includes a first P-type transistor having a first terminal adapted to be coupled to the power source, a second terminal adapted to be coupled to the output terminal, a gate terminal, and a body terminal coupled to the bias generating unit for receiving the bias voltage therefrom.
摘要翻译：泄漏电流抑制电路包括偏置产生单元和开关单元。偏置产生单元适于耦合到电源和输出端子，并且当电源接通时产生基本上等于电源电压的偏置电压，并且基本上等于输出端子处的电压当电源关闭时。开关单元包括第一P型晶体管，其具有适于耦合到电源的第一端子，适于耦合到输出端子的第二端子，栅极端子和耦合到偏置产生单元的主体端子，用于从其接收偏置电压。

10. 发明申请

US20070262810A1 POWER MANAGING APPARATUS 有权
标题翻译：电源管理设备
公开(公告)号：US20070262810A1
公开(公告)日：2007-11-15
申请号：US11746059
申请日：2007-05-08
申请人： Chao-Cheng Lee , Tzu-Chien Tzeng
发明人： Chao-Cheng Lee , Tzu-Chien Tzeng
IPC分类号： H03K3/01
CPC分类号： H03K19/0016 , H03K2217/0018 , Y10T307/696 , Y10T307/724
摘要： The present invention relates to a power managing apparatus utilized for controlling a first supply voltage, a second supply voltage, and a substrate voltage of a digital circuit. The power managing apparatus includes a voltage generating device, for generating a first reference voltage and a second reference voltage; and a voltage switching device, coupled to the voltage generating device, for adjusting the first supply voltage, the second supply voltage, and the substrate voltage. When the digital circuit operates in a first operating mode, the voltage switching device outputs the second reference voltage to the first supply voltage and the substrate voltage; and when the digital circuit operates in a second operating mode, the voltage switching device outputs the first reference voltage to the first supply voltage, and outputs the second reference voltage to the second supply voltage.
摘要翻译：本发明涉及一种用于控制数字电路的第一电源电压，第二电源电压和基板电压的电源管理装置。电源管理装置包括用于产生第一参考电压和第二参考电压的电压产生装置; 以及耦合到电压产生装置的用于调节第一电源电压，第二电源电压和基板电压的电压切换装置。当数字电路在第一操作模式下工作时，电压切换装置将第二参考电压输出到第一电源电压和基板电压; 并且当数字电路在第二操作模式下工作时，电压切换装置将第一参考电压输出到第一电源电压，并将第二参考电压输出到第二电源电压。

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