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1. 发明授权

US06746952B2 Diffusion barrier layer for semiconductor wafer fabrication 有权
公开(公告)号：US06746952B2
公开(公告)日：2004-06-08
申请号：US09942108
申请日：2001-08-29
申请人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
发明人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
IPC分类号： H01L214763
CPC分类号： H01L21/76843 , H01L21/28562 , H01L23/485 , H01L29/456 , H01L2924/0002 , H01L2924/00
摘要： Diffusion barrier film layers and methods of manufacture and use are provided. The films comprise boron-doped TiCl4-based titanium nitride, and provide an improved diffusion barrier having good adhesive, electrical conductivity, and anti-diffusion properties. The films can be formed on a silicon substrate without an underlying contact layer such as TiSix, an improvement in the fabrication of contacts to shallow junctions and other miniature components of integrated circuits.

2. 发明授权

US06858904B2 High aspect ratio contact structure with reduced silicon consumption 有权
标题翻译：高纵横比接触结构，降低硅消耗
公开(公告)号：US06858904B2
公开(公告)日：2005-02-22
申请号：US09944903
申请日：2001-08-30
申请人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
发明人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
IPC分类号： H01L21/285 , H01L21/4763 , H01L21/768 , H01L29/45 , H01L29/76 , H01L23/48 , H01L23/52 , H01L29/40 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L21/76846 , H01L21/28518 , H01L21/28556 , H01L21/76843 , H01L21/76855 , H01L21/76868 , H01L21/76877 , H01L29/456
摘要： A high aspect ratio contact structure formed over a junction region in a silicon substrate comprises a titanium interspersed with titanium silicide layer that is deposited in the contact opening and directly contacts an upper surface of the substrate. Silicon-doping of CVD titanium, from the addition of SiH4 during deposition, reduces consumption of substrate silicon during the subsequent silicidation reaction in which the titanium reacts with silicon to form a titanium silicide layer that provides low resistance electrical contacts between the junction region and the silicon substrate. The contact structure further comprises a titanium nitride contact fill that is deposited in the contact opening and fills substantially the entire contact opening.
摘要翻译：形成在硅衬底的接合区域上的高纵横比接触结构包括散布有硅化钛层的钛，其沉积在接触开口中并直接接触衬底的上表面。在沉积期间从添加SiH 4中掺杂CVD钛的Si掺杂减少了在随后的硅化反应期间底物硅的消耗，其中钛与硅反应形成硅化钛层，其在接合区域和接合区域之间提供低电阻电接触硅衬底。接触结构还包括氮化钛接触填料，其沉积在接触开口中并基本上填充整个接触开口。

3. 发明申请

US20050032361A1 High aspect ratio contact structure with reduced silicon consumption 失效
公开(公告)号：US20050032361A1
公开(公告)日：2005-02-10
申请号：US10931854
申请日：2004-09-01
申请人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
发明人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
IPC分类号： H01L21/285 , H01L21/4763 , H01L21/768 , H01L29/45 , H01L21/44
CPC分类号： H01L21/76846 , H01L21/28518 , H01L21/28556 , H01L21/76843 , H01L21/76855 , H01L21/76868 , H01L21/76877 , H01L29/456
摘要： A high aspect ratio contact structure formed over a junction region in a silicon substrate comprises a titanium interspersed with titanium silicide layer that is deposited in the contact opening and directly contacts an upper surface of the substrate. Silicon-doping of CVD titanium, from the addition of SiH4 during deposition, reduces consumption of substrate silicon during the subsequent silicidation reaction in which the titanium reacts with silicon to form a titanium silicide layer that provides low resistance electrical contacts between the junction region and the silicon substrate. The contact structure further comprises a titanium nitride contact fill that is deposited in the contact opening and fills substantially the entire contact opening.

4. 发明授权

US07402512B2 High aspect ratio contact structure with reduced silicon consumption 有权
标题翻译：高纵横比接触结构，降低硅消耗
公开(公告)号：US07402512B2
公开(公告)日：2008-07-22
申请号：US11153091
申请日：2005-06-15
申请人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
发明人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
IPC分类号： H01L21/4763
CPC分类号： H01L21/76846 , H01L21/28518 , H01L21/28556 , H01L21/76843 , H01L21/76855 , H01L21/76868 , H01L21/76877 , H01L29/456
摘要： A high aspect ratio contact structure formed over a junction region in a silicon substrate comprises a titanium interspersed with titanium silicide layer that is deposited in the contact opening and directly contacts an upper surface of the substrate. Silicon-doping of CVD titanium, from the addition of SiH4 during deposition, reduces consumption of substrate silicon during the subsequent silicidation reaction in which the titanium reacts with silicon to form a titanium silicide layer that provides low resistance electrical contacts between the junction region and the silicon substrate. The contact structure further comprises a titanium nitride contact fill that is deposited in the contact opening and fills substantially the entire contact opening.
摘要翻译：形成在硅衬底的接合区域上的高纵横比接触结构包括散布有硅化钛层的钛，其沉积在接触开口中并直接接触衬底的上表面。在沉积期间从SiH 4 Si的添加中CVD钛的掺杂减少了在随后的硅化反应期间底物硅的消耗，其中钛与硅反应形成提供低电阻的硅化钛层接合区域和硅衬底之间的电接触。接触结构还包括氮化钛接触填料，其沉积在接触开口中并基本上填充整个接触开口。

5. 发明申请

US20050233577A1 High aspect ratio contact structure with reduced silicon consumption 有权
公开(公告)号：US20050233577A1
公开(公告)日：2005-10-20
申请号：US11153091
申请日：2005-06-15
申请人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
发明人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
IPC分类号： H01L21/285 , H01L21/4763 , H01L21/768 , H01L29/45
CPC分类号： H01L21/76846 , H01L21/28518 , H01L21/28556 , H01L21/76843 , H01L21/76855 , H01L21/76868 , H01L21/76877 , H01L29/456
摘要： A high aspect ratio contact structure formed over a junction region in a silicon substrate comprises a titanium interspersed with titanium silicide layer that is deposited in the contact opening and directly contacts an upper surface of the substrate. Silicon-doping of CVD titanium, from the addition of SiH4 during deposition, reduces consumption of substrate silicon during the subsequent silicidation reaction in which the titanium reacts with silicon to form a titanium silicide layer that provides low resistance electrical contacts between the junction region and the silicon substrate. The contact structure further comprises a titanium nitride contact fill that is deposited in the contact opening and fills substantially the entire contact opening.

6. 发明授权

US06908849B2 High aspect ratio contact structure with reduced silicon consumption 失效
标题翻译：高纵横比接触结构，降低硅消耗
公开(公告)号：US06908849B2
公开(公告)日：2005-06-21
申请号：US10931854
申请日：2004-09-01
申请人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
发明人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
IPC分类号： H01L21/285 , H01L21/4763 , H01L21/768 , H01L29/45
CPC分类号： H01L21/76846 , H01L21/28518 , H01L21/28556 , H01L21/76843 , H01L21/76855 , H01L21/76868 , H01L21/76877 , H01L29/456
摘要： A high aspect ratio contact structure formed over a junction region in a silicon substrate comprises a titanium interspersed with titanium silicide layer that is deposited in the contact opening and directly contacts an upper surface of the substrate. Silicon-doping of CVD titanium, from the addition of SiH4 during deposition, reduces consumption of substrate silicon during the subsequent silicidation reaction in which the titanium reacts with silicon to form a titanium silicide layer that provides low resistance electrical contacts between the junction region and the silicon substrate. The contact structure further comprises a titanium nitride contact fill that is deposited in the contact opening and fills substantially the entire contact opening.
摘要翻译：形成在硅衬底的接合区域上的高纵横比接触结构包括散布有硅化钛层的钛，其沉积在接触开口中并直接接触衬底的上表面。在沉积期间从SiH 4 Si的添加中CVD钛的掺杂减少了在随后的硅化反应期间底物硅的消耗，其中钛与硅反应形成提供低电阻的硅化钛层接合区域和硅衬底之间的电接触。接触结构还包括氮化钛接触填料，其沉积在接触开口中并基本上填充整个接触开口。

7. 发明授权

US06822299B2 Boron-doped titanium nitride layer for high aspect ratio semiconductor devices 有权
标题翻译：用于高纵横比半导体器件的硼掺杂氮化钛层
公开(公告)号：US06822299B2
公开(公告)日：2004-11-23
申请号：US10287203
申请日：2002-11-04
申请人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
发明人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
IPC分类号： H01L2976
CPC分类号： H01L21/28556 , H01L21/76877 , H01L23/485 , H01L2924/0002 , H01L2924/00
摘要： Conductive contacts in a semiconductor structure, and methods for forming the conductive components are provided. The contacts are useful for providing electrical connection to active components beneath an insulation layer in integrated circuits such as memory devices. The conductive contacts comprise boron-doped TiCl4-based titanium nitride, and possess a sufficient level adhesion to the insulative layer to eliminate peeling from the sidewalls of the contact opening and cracking of the insulative layer when formed to a thickness of greater than about 200 angstroms.
摘要翻译：提供半导体结构中的导电接触，以及形成导电部件的方法。触点可用于在诸如存储器件的集成电路中的绝缘层下方的有源部件提供电连接。导电触点包括硼掺杂的TiCl 4基氮化钛，并且具有与绝缘层的足够水平的粘合性，以便当形成为大于约200埃的厚度时，消除从接触开口的侧壁的剥离和绝缘层的破裂。

8. 发明授权

US06791149B2 Diffusion barrier layer for semiconductor wafer fabrication 有权
标题翻译：用于半导体晶片制造的扩散阻挡层
公开(公告)号：US06791149B2
公开(公告)日：2004-09-14
申请号：US10287569
申请日：2002-11-04
申请人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
发明人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
IPC分类号： H01L2976
CPC分类号： H01L21/76843 , H01L21/28562 , H01L23/485 , H01L29/456 , H01L2924/0002 , H01L2924/00
摘要： Diffusion barrier film layers and methods of manufacture and use are provided. The films comprise boron-doped TiCl4-based titanium nitride, and provide an improved diffusion barrier having good adhesive, electrical conductivity, and anti-diffusion properties. The films can be formed on a silicon substrate without an underlying contact layer such as TiSix, an improvement in the fabrication of contacts to shallow junctions and other miniature components of integrated circuits.
摘要翻译：提供了扩散阻挡膜层及其制造和使用方法。这些膜包括掺杂硼的TiCl 4基氮化钛，并且提供具有良好粘合剂，导电性和抗扩散性能的改进的扩散阻挡层。这些膜可以形成在硅衬底上，而没有诸如TiSix的下面的接触层，对于浅接点的接触和集成电路的其它微型部件的制造的改进。

9. 发明授权

US06696368B2 Titanium boronitride layer for high aspect ratio semiconductor devices 有权
标题翻译：用于高纵横比半导体器件的硼氮化钛层
公开(公告)号：US06696368B2
公开(公告)日：2004-02-24
申请号：US09918919
申请日：2001-07-31
申请人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
发明人： Ammar Derraa , Sujit Sharan , Paul Castrovillo
IPC分类号： H01L2131
CPC分类号： H01L21/28556 , H01L21/76877 , H01L23/485 , H01L2924/0002 , H01L2924/00
摘要： Conductive contacts in a semiconductor structure, and methods for forming the conductive components are provided. The contacts are useful for providing electrical connection to active components beneath an insulation layer in integrated circuits such as memory devices. The conductive contacts comprise boron-doped TiCl4-based titanium nitride, and possess a sufficient level adhesion to the insulative layer to eliminate peeling from the sidewalls of the contact opening and cracking of the insulative layer when formed to a thickness of greater than about 200 angstroms.
摘要翻译：提供半导体结构中的导电接触，以及形成导电部件的方法。触点可用于在诸如存储器件的集成电路中的绝缘层下方的有源部件提供电连接。导电触点包括硼掺杂的TiCl 4基氮化钛，并且具有与绝缘层的足够水平的粘合性，以便当形成为大于约200埃的厚度时，消除从接触开口的侧壁的剥离和绝缘层的破裂。

10. 发明申请

US20070024178A1 Field emission device having insulated column lines and method of manufacture 审中-公开
标题翻译：具有绝缘柱线的场发射装置及其制造方法
公开(公告)号：US20070024178A1
公开(公告)日：2007-02-01
申请号：US11519984
申请日：2006-09-12
申请人： Ammar Derraa
发明人： Ammar Derraa
IPC分类号： H01J63/04
CPC分类号： H01J3/021 , H01J1/3044 , H01J9/185 , H01J29/481 , H01J31/127
摘要： An FED and a method of manufacture are provided. The FED includes a cathode assembly containing an improved column line structure. The column line structure includes a conductive structure formed on a substrate. A resistive layer is formed on the conductive structure, and an insulator layer is formed partly over the resistive layer. The contact between the base of the emitter tips and the addressing column line is achieved through a lateral side that is not covered by the insulator layer. The insulator layer helps reduce the possibility of electrical shorting between the addressing column line and the row line structure of the cathode assembly. The insulator layer on top of the addressing column line will allow the use of a thinner subsequent dielectric layer. This thinner dielectric layer, which supports the grid, will provide a lower RC time constant and help achieve better video rate operation. The thinner dielectric layer also will result in smaller grid openings above the tips. This will provide for better beam spots, and, therefore, better image resolution. The thinner dielectric layer will require less applied voltage to extract electrons from the tips, resulting in lower power consumption for the FED.
摘要翻译：提供FED和制造方法。 FED包括具有改进的柱线结构的阴极组件。列线结构包括形成在基板上的导电结构。在导电结构上形成电阻层，部分地在电阻层上形成绝缘体层。通过未被绝缘体层覆盖的侧面来实现发射极尖端的基极与寻址列线之间的接触。绝缘体层有助于减少寻址列线和阴极组件的行线结构之间的电短路的可能性。在寻址列线顶部的绝缘体层将允许使用更薄的后续介电层。支持电网的这种较薄的介质层将提供较低的RC时间常数，有助于实现更好的视频速率操作。更薄的介电层也将导致尖端上方的较小的栅极开口。这将提供更好的光束点，因此，更好的图像分辨率。更薄的电介质层将需要更少的施加电压以从尖端提取电子，导致FED的较低功耗。

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