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    • 1. 发明授权
    • Digital memory with reset/preset capabilities
    • 具有复位/预设功能的数字存储器
    • US4805149A
    • 1989-02-14
    • US901914
    • 1986-08-28
    • Aloysius TamThomas S. WongDavid WangDavid Naren
    • Aloysius TamThomas S. WongDavid WangDavid Naren
    • G06F12/08G11C7/20G11C11/41G11C11/40
    • G11C7/20
    • A digital memory characterized by a plurality of memory cells arranged into a matrix having rows and columns; a row activation circuit for concurrently activating all of the rows of the matrix; and column activation means for concurrently applying either a reset signal or a preset signal to the columns of the matrix. The column activation circuit can include a plurality of digital switches coupled to reset and preset lines associated with each column of the matrix; and reset/preset logic which control the digital switches to selectively couple the reset and preset lines to a constant current source. A complementary, multi-emitter flip-flop memory cell is formed on a semiconductor substrate and includes "riser" portions.
    • 一种数字存储器,其特征在于布置成具有行和列的矩阵的多个存储单元; 行激活电路,用于同时激活矩阵的所有行; 以及列激活装置,用于同时向矩阵的列应用复位信号或预置信号。 列激活电路可以包括耦合到与矩阵的每列相关联的复位和预设线的多个数字开关; 以及复位/预置逻辑,其控制数字开关以选择性地将复位和预置线耦合到恒定电流源。 互补的多发射极触发器存储单元形成在半导体衬底上并且包括“提升管”部分。