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1. 发明授权

US08380905B2 Isolated communication bus and related protocol 有权
标题翻译：隔离通讯总线及相关协议
公开(公告)号：US08380905B2
公开(公告)日：2013-02-19
申请号：US12800770
申请日：2010-05-21
申请人： Ali Djabbari , Rajaram Subramoniam , Gerard Socci , Kosha Mahmodieh , Ali Kiaei
发明人： Ali Djabbari , Rajaram Subramoniam , Gerard Socci , Kosha Mahmodieh , Ali Kiaei
IPC分类号： G06F13/00 , G06F13/36
CPC分类号： G06F13/4256 , G06F13/4072
摘要： A system includes a master device and multiple slave devices. The system also includes multiple bus interfaces forming a communication bus that couples the master and slave devices. Each bus interface includes a primary interface unit configured to communicate over first and second buses, where the first and second buses form a portion of the communication bus. Each bus interface also includes a secondary interface unit configured to communicate with the primary interface unit and to communicate with one of the slave devices over a third bus. Each bus interface further includes an isolator configured to electrically isolate the primary interface unit and the secondary interface unit. The primary interface unit is configured to receive multiple commands over the first bus, execute a first subset of commands, transmit a second subset of commands over the second bus, and transmit a third subset of commands over the third bus.
摘要翻译：系统包括主设备和多个从设备。该系统还包括形成连接主设备和从设备的通信总线的多个总线接口。每个总线接口包括被配置为通过第一和第二总线通信的主接口单元，其中第一和第二总线形成通信总线的一部分。每个总线接口还包括辅助接口单元，其被配置为与主接口单元通信并且通过第三总线与一个从设备通信。每个总线接口还包括隔离器，其被配置为将主接口单元和次接口单元电隔离。主接口单元被配置为通过第一总线接收多个命令，执行命令的第一子集，通过第二总线发送命令的第二子集，以及通过第三总线发送命令的第三子集。

2. 发明申请

US20110289248A1 Isolated communication bus and related protocol 有权
标题翻译：隔离通讯总线及相关协议
公开(公告)号：US20110289248A1
公开(公告)日：2011-11-24
申请号：US12800770
申请日：2010-05-21
申请人： Ali Djabbari , Rajaram Subramoniam , Gerard Socci , Kosha Mahmodieh , Ali Kiaei
发明人： Ali Djabbari , Rajaram Subramoniam , Gerard Socci , Kosha Mahmodieh , Ali Kiaei
IPC分类号： G06F13/36 , G06F13/00
CPC分类号： G06F13/4256 , G06F13/4072
摘要： A system includes a master device and multiple slave devices. The system also includes multiple bus interfaces forming a communication bus that couples the master and slave devices. Each bus interface includes a primary interface unit configured to communicate over first and second buses, where the first and second buses form a portion of the communication bus. Each bus interface also includes a secondary interface unit configured to communicate with the primary interface unit and to communicate with one of the slave devices over a third bus. Each bus interface further includes an isolator configured to electrically isolate the primary interface unit and the secondary interface unit. The primary interface unit is configured to receive multiple commands over the first bus, execute a first subset of commands, transmit a second subset of commands over the second bus, and transmit a third subset of commands over the third bus.
摘要翻译：系统包括主设备和多个从设备。该系统还包括形成连接主设备和从设备的通信总线的多个总线接口。每个总线接口包括被配置为通过第一和第二总线通信的主接口单元，其中第一和第二总线形成通信总线的一部分。每个总线接口还包括辅助接口单元，其被配置为与主接口单元通信并且通过第三总线与一个从设备通信。每个总线接口还包括隔离器，其被配置为将主接口单元和次接口单元电隔离。主接口单元被配置为通过第一总线接收多个命令，执行命令的第一子集，通过第二总线发送命令的第二子集，以及通过第三总线发送命令的第三子集。

3. 发明授权

US08810068B2 System and method for over-voltage protection of a photovoltaic system with distributed maximum power point tracking 有权
标题翻译：具有分布式最大功率点跟踪的光伏系统的过电压保护系统和方法
公开(公告)号：US08810068B2
公开(公告)日：2014-08-19
申请号：US12762148
申请日：2010-04-16
申请人： Gianpaolo Lisi , Ali Djabbari , Gerard Socci , Andrew Ronald Chemistruck , Rajaram Subramoniam , Jianhui Zhang , Kosha Mahmodieh
发明人： Gianpaolo Lisi , Ali Djabbari , Gerard Socci , Andrew Ronald Chemistruck , Rajaram Subramoniam , Jianhui Zhang , Kosha Mahmodieh
IPC分类号： H02J1/00
CPC分类号： H01L31/02021 , G05F1/67 , H02J3/385 , H02S50/00 , Y02E10/58 , Y10T307/707
摘要： A solar panel array for use in a solar cell power system is provided. The solar panel array includes a string of solar panels and multiple voltage converters. Each voltage converter is coupled to a corresponding solar panel in the string of solar panels. The solar panel array also includes multiple maximum power point tracking (MPPT) controllers. Each MPPT controller is coupled to a corresponding solar panel in the string of solar panels. Each MPPT controller is configured to sense an instantaneous power unbalance between the corresponding solar panel and an inverter.
摘要翻译：提供了一种用于太阳能电池电力系统的太阳能电池板阵列。太阳能电池板阵列包括一串太阳能电池板和多个电压转换器。每个电压转换器耦合到太阳能电池板组中的对应的太阳能电池板。太阳能电池板阵列还包括多个最大功率点跟踪（MPPT）控制器。每个MPPT控制器耦合到一串太阳能电池板中的对应的太阳能电池板。每个MPPT控制器被配置为感测对应的太阳能电池板和逆变器之间的瞬时功率不平衡。

4. 发明申请

US20100327659A1 SYSTEM AND METHOD FOR OVER-VOLTAGE PROTECTION OF A PHOTOVOLTAIC SYSTEM WITH DISTRIBUTED MAXIMUM POWER POINT TRACKING 有权
标题翻译：具有分布最大功率点跟踪的光伏系统的过电压保护的系统和方法
公开(公告)号：US20100327659A1
公开(公告)日：2010-12-30
申请号：US12762148
申请日：2010-04-16
申请人： Gianpaolo Lisi , Ali Djabbari , Gerand Socci , Andrew Ronald Chemistruck , Rajaram Subramoniam , Jianhui Zhang , Kosha Mahmodieh
发明人： Gianpaolo Lisi , Ali Djabbari , Gerand Socci , Andrew Ronald Chemistruck , Rajaram Subramoniam , Jianhui Zhang , Kosha Mahmodieh
IPC分类号： H02M7/42 , H02J3/00
CPC分类号： H01L31/02021 , G05F1/67 , H02J3/385 , H02S50/00 , Y02E10/58 , Y10T307/707
摘要： A solar panel array for use in a solar cell power system is provided. The solar panel array includes a string of solar panels and multiple voltage converters. Each voltage converter is coupled to a corresponding solar panel in the string of solar panels. The solar panel array also includes multiple maximum power point tracking (MPPT) controllers. Each MPPT controller is coupled to a corresponding solar panel in the string of solar panels. Each MPPT controller is configured to sense an instantaneous power unbalance between the corresponding solar panel and an inverter.
摘要翻译：提供了一种用于太阳能电池电力系统的太阳能电池板阵列。太阳能电池板阵列包括一串太阳能电池板和多个电压转换器。每个电压转换器耦合到太阳能电池板组中的对应的太阳能电池板。太阳能电池板阵列还包括多个最大功率点跟踪（MPPT）控制器。每个MPPT控制器耦合到一串太阳能电池板中的对应的太阳能电池板。每个MPPT控制器被配置为感测对应的太阳能电池板和逆变器之间的瞬时功率不平衡。

5. 发明授权

US07352704B1 Method and apparatus for multi-path delay spread detection in wideband CDMA systems 有权
标题翻译：用于宽带CDMA系统中多径延迟扩展检测的方法和装置
公开(公告)号：US07352704B1
公开(公告)日：2008-04-01
申请号：US10651850
申请日：2003-08-29
申请人： Karim Nassiri Toussi , Rajaram Subramoniam , Huoy-Bing Lim , Debarag Banerjee
发明人： Karim Nassiri Toussi , Rajaram Subramoniam , Huoy-Bing Lim , Debarag Banerjee
IPC分类号： H04L12/26
CPC分类号： H04B1/7113 , H04B1/7075 , H04B1/7093 , H04B2201/70701
摘要： A fast, low-complexity detection scheme for determining the delays and gains of different propagation paths (i.e., multi-paths) of a received WCDMA signal. The method utilizes a continuous pilot channel that is scrambled by an known pseudo-random sequence. The received signal is provided to a multi-path searcher that passes the received signal through a matched filter with a specified number of taps. The matched filter correlates the received signal with the pilot channel. The multi-path gain and delay detection is then performed, and the delays and gains are reported for use in the WCDMA system.
摘要翻译：用于确定接收的WCDMA信号的不同传播路径（即，多路径）的延迟和增益的快速，低复杂性检测方案。该方法利用由已知伪随机序列加扰的连续导频信道。接收的信号被提供给多路径搜索器，该多路径搜索器将接收的信号通过具有指定数量的抽头的匹配滤波器。匹配滤波器将接收的信号与导频信道相关联。然后执行多径增益和延迟检测，报告延迟和增益用于WCDMA系统。

6. 发明授权

US06958712B1 Low gate count 3GPP channelization code generator 有权
标题翻译：低门控数量的3GPP信道化码生成器
公开(公告)号：US06958712B1
公开(公告)日：2005-10-25
申请号：US10644125
申请日：2003-08-20
申请人： Rajaram Subramoniam
发明人： Rajaram Subramoniam
IPC分类号： H03M7/00 , H03M7/04 , H04J13/00
CPC分类号： H04J13/10 , H03M7/04
摘要： A channelization code is generated in response to a spreading factor and a code number. The code number is right justified to provide a right-justified code number. The right-justified code number is stored in an eight-bit register. An eight-bit binary counter is arranged to provide a binary count. The binary counter is reset when the binary count reaches a value equal to the spreading factor minus one. A channelization logic circuit is configured to convert the binary count and the stored right-justified code number into the channelization code. According to one example, the channelization logic circuit comprises eight AND gates and eight XOR gates. A channelization code generator circuit may be integrated into an integrated chip that has a small silicon area and low power consumption.
摘要翻译：响应于扩频因子和码号产生信道化码。代码号是正确的，提供一个正确的对齐代码。右对齐的代码号存储在一个8位寄存器中。布置八位二进制计数器以提供二进制计数。当二进制计数达到等于扩频因子减1的值时，二进制计数器复位。信道化逻辑电路被配置为将二进制计数和存储的右对齐码代码转换为信道化码。根据一个示例，信道化逻辑电路包括八个与门和八个异或门。信道化码发生器电路可以集成到具有小的硅面积和低功耗的集成芯片中。

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