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1. 发明授权

US5155067A Packaging for a semiconductor die 失效
标题翻译：半导体芯片封装
公开(公告)号：US5155067A
公开(公告)日：1992-10-13
申请号：US675208
申请日：1991-03-26
申请人： Alan G. Wood , Eugene H. Cloud , Larry D. Kinsman
发明人： Alan G. Wood , Eugene H. Cloud , Larry D. Kinsman
IPC分类号： H01L25/10
CPC分类号： H01L25/105 , H01L2225/1029 , H01L2225/107 , H01L2924/0002 , H01L2924/09701
摘要： Disclosed is a means for packaging a plurality of semiconductor die into one component. Present designs comprise multiple singulated unpackaged die which have been probed, but not rigorously tested for complete functionality and adherence to required operating specifications. The yields of present designs of multi-chip modules (MCMs) are low and functional units are therefore costly. Unlike present designs incorporating multiple die, the inventive design comprises devices which have been singulated, packaged, and thoroughly tested for functionality and adherence to required specifications. A plurality of packaged devices are then received by a housing. The conductive leads of the packaged devices are electrically coupled with pads manufactured into the housing. These pads are enjoined with traces within the housing, which terminate externally to the housing. Input/output leads are then electrically coupled with the traces, or are coupled with the traces as the housing is manufactured. The I/O leads provide means for connection of the housing with the electronic device into which it is installed. A lid received by the housing hermetically seals the packaged die in the housing, and prevents moisture or other contaminants which may impede the proper functionality of the die from entering the housing.
摘要翻译：公开了将多个半导体管芯封装成一个部件的方法。现有设计包括已经被探测的多个单独的未封装的裸片，但是没有经过严格测试以获得完整的功能并遵守所需的操作规范。多芯片模块（MCM）的现有设计的成品率低，因此功能单元成本高昂。不同于当前设计并入多个管芯，本发明的设计包括已被单独化，封装和彻底测试的功能和遵守所需规格的器件。然后，多个封装的装置被壳体接收。封装器件的导电引线与制造在外壳中的焊盘电耦合。这些垫子在壳体内被带有痕迹，该痕迹从壳体外部终止。然后，输入/输出引线与迹线电耦合，或者当制造外壳时与引线耦合。 I / O引线提供用于将外壳与其所安装的电子设备连接的装置。由壳体容纳的盖子将封装的模具密封在壳体中，并且防止可能妨碍模具的正常功能的水分或其它污染物进入壳体。

2. 发明授权

US06555399B1 Double-packaged multichip semiconductor module 失效
标题翻译：双封装多芯片半导体模块
公开(公告)号：US06555399B1
公开(公告)日：2003-04-29
申请号：US08650894
申请日：1996-05-17
申请人： Alan G. Wood , Eugene H. Cloud , Larry D. Kinsman
发明人： Alan G. Wood , Eugene H. Cloud , Larry D. Kinsman
IPC分类号： G01R3126
CPC分类号： H01L25/105 , H01L2225/1029 , H01L2225/107 , H01L2924/0002 , H01L2924/09701 , H01L2924/00
摘要： A method for forming a semiconductor component comprises packaging a plurality of semiconductor die into one component. Present designs comprise multiple unpackaged die which have been probed, but not rigorously tested for complete functionality and adherence to required operating specifications. The yields of present designs of multi-chip modules (MCMs) are low and functional units are therefore costly. Unlike present designs incorporating multiple die, the inventive design comprises devices which have been singularized, packaged, and thoroughly tested for functionality and adherence to required specifications. A plurality of packaged devices are then received by a housing. The conductive leads of the packaged devices are electrically coupled with pads manufactured into the housing. These pads are enjoined with traces within the housing, which terminate externally to the housing. Input/output leads are then electrically coupled with the traces, or are coupled with the traces as the housing is manufactured. The I/O leads provide means for connecting the housing with the electronic device into which it is installed. A lid received by the housing hermetically seals the packaged die in the housing, and prevents moisture or other contaminants which may impede the proper functionality of the die from entering the housing.
摘要翻译：一种用于形成半导体部件的方法包括将多个半导体管芯封装成一个部件。目前的设计包括已被探测的多个未封装的裸片，但没有经过严格测试以完成功能并遵守所需的操作规范。多芯片模块（MCM）的现有设计的成品率低，因此功能单元成本高昂。不同于结合多个管芯的现有设计，本发明的设计包括已被单一化，封装和彻底测试的功能性和遵守所需规格的器件。然后，多个封装的装置被壳体接收。封装器件的导电引线与制造在外壳中的焊盘电耦合。这些垫子在壳体内被带有痕迹，该痕迹从壳体外部终止。然后，输入/输出引线与迹线电耦合，或者当制造外壳时与引线耦合。 I / O引线提供用于将壳体与其所安装的电子设备连接的装置。由壳体容纳的盖子将封装的模具密封在壳体中，并且防止可能妨碍模具的正常功能的水分或其它污染物进入壳体。

3. 发明授权

US07259450B2 Double-packaged multi-chip semiconductor module 失效
标题翻译：双封装多芯片半导体模块
公开(公告)号：US07259450B2
公开(公告)日：2007-08-21
申请号：US10423122
申请日：2003-04-25
申请人： Alan G. Wood , Eugene H. Cloud , Larry D. Kinsman
发明人： Alan G. Wood , Eugene H. Cloud , Larry D. Kinsman
IPC分类号： H01L23/02 , H01L23/12 , H01L23/53 , H01L23/43
CPC分类号： H01L25/105 , H01L2225/1029 , H01L2225/107 , H01L2924/0002 , H01L2924/09701 , H01L2924/00
摘要： A plurality of semiconductor die is packaged into one component. The inventive design comprises devices which have been singularized, packaged and thoroughly tested for functionality and adherence to required specifications. A plurality of packaged devices is then received by a housing. The conductive leads of the packaged devices are electrically coupled with pads manufactured into the housing. These pads are connected to traces within the housing, which terminate externally to the housing. Input/output leads are then electrically coupled with the traces, or are coupled with the traces as the housing is manufactured. The input/output leads provide means for connecting the housing with the electronic device or system into which it is installed. A lid received by the housing hermetically seals the packaged die in the housing, and prevents moisture or other contaminants which may impede the proper functionality of the die from entering the housing.
摘要翻译：将多个半导体管芯封装成一个部件。本发明的设计包括已经被单一化，封装和彻底测试的功能和遵守所需规格的装置。然后，多个封装的装置被壳体接收。封装器件的导电引线与制造在外壳中的焊盘电耦合。这些焊盘连接到壳体内的迹线，外壳上的迹线终止。然后，输入/输出引线与迹线电耦合，或者当制造外壳时与引线耦合。输入/输出引线提供用于将壳体与其所安装的电子设备或系统连接的装置。由壳体容纳的盖子将封装的模具密封在壳体中，并且防止可能妨碍模具的正常功能的水分或其它污染物进入壳体。

4. 发明授权

US07214566B1 Semiconductor device package and method 失效
标题翻译：半导体器件封装及方法
公开(公告)号：US07214566B1
公开(公告)日：2007-05-08
申请号：US09594510
申请日：2000-06-16
申请人： Alan G. Wood , Larry D. Kinsman
发明人： Alan G. Wood , Larry D. Kinsman
IPC分类号： H01L21/66 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L24/94 , H01L23/4985 , H01L24/16 , H01L24/31 , H01L24/45 , H01L24/48 , H01L24/97 , H01L2224/05599 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2224/73253 , H01L2224/85399 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01047 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2224/83 , H01L2924/00012 , H01L2924/013 , H01L2924/01028 , H01L2924/0105 , H01L2924/00013 , H01L2224/43
摘要： A method of making semiconductor device packages includes the steps of attaching a wafer to a dielectric layer, testing semiconductor devices in the wafer, and then dicing the layered assembly. The dielectric layer may be, for example, a flexible tape. The semiconductor devices may be chips containing integrated circuits or memory devices. The dicing operation may be performed by a circular saw or by another suitable apparatus. The chips may be connected to input/output devices, such as ball grid arrays, on the dielectric layer, before the testing and dicing steps. Full wafer testing may be-conducted through the ball grid arrays. A relatively stiff metal sheet may be included in the layered assembly before the testing and dicing steps. The metal material may be used as heat spreaders and/or as electrical ground planes. The chips may be connected to the ball grid arrays by wire bonds or flip chip bumps and vias through the dielectric layer. Alignment of the wafer with respect to the dielectric tape may be accomplished by an optical device or by a magnetic system.
摘要翻译：制造半导体器件封装的方法包括将晶片附着到电介质层，测试晶片中的半导体器件，然后切割层状组件的步骤。介电层可以是例如柔性带。半导体器件可以是包含集成电路或存储器件的芯片。切割操作可以通过圆锯或其他合适的装置进行。在测试和切割步骤之前，芯片可以连接到电介质层上的输入/输出设备，例如球栅阵列。全晶圆测试可以通过球栅阵列进行。在测试和切割步骤之前，可以在分层组件中包括相对硬的金属片。金属材料可以用作散热器和/或电接地平面。芯片可以通过引线键合或倒装芯片凸块和通孔穿过电介质层连接到球栅阵列。晶片相对于介质带的对准可通过光学装置或磁性系统实现。

5. 发明授权

US5342807A Soft bond for semiconductor dies 失效
标题翻译：半导体芯片的软键
公开(公告)号：US5342807A
公开(公告)日：1994-08-30
申请号：US976093
申请日：1992-11-13
申请人： Larry D. Kinsman , Derek J. Gochnour , Alan G. Wood , Warren M. Farnworth
发明人： Larry D. Kinsman , Derek J. Gochnour , Alan G. Wood , Warren M. Farnworth
IPC分类号： G01R1/04 , G01R1/073 , G01R3/00 , G01R31/28 , H01L21/60 , H01L21/66 , H01L21/68 , H01L23/13 , H01L23/498 , H05K3/00 , H05K3/40 , H05K3/42
CPC分类号： G01R1/0466 , G01R1/0483 , G01R31/2893 , H01L21/6835 , H01L22/20 , H01L23/13 , H01L23/49816 , H01L23/49838 , H01L24/85 , H05K3/4007 , G01R1/0735 , G01R3/00 , G01R31/2863 , H01L2224/05554 , H01L2224/16145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45124 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48455 , H01L2224/48472 , H01L2224/49171 , H01L2224/73265 , H01L2224/78313 , H01L2224/85001 , H01L2224/85099 , H01L2224/85203 , H01L2224/85205 , H01L2224/85207 , H01L2224/85214 , H01L2225/06562 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01033 , H01L2924/01082 , H01L2924/12042 , H01L2924/14 , H01L2924/15151 , H01L2924/15153 , H01L2924/15165 , H01L2924/15174 , H01L2924/16195 , H01L2924/20751 , H01L2924/20753 , H05K2201/0133 , H05K2201/0347 , H05K2201/0367 , H05K2201/0394 , H05K2201/09481 , H05K2201/09563 , H05K2203/0307 , H05K2203/0723 , H05K3/0058 , H05K3/0067 , H05K3/423 , Y10S228/904 , Y10T29/49004
摘要： On a semiconductor integrated circuit die, a semipermanent electrical connection is effected by the use of wirebond techniques, in which the parameters of the wirebond are controlled, so that less bonding force retains the leadwires to the bondpads than the attachment strength of the bondpads to the die. The wirebond techniques include attaching leadwires to bondpads on the die, using ultrasonic wedge bonding. The strength of the bond between the leadwires is significantly less than the attachment strength of the bondpads, preferably by a ratio which ensures that the bondpads are not lifted from the die when the leadwires are removed by breaking the bond between the leadwires and the bondpads. Subsequent to testing and burnin, the bond between the leadwires and the bondpads is severed. The die are then removed from the package body and the bondpads may then be attached by conventional means. The technique is useful in providing known good die.
摘要翻译：在半导体集成电路管芯上，通过使用引线接合技术来实现半永久性电连接，其中引线键合的参数被控制，使得较少的结合力将导线保持在粘合垫上，而不是粘合垫的附着强度死。引线接合技术包括使用超声波楔形接合将引线连接到管芯上的焊盘。引线之间的结合强度显着小于粘合垫的附着强度，优选地通过确保当引线通过断开引线和粘合垫之间的键而去除引线时，粘合垫不会从模具上提起的比例。在测试和燃烧之后，引线和焊盘之间的接合被切断。然后将模具从包装体中取出，然后可以通过常规方法将粘合垫连接起来。该技术在提供已知的好的模具中是有用的。

6. 发明授权

US5336649A Removable adhesives for attachment of semiconductor dies 失效
标题翻译：用于连接半导体管芯的可移除粘合剂
公开(公告)号：US5336649A
公开(公告)日：1994-08-09
申请号：US976221
申请日：1992-11-13
申请人： Larry D. Kinsman , Derek J. Gochnour , Alan G. Wood , Warren M. Farnworth
发明人： Larry D. Kinsman , Derek J. Gochnour , Alan G. Wood , Warren M. Farnworth
IPC分类号： G01R1/04 , G01R1/073 , G01R3/00 , G01R31/28 , H01L21/60 , H01L21/66 , H01L21/68 , H01L23/13 , H01L23/498 , H05K3/00 , H05K3/40 , H05K3/42
CPC分类号： G01R1/0466 , G01R1/0483 , G01R31/2893 , H01L21/6835 , H01L22/20 , H01L23/13 , H01L23/49816 , H01L23/49838 , H01L24/85 , H05K3/4007 , G01R1/0735 , G01R3/00 , G01R31/2863 , H01L2224/05554 , H01L2224/16145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45124 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48455 , H01L2224/48472 , H01L2224/49171 , H01L2224/73265 , H01L2224/78313 , H01L2224/85001 , H01L2224/85099 , H01L2224/85203 , H01L2224/85205 , H01L2224/85207 , H01L2224/85214 , H01L2225/06562 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01033 , H01L2924/01082 , H01L2924/12042 , H01L2924/14 , H01L2924/15151 , H01L2924/15153 , H01L2924/15165 , H01L2924/15174 , H01L2924/16195 , H01L2924/20751 , H01L2924/20753 , H05K2201/0133 , H05K2201/0347 , H05K2201/0367 , H05K2201/0394 , H05K2201/09481 , H05K2201/09563 , H05K2203/0307 , H05K2203/0723 , H05K3/0058 , H05K3/0067 , H05K3/423
摘要： In order to provide pretested bare semiconductor integrated circuit die, a temporary mechanical connection is effected by the use of a soluble material. A semipermanent electrical connection is effected, in which the parameters of the connection are controlled, so that the die remains functional subsequent to burnin and test. Subsequent to testing and burnin, the die are removed from the package body. The technique is useful in providing known good die.
摘要翻译：为了提供预先测试的裸半导体集成电路管芯，通过使用可溶性材料实现临时机械连接。进行半永久电连接，其中连接的参数被控制，使得模具在燃烧和测试之后保持功能。在测试和燃烧之后，将模具从包装体中取出。该技术在提供已知的好的模具中是有用的。

7. 发明授权

US6091251A Discrete die burn-in for nonpackaged die 失效
标题翻译：用于非封装模具的离散模具老化
公开(公告)号：US6091251A
公开(公告)日：2000-07-18
申请号：US888448
申请日：1997-07-07
申请人： Alan G. Wood , Tim J. Corbett , Gary L. Chadwick , Chender Huang , Larry D. Kinsman
发明人： Alan G. Wood , Tim J. Corbett , Gary L. Chadwick , Chender Huang , Larry D. Kinsman
IPC分类号： G01R1/04 , G01R1/067 , G01R1/073 , G01R3/00 , G01R31/28 , H01L21/60 , H01L21/66 , H01L21/68 , H01L23/13 , H01L23/498 , H05K3/00 , H05K3/40 , H05K3/42
CPC分类号： G01R31/2893 , G01R1/0466 , G01R1/0483 , H01L21/6835 , H01L22/20 , H01L23/13 , H01L23/49816 , H01L23/49838 , H01L24/80 , H05K3/4007 , G01R3/00 , G01R31/2863 , H01L2224/16145 , H01L2225/06562 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01033 , H01L2924/01075 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/15151 , H01L2924/15174 , H01L2924/15787 , H05K2201/0133 , H05K2201/0347 , H05K2201/0367 , H05K2201/0394 , H05K2201/09481 , H05K2201/09563 , H05K2203/0307 , H05K2203/0723 , H05K3/0058 , H05K3/0067 , H05K3/423
摘要： A reusable burn-in/test fixture for discrete TAB die consists of two halves. The first half of the test fixture contains cavity in which die is inserted. When the two halves are assembled, the fixture establishes electrical contact with the die and with a burn-in oven. The test fixture need not be opened until the burn-in and electrical test are completed. The fixture permits the die to be characterized prior to assembly.
摘要翻译：用于离散TAB模具的可重复使用的老化/测试夹具由两半组成。测试夹具的前半部分包含插入模具的腔体。当组装两个半部时，夹具与模具建立电接触，并与老化烘箱连接。在老化和电气测试完成之前，测试夹具不需要打开。夹具允许在组装之前对模具进行表征。

8. 发明授权

US5302891A Discrete die burn-in for non-packaged die 失效
标题翻译：非包装模具的离散模具老化
公开(公告)号：US5302891A
公开(公告)日：1994-04-12
申请号：US973931
申请日：1992-11-10
申请人： Alan G. Wood , Tim J. Corbett , Gary L. Chadwick , Chender Huang , Larry D. Kinsman
发明人： Alan G. Wood , Tim J. Corbett , Gary L. Chadwick , Chender Huang , Larry D. Kinsman
IPC分类号： G01R1/04 , G01R1/067 , G01R1/073 , G01R3/00 , G01R31/28 , H01L21/60 , H01L21/66 , H01L21/68 , H01L23/13 , H01L23/498 , H05K3/00 , H05K3/40 , H05K3/42 , G01R31/02
CPC分类号： G01R31/2893 , G01R1/0466 , G01R1/0483 , H01L21/6835 , H01L22/20 , H01L23/13 , H01L23/49816 , H01L23/49838 , H01L24/80 , H05K3/4007 , G01R3/00 , G01R31/2863 , H01L2224/16145 , H01L2225/06562 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01033 , H01L2924/01075 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/15151 , H01L2924/15174 , H01L2924/15787 , H05K2201/0133 , H05K2201/0347 , H05K2201/0367 , H05K2201/0394 , H05K2201/09481 , H05K2201/09563 , H05K2203/0307 , H05K2203/0723 , H05K3/0058 , H05K3/0067 , H05K3/423
摘要： A reusable burn-in/test fixture for discrete die consists of two halves. The first half of the test fixture contains cavity in which die is inserted. When the two halves are assembled, the fixture establishes electrical contact with the die and with a burn-in oven. The test fixture need not be opened until the burn-in and electrical test are completed. The fixture permits the die to be characterized prior to assembly.
摘要翻译：用于离散模具的可重复使用的老化/测试夹具由两半组成。测试夹具的前半部分包含插入模具的空腔。当组装两个半部时，夹具与模具建立电接触，并与老化烘箱连接。在老化和电气测试完成之前，测试夹具不需要打开。夹具允许在组装之前对模具进行表征。

9. 发明授权

US06911737B2 Semiconductor device package and method 失效
标题翻译：半导体器件封装及方法
公开(公告)号：US06911737B2
公开(公告)日：2005-06-28
申请号：US09930295
申请日：2001-08-16
申请人： Alan G. Wood , Larry D. Kinsman
发明人： Alan G. Wood , Larry D. Kinsman
IPC分类号： H01L21/60 , H01L23/498 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/94 , H01L23/4985 , H01L24/16 , H01L24/31 , H01L24/45 , H01L24/48 , H01L24/97 , H01L2224/05599 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2224/73253 , H01L2224/85399 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01047 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2224/83 , H01L2924/00012 , H01L2924/013 , H01L2924/01028 , H01L2924/0105 , H01L2924/00013 , H01L2224/43
摘要： A method of making semiconductor device packages includes the steps of attaching a wafer to a dielectric layer, testing semiconductor devices in the wafer, and then dicing the layered assembly. The dielectric layer may be, for example, a flexible tape. The semiconductor devices may be chips containing integrated circuits or memory devices. The dicing operation may be performed by a circular saw or by another suitable apparatus. The chips may be connected to input/output devices, such as ball grid arrays, on the dielectric layer, before the testing and dicing steps. Full wafer testing may be-conducted through the ball grid arrays. A relatively stiff metal sheet may be included in the layered assembly before the testing and dicing steps. The metal material may be used as heat spreaders and/or as electrical ground planes. The chips may be connected to the ball grid arrays by wire bonds or flip chip bumps and vias through the dielectric layer. Alignment of the wafer with respect to the dielectric tape may be accomplished by an optical device or by a magnetic system.
摘要翻译：制造半导体器件封装的方法包括将晶片附着到电介质层，测试晶片中的半导体器件，然后切割层状组件的步骤。介电层可以是例如柔性带。半导体器件可以是包含集成电路或存储器件的芯片。切割操作可以通过圆锯或其他合适的装置进行。在测试和切割步骤之前，芯片可以连接到电介质层上的输入/输出设备，例如球栅阵列。全晶圆测试可以通过球栅阵列进行。在测试和切割步骤之前，可以在分层组件中包括相对硬的金属片。金属材料可以用作散热器和/或电接地平面。芯片可以通过引线键合或倒装芯片凸块和通孔穿过电介质层连接到球栅阵列。晶片相对于介质带的对准可通过光学装置或磁性系统实现。

10. 发明授权

US6091250A Discrete die burn-in for nonpackaged die 失效
公开(公告)号：US6091250A
公开(公告)日：2000-07-18
申请号：US192023
申请日：1994-02-03
申请人： Alan G. Wood , Tim J. Corbett , Gary L. Chadwick , Chender Huang , Larry D. Kinsman
发明人： Alan G. Wood , Tim J. Corbett , Gary L. Chadwick , Chender Huang , Larry D. Kinsman
IPC分类号： G01R1/04 , G01R1/067 , G01R1/073 , G01R3/00 , G01R31/28 , H01L21/60 , H01L21/66 , H01L21/68 , H01L23/13 , H01L23/498 , H05K3/00 , H05K3/40 , H05K3/42
CPC分类号： G01R31/2893 , G01R1/0466 , G01R1/0483 , H01L21/6835 , H01L22/20 , H01L23/13 , H01L23/49816 , H01L23/49838 , H01L24/80 , H05K3/4007 , G01R3/00 , G01R31/2863 , H01L2224/16145 , H01L2225/06562 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01033 , H01L2924/01075 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/15151 , H01L2924/15174 , H01L2924/15787 , H05K2201/0133 , H05K2201/0347 , H05K2201/0367 , H05K2201/0394 , H05K2201/09481 , H05K2201/09563 , H05K2203/0307 , H05K2203/0723 , H05K3/0058 , H05K3/0067 , H05K3/423
摘要： A reusable burn-in/test fixture for discrete TAB die consists of two halves. The first half of the test fixture contains cavity in which die is inserted. When the two halves are assembled, the fixture establishes electrical contact with the die and with a burn-in oven. The test fixture need not be opened until the burn-in and electrical test are completed. The fixture permits the die to be characterized prior to assembly.

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