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1. 发明授权

US07679001B2 Circuit board and method of manufacture thereof 失效
标题翻译：电路板及其制造方法
公开(公告)号：US07679001B2
公开(公告)日：2010-03-16
申请号：US11565715
申请日：2006-12-01
申请人： Alan E. Wang , Kevin C. Olson , Thomas H. DiStefano
发明人： Alan E. Wang , Kevin C. Olson , Thomas H. DiStefano
IPC分类号： H05K1/03
CPC分类号： H05K1/0231 , H01L2224/16225 , H05K1/056 , H05K3/002 , H05K3/0052 , H05K3/44 , H05K3/4641 , H05K3/4644 , H05K2201/0166 , H05K2201/0397 , H05K2201/0909 , H05K2201/0919 , H05K2201/09309 , H05K2201/09554 , H05K2201/10446 , H05K2203/135 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156
摘要： Provided is a method of forming a circuit board including (a) providing a first conductive sheet; (b) selectively removing one or more portions of the first conductive sheet to form a first panel having a first circuit board that is coupled to a disposable part of the first panel by at least one tab that extends from an edge of the first circuit board to an edge of the disposable part of the first panel; (c) applying an insulating coating to the first circuit board so that at least each edge of the first circuit board is covered thereby; and (d) separating the first circuit board from the disposable part in a manner whereupon at least part of the tab remains attached to the first circuit board and includes an exposed edge of the conductive sheet of the first circuit board. Circuit boards formed by the method are also provided.
摘要翻译：提供一种形成电路板的方法，包括：（a）提供第一导电片; （b）选择性地去除所述第一导电片的一个或多个部分以形成具有第一电路板的第一面板，所述第一电路板通过从所述第一电路板的边缘延伸的至少一个接片连接到所述第一面板的一次性部分到所述第一面板的一次性部分的边缘; （c）向第一电路板施加绝缘涂层，使得第一电路板的至少每个边缘被覆盖; 以及（d）以一种方式将第一电路板与一次性部分分开，由此至少部分突片保持附接到第一电路板并且包括第一电路板的导电片的暴露边缘。还提供了通过该方法形成的电路板。

2. 发明申请

US20090178838A1 CIRCUIT BOARD HAVING AN ELECTRODEPOSITED COATING ON A CONDUCTIVE CORE WITHIN A VIA AND METHOD OF MAKING SAME 有权
标题翻译：电路板在导电芯中具有电沉积涂层及其制造方法
公开(公告)号：US20090178838A1
公开(公告)日：2009-07-16
申请号：US11972671
申请日：2008-01-11
申请人： Alan E. Wang , Kevin C. Olson , Michael L. Pawlik
发明人： Alan E. Wang , Kevin C. Olson , Michael L. Pawlik
IPC分类号： H05K1/05 , H05K3/42
CPC分类号： H05K3/429 , H01L2924/0002 , H05K3/445 , H05K3/4641 , H05K2201/09309 , H05K2203/135 , Y10T29/49126 , Y10T29/49165 , H01L2924/00
摘要： A process for fabricating a circuit board includes: providing a substrate including a first electrically conductive core having a first insulating coating on a first side and a second insulating coating on a second side, forming an opening in the first and second insulating coatings and the first electrically conductive core, exposing an edge of the conductive core within the opening, and electrodepositing a third insulating material on the exposed edge of the first electrically conductive core. A circuit board fabricated using the process is also provided.
摘要翻译：一种电路板的制造方法，包括：提供包括第一导电芯的基板，第一导电芯在第一侧具有第一绝缘涂层，在第二侧具有第二绝缘涂层，在第一绝缘涂层和第二绝缘涂层中形成开口导电芯，将导电芯的边缘暴露在开口内，以及在第一导电芯的暴露边缘上电沉积第三绝缘材料。还提供了使用该方法制造的电路板。

3. 发明授权

US07228623B2 Process for fabricating a multi layer circuit assembly 失效
标题翻译：制造多层电路组件的方法
公开(公告)号：US07228623B2
公开(公告)日：2007-06-12
申请号：US10291876
申请日：2002-11-08
申请人： Kevin C. Olson , Alan E. Wang
发明人： Kevin C. Olson , Alan E. Wang
IPC分类号： H01K3/10 , B05D1/36 , G03C5/00
CPC分类号： C09D5/4488 , H01L21/481 , H01L21/4857 , H01L21/486 , H01L23/142 , H01L2924/0002 , H01L2924/3011 , H05K1/056 , H05K3/0023 , H05K3/0032 , H05K3/0035 , H05K3/388 , H05K3/426 , H05K3/44 , H05K3/445 , H05K3/4608 , H05K2201/0179 , H05K2201/09554 , H05K2201/09609 , H05K2203/0582 , H05K2203/135 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49158 , Y10T29/49165 , H01L2924/00
摘要： Processes for fabricating a multi-layer circuit assembly and a multi-layer circuit assembly fabricated by such processes are provided. The process includes (a) providing a substrate at least one area of which comprises a plurality of vias, these area(s) having a via density of 500 to 10,000 holes/square inch (75 to 1550 holes/square centimeter); (b) applying a dielectric coating onto all exposed surfaces of the substrate to form a conformal coating thereon; and (c) applying a layer of metal to all surfaces of the substrate. Additional processing steps such as circuitization may be included.
摘要翻译：提供了用于制造多层电路组件的工艺和通过这些工艺制造的多层电路组件。该方法包括（a）提供基底，其至少一个区域包括多个通孔，这些区域的通孔密度为500至10,000个孔/平方英寸（75至1550个孔/平方厘米）; （b）将介电涂层施加到所述基底的所有暴露表面上以在其上形成保形涂层; 和（c）在基片的所有表面上涂一层金属。可以包括诸如电路化的附加处理步骤。

4. 发明授权

US07159308B2 Method of making a circuit board 有权
标题翻译：制作电路板的方法
公开(公告)号：US07159308B2
公开(公告)日：2007-01-09
申请号：US11224197
申请日：2005-09-12
申请人： Alan E. Wang , Kevin C. Olson , Thomas H. Di Stefano
发明人： Alan E. Wang , Kevin C. Olson , Thomas H. Di Stefano
IPC分类号： H05K3/36
CPC分类号： H05K1/0231 , H01L2224/16225 , H05K1/056 , H05K3/002 , H05K3/0052 , H05K3/44 , H05K3/4641 , H05K3/4644 , H05K2201/0166 , H05K2201/0397 , H05K2201/0909 , H05K2201/0919 , H05K2201/09309 , H05K2201/09554 , H05K2201/10446 , H05K2203/135 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156
摘要： Provided is a method of forming a circuit board including (a) providing a first conductive sheet; (b) selectively removing one or more portions of the first conductive sheet to form a first panel having a first circuit board that is coupled to a disposable part of the first panel by at least one tab that extends from an edge of the first circuit board to an edge of the disposable part of the first panel; (c) applying an insulating coating to the first circuit board so that at least each edge of the first circuit board is covered thereby; and (d) separating the first circuit board from the disposable part in a manner whereupon at least part of the tab remains attached to the first circuit board and includes an exposed edge of the conductive sheet of the first circuit board. Circuit boards formed by the method are also provided.
摘要翻译：提供一种形成电路板的方法，包括：（a）提供第一导电片; （b）选择性地去除所述第一导电片的一个或多个部分以形成具有第一电路板的第一面板，所述第一电路板通过从所述第一电路板的边缘延伸的至少一个接片连接到所述第一面板的一次性部分到所述第一面板的一次性部分的边缘; （c）向第一电路板施加绝缘涂层，使得第一电路板的至少每个边缘被覆盖; 和（d）以一种方式将第一电路板与一次性部分分离，由此至少部分突片保持附接到第一电路板并且包括第一电路板的导电片的暴露边缘。还提供了通过该方法形成的电路板。

5. 发明申请

US20110266156A1 METHOD OF FORMING SOLID BLIND VIAS THROUGH THE DIELECTRIC COATING ON HIGH DENSITY INTERCONNECT (HDI) SUBSTRATE MATERIALS 失效
标题翻译：通过高密度互连（HDI）衬底材料上的介电涂层形成固体黑色VIAS的方法
公开(公告)号：US20110266156A1
公开(公告)日：2011-11-03
申请号：US13182838
申请日：2011-07-14
申请人： Kevin C. Olson , Alan E. Wang
发明人： Kevin C. Olson , Alan E. Wang
IPC分类号： C25D5/02 , C25D7/00
CPC分类号： H05K3/44 , H05K3/108 , H05K3/388 , H05K3/445 , H05K3/4647 , H05K2201/09554 , H05K2203/0582 , H05K2203/0733 , H05K2203/135
摘要： A method includes forming a first substrate by (a) applying an electrodepositable dielectric coating onto a conductive surface; (b) curing the dielectric coating; (c) depositing an adhesion layer and a seed layer onto the dielectric coating; (d) applying a layer of a first removable material to the seed layer; (e) forming openings in the first removable material to expose areas of the seed layer; (f) electroplating a first conductive material to the exposed areas of the seed layer; (g) applying a layer of a second removable material; (h) forming openings in the second removable material to expose areas of the first conductive material; (i) plating a second conductive material to the exposed areas of the first conductive material; (j) removing the first and second removable materials; (k) removing unplated portions of the seed layer; repeating steps (a) through (k) to form a second substrate; and laminating the first and second substrates together with a layer of dielectric material between the first and second substrates to form at least one interconnect between the first and second substrates.
摘要翻译：一种方法包括通过以下步骤形成第一衬底：（a）将电沉积介电涂层施加到导电表面上; （b）固化电介质涂层; （c）在所述电介质涂层上沉积粘附层和种子层; （d）将第一可移除材料层施加到种子层; （e）在第一可移除材料中形成开口以暴露种子层的区域; （f）将第一导电材料电镀到种子层的暴露区域; （g）施加第二可移除材料层; （h）在所述第二可移除材料中形成开口以暴露所述第一导电材料的区域; （i）将第二导电材料镀覆到第一导电材料的暴露区域; （j）移除第一和第二可移除材料; （k）去除种子层的未镀层的部分; 重复步骤（a）至（k）以形成第二衬底; 以及将所述第一和第二基板与第一和第二基板之间的介电材料层一起层压，以在所述第一和第二基板之间形成至少一个互连。

6. 发明申请

US20090101274A1 Single or Multi-Layer Printed Circuit Board With Improved Via Design 失效
标题翻译：单层或多层印刷电路板，具有改进的通孔设计
公开(公告)号：US20090101274A1
公开(公告)日：2009-04-23
申请号：US12344643
申请日：2008-12-29
申请人： Kevin C. Olson , Alan E. Wang , Peter Elenius , Thomas W. Goodman
发明人： Kevin C. Olson , Alan E. Wang , Peter Elenius , Thomas W. Goodman
IPC分类号： B32B37/00
CPC分类号： H05K3/44 , H05K1/056 , H05K3/002 , H05K3/0052 , H05K3/4641 , H05K3/4644 , H05K2201/0166 , H05K2201/0909 , H05K2201/0919 , H05K2201/09554 , H05K2203/135 , Y10T29/49126 , Y10T29/49156 , Y10T29/49167 , Y10T428/12361 , Y10T428/24322
摘要： A circuit board or each circuit board of a multi-layer circuit board includes an electrically conductive sheet coated with an insulating top layer covering one surface of the conductive sheet, an insulating bottom layer covering another surface of the conductive sheet and an insulating edge layer covering an edge of the conductive sheet. An insulating interlayer can be sandwiched between a pair of adjacent circuit boards of a multi-layer circuit board assembly. A landless through-hole or via can extend through one or more of the circuit boards for connecting electrical conductors on opposing surfaces thereof.
摘要翻译：多层电路板的电路板或每个电路板包括涂覆有覆盖导电片的一个表面的绝缘顶层的导电片，覆盖导电片的另一表面的绝缘底层和覆盖导电片的边缘。绝缘中间层可以夹在多层电路板组件的一对相邻电路板之间。无地通孔或通孔可以延伸通过一个或多个电路板，用于连接其相对表面上的电导体。

7. 发明授权

US07485812B2 Single or multi-layer printed circuit board with improved via design 失效
标题翻译：具有改进的通孔设计的单层或多层印刷电路板
公开(公告)号：US07485812B2
公开(公告)日：2009-02-03
申请号：US10987480
申请日：2004-11-11
申请人： Kevin C. Olson , Alan E. Wang , Peter Elenius , Thomas W. Goodman
发明人： Kevin C. Olson , Alan E. Wang , Peter Elenius , Thomas W. Goodman
IPC分类号： H05K1/03
CPC分类号： H05K3/002 , H05K1/056 , H05K3/0052 , H05K3/403 , H05K3/44 , H05K3/445 , H05K3/4623 , H05K3/4641 , H05K3/4644 , H05K2201/0166 , H05K2201/0397 , H05K2201/0909 , H05K2201/09181 , H05K2201/0919 , H05K2201/09309 , H05K2201/09536 , H05K2201/09545 , H05K2201/09554 , H05K2201/09645 , H05K2201/09827 , H05K2203/1105 , H05K2203/135
摘要： A circuit board or each circuit board of a multi-layer circuit board includes an electrically conductive sheet coated with an insulating top layer covering one surface of the conductive sheet, an insulating bottom layer covering another surface of the conductive sheet and an insulating edge layer covering an edge of the conductive sheet. An insulating interlayer can be sandwiched between a pair of adjacent circuit boards of a multi-layer circuit board assembly. A landless through-hole or via can extend through one or more of the circuit boards for connecting electrical conductors on opposing surfaces thereof.
摘要翻译：多层电路板的电路板或每个电路板包括涂覆有覆盖导电片的一个表面的绝缘顶层的导电片，覆盖导电片另一表面的绝缘底层和覆盖导电片的边缘。绝缘中间层可以夹在多层电路板组件的一对相邻电路板之间。无地通孔或通孔可以延伸通过一个或多个电路板，用于连接其相对表面上的电导体。

8. 发明授权

US07002081B2 Single or multi-layer printed circuit board with recessed or extended breakaway tabs and method of manufacture thereof 失效
标题翻译：具有凹槽或延伸分离片的单层或多层印刷电路板及其制造方法
公开(公告)号：US07002081B2
公开(公告)日：2006-02-21
申请号：US10910022
申请日：2004-08-03
申请人： Alan E. Wang , Kevin C. Olson , Thomas H. Di Stefano
发明人： Alan E. Wang , Kevin C. Olson , Thomas H. Di Stefano
IPC分类号： H05K1/16
CPC分类号： H05K1/0231 , H01L2224/16225 , H05K1/056 , H05K3/002 , H05K3/0052 , H05K3/44 , H05K3/4641 , H05K3/4644 , H05K2201/0166 , H05K2201/0397 , H05K2201/0909 , H05K2201/0919 , H05K2201/09309 , H05K2201/09554 , H05K2201/10446 , H05K2203/135 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156
摘要： A circuit board layer 2 in accordance with the present invention includes a conductive sheet 4 sandwiched between an insulating top layer 10 and an insulating bottom layer 14. The top and bottom layers 10 and 14 and the conductive sheet 4 define the circuit board layer 2 having an edge that includes an edge 20 of the conductive sheet 4. An insulating edge layer 18 covers substantially all of the edge 20 of the conductive sheet 4.
摘要翻译：根据本发明的电路板层2包括夹在绝缘顶层10和绝缘底层14之间的导电片4。顶层10和底层14以及导电片4限定具有包括导电片4的边缘20的边缘的电路板层2。绝缘边缘层18几乎覆盖导电片4的所有边缘20。

9. 发明授权

US07000313B2 Process for fabricating circuit assemblies using electrodepositable dielectric coating compositions 失效
标题翻译：使用电沉积介电涂层组合物制造电路组件的方法
公开(公告)号：US07000313B2
公开(公告)日：2006-02-21
申请号：US10184192
申请日：2002-06-27
申请人： Gregory J. McCollum , Thomas C. Moriarity , Kevin C. Olson , Michael G. Sandala , Alan E. Wang , Steven R. Zawacky
发明人： Gregory J. McCollum , Thomas C. Moriarity , Kevin C. Olson , Michael G. Sandala , Alan E. Wang , Steven R. Zawacky
IPC分类号： H01K3/10
CPC分类号： H05K3/44 , H01L2924/0002 , H05K1/056 , H05K3/0032 , H05K3/0035 , H05K3/445 , H05K2201/09554 , H05K2203/0582 , H05K2203/135 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , H01L2924/00
摘要： Provided is a process for forming metallized vias in a substrate including the steps of (I) applying to an electroconductive substrate an electrodepositable coating composition onto all exposed surfaces of the substrate to form a conformal dielectric coating; (II) ablating a surface of the dielectric coating to expose a section of the substrate; (III) applying a layer of metal to all surfaces to form metallized vias in the substrate. Also disclosed are processes for fabricating a circuit assembly which include the application of an electrodoepositable coating composition onto exposed surfaces of the substrate/core to form a conformal dielectric coating thereon. The electrodepositable coating composition includes a resinous phase dispersed in an aqueous phase, where the resinous phase has a covalently bonded halogen content of at least 1 percent by weight. The dielectric coating derived therefrom has a low dielectric constant and low dielectric loss factor.
摘要翻译：提供了一种用于在基底中形成金属化通孔的方法，包括以下步骤：（I）将可电沉积涂料组合物施加到导电基底上，以在基底的所有暴露表面上形成共形绝缘涂层; （II）烧蚀所述电介质涂层的表面以暴露所述衬底的一部分; （III）将金属层施加到所有表面以在基底中形成金属化通孔。还公开了用于制造电路组件的方法，其包括将电沉积涂料组合物施加到基材/芯的暴露表面上以在其上形成共形绝缘涂层。电沉积涂料组合物包括分散在水相中的树脂相，其中树脂相具有至少1重量％的共价键合的卤素含量。由此得到的电介质涂层具有低介电常数和低介电损耗因子。

10. 发明授权

US08409982B2 Method of forming solid blind vias through the dielectric coating on high density interconnect (HDI) substrate materials 失效
标题翻译：通过高密度互连（HDI）衬底材料上的电介质涂层形成固体盲孔的方法
公开(公告)号：US08409982B2
公开(公告)日：2013-04-02
申请号：US13182838
申请日：2011-07-14
申请人： Kevin C. Olson , Alan E. Wang
发明人： Kevin C. Olson , Alan E. Wang
IPC分类号： H01L21/4763
CPC分类号： H05K3/44 , H05K3/108 , H05K3/388 , H05K3/445 , H05K3/4647 , H05K2201/09554 , H05K2203/0582 , H05K2203/0733 , H05K2203/135
摘要： A method includes forming a first substrate by (a) applying an electrodepositable dielectric coating onto a conductive surface; (b) curing the dielectric coating; (c) depositing an adhesion layer and a seed layer onto the dielectric coating; (d) applying a layer of a first removable material to the seed layer; (e) forming openings in the first removable material to expose areas of the seed layer; (f) electroplating a first conductive material to the exposed areas of the seed layer; (g) applying a layer of a second removable material; (h) forming openings in the second removable material to expose areas of the first conductive material; (i) plating a second conductive material to the exposed areas of the first conductive material; (j) removing the first and second removable materials; (k) removing unplated portions of the seed layer; repeating steps (a) through (k) to form a second substrate; and laminating the first and second substrates together with a layer of dielectric material between the first and second substrates to form at least one interconnect between the first and second substrates.
摘要翻译：一种方法包括通过以下步骤形成第一衬底：（a）将电沉积介电涂层施加到导电表面上; （b）固化电介质涂层; （c）在所述电介质涂层上沉积粘附层和种子层; （d）将第一可移除材料层施加到种子层; （e）在第一可移除材料中形成开口以暴露种子层的区域; （f）将第一导电材料电镀到种子层的暴露区域; （g）施加第二可移除材料层; （h）在所述第二可移除材料中形成开口以暴露所述第一导电材料的区域; （i）将第二导电材料镀覆到第一导电材料的暴露区域; （j）移除第一和第二可移除材料; （k）去除种子层的未镀层的部分; 重复步骤（a）至（k）以形成第二衬底; 以及将所述第一和第二基板与第一和第二基板之间的介电材料层一起层压，以在所述第一和第二基板之间形成至少一个互连。

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