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    • 4. 再颁专利
    • Semiconductor device and method of fabricating the same
    • 半导体装置及其制造方法
    • USRE38805E1
    • 2005-10-04
    • US09915710
    • 2001-07-27
    • Yasuo OhbaAko Hatano
    • Yasuo OhbaAko Hatano
    • H01L29/201H01L29/205H01L31/0304H01L33/00H01L33/32H01S5/02H01S5/042H01S5/323
    • H01L33/32H01L29/201H01L29/205H01L33/007H01S5/0208H01S5/0425H01S5/32341
    • A semiconductor device comprises a single crystal substrate, a nucleus formation buffer layer formed on the single crystal substrate, and a lamination layer including a plurality of Al1-x-yGaxInyN (0≦x≦1, 0≦y≦1, x+y≦1) layers laminated above the nucleus formation buffer layer. The nucleus formation buffer layer is formed of Al1-s-tGasIntN (0≦s≦1, 0≦t≦1, s+t≦1) and is formed on a surface of the substrate such that the nucleus formation buffer layer has a number of pinholes for control of polarity and formation of nuclei. A method of fabricating a semiconductor device comprises the steps of: forming, above an Al1-x-yGaxInyN (0≦x≦1, 0≦y≦1, x+y≦1) semiconductor layer doped with a p-type dopant, a cap layer for preventing evaporation of a constituent element of the semiconductor layer, the cap layer being formed of one of AlN in which a p-type dopant is added and Al2O3, subjecting the semiconductor layer to heat treatment, and removing at least a part of the cap layer.
    • 半导体器件包括单晶衬底,形成在单晶衬底上的核形成缓冲层,以及包括多个Al 1-x Ga x In In 在层形成缓冲层之上层叠的层(N,O,X,Y,Y,Y,Y)。 核形成缓冲层由Al 1-N 3 N(0≤s≤1,0<= 1)构成, t <= 1,s + t <= 1),并且形成在基板的表面上,使得核形成缓冲层具有用于控制极性和形成核的多个针孔。 一种制造半导体器件的方法包括以下步骤:在Al 2 O 3(0 < 掺杂有p型掺杂剂的半导体层,用于防止半导体层的构成元素的蒸发的盖层,形成帽盖层的半导体层,x <= 1,0 <= y <= 1,x + y < 其中添加了p型掺杂剂的AlN和Al 2 O 3 3,对半导体层进行热处理,并除去至少一部分盖 层。