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    • 2. 发明授权
    • Mutant of RNA polymerases with increased stability
    • 增加稳定性的RNA聚合酶突变体
    • US06524828B1
    • 2003-02-25
    • US09857475
    • 2001-06-05
    • Hans LiaoBob van GemenAkio Sugiyama
    • Hans LiaoBob van GemenAkio Sugiyama
    • C12P1934
    • C12N9/1247C12Q1/6865
    • The present application relates to mutated RNA polymerases from bacteriophages that have increased stability, for example under high temperature conditions. One example of bacteriophage encoded RNA polymerase is the T7 RNA polymerase. T7 is a bacteriophage capable of infecting E. coli cells. Examples of other E. coli infecting T7-like bacteriophages are T3, øI, øII, W31, H, Y, A1, croC21, C22 and C23. An example of a Salmonella typhimurium infecting bacteriophage is SP6. The present invention is concerned with the RNA polymerases of T7-like bacteriophages that have been mutated. Due to these mutations the RNAP's have an increased stability. Preferred mutated RNA polymerases according to the invention are mutant RNA polymerases from T7 or SP3 bacteriophages. Due to the high homology between these enzymes, mutations in the T7 gene 1 sequence are likely to have the same effect in the corresponding gene sequence of the T3 bacteriophage. An especially preferred embodiment of the present invention is a T7 RNA polymerase with a serine to proline amino acid change in the protein at position 633 of the amino acid sequence. Since there is 80% homology between the T7 RNA polymerase and the T3 RNA polymerase the same effects of the 633 serine→proline mutation in the T7 gene may be expected for a 634 serine→proline amino acid mutation in the T3 RNA polymerase.
    • 本申请涉及来自具有增加的稳定性的噬菌体的突变的RNA聚合酶,例如在高温条件下。 噬菌体编码的RNA聚合酶的一个实例是T7RNA聚合酶。 T7是能够感染大肠杆菌细胞的噬菌体。 感染T7样噬菌体的其他大肠杆菌的实例是T3,øI,øII,W31,H,Y,A1,croC21,C22和C23。 鼠伤寒沙门氏菌感染噬菌体的一个例子是SP6。 本发明涉及已被突变的T7样噬菌体的RNA聚合酶。 由于这些突变,RNAP具有增加的稳定性。 根据本发明的优选的突变型RNA聚合酶是来自T7或SP3噬菌体的突变型RNA聚合酶。 由于这些酶之间的高同源性,T7基因1序列中的突变可能在T3噬菌体的相应基因序列中具有相同的作用。 本发明的特别优选的实施方案是具有丝氨酸以在氨基酸序列的633位的蛋白质中脯氨酸变化的T7RNA聚合酶。 由于T7 RNA聚合酶和T3 RNA聚合酶之间具有80%的同源性,所以T3 RNA聚合酶中634丝氨酸 - >脯氨酸氨基酸突变可能预期T7基因中63​​3丝氨酸 - >脯氨酸突变的相同作用。
    • 5. 发明授权
    • Data read circuit in a semiconductor device featuring reduced chip area and increased data transfer rate
    • 半导体器件中的数据读取电路具有减少的芯片面积和增加的数据传输速率
    • US06909662B2
    • 2005-06-21
    • US10660518
    • 2003-09-12
    • Akio Sugiyama
    • Akio Sugiyama
    • G11C11/41G11C7/12G11C8/16G11C11/417G11C11/419G11C8/00
    • G11C7/12G11C8/16G11C11/419
    • A read circuit in a semiconductor device includes a circuit for determining whether data that have been read from a plurality of circuit blocks are to be supplied as output to the outside, and a discharging circuit that is inserted in cascade connection in data lines that are shared with a succeeding circuit blocks. If the output data that are to be transferred are at a low level, the discharging circuit is set to a conductive state and the data line that is shared with the succeeding circuit block is discharged, and if at a high level, the shared data line is precharged by a precharging circuit. This control operation is successively repeated as far as the lowest-order circuit block to supply, as output, data of a logic level that corresponds to the output data.
    • 半导体器件中的读取电路包括用于确定是否将从多个电路块读取的数据作为输出提供给外部的电路和在共享的数据线中以级联连接插入的放电电路 有一个后续的电路块。 如果要传送的输出数据处于低电平,则放电电路被设置为导通状态,并且与后续电路块共享的数据线被放电,并且如果处于高电平,则共享数据线 由预充电电路预充电。 连续重复该控制操作,直到最低级电路块作为输出提供对应于输出数据的逻辑电平的数据。
    • 7. 发明授权
    • Clock data recovery circuit and display device
    • 时钟数据恢复电路和显示设备
    • US08760577B2
    • 2014-06-24
    • US12819776
    • 2010-06-21
    • Akio Sugiyama
    • Akio Sugiyama
    • H03L7/00H04L7/00H03D3/24
    • H04L7/033H03L7/0807H03L7/093H04L7/0083H04L7/046
    • A clock data recovery circuit has: a receiver circuit configured to receive a serial data including a predetermined pattern and to sample the serial data in synchronization with a clock signal to generate a sampled data; a PLL circuit configured to perform clock data recovery based on the sampled data to generate the clock signal; and a false lock detection circuit configured to detect false lock of the PLL circuit by detecting a false lock pattern included in the sampled data. The false lock pattern is a pattern obtained by the receiver circuit sampling the predetermined pattern when the false lock of the PLL circuit occurs.
    • 时钟数据恢复电路具有:接收器电路,被配置为接收包括预定模式的串行数据,并与时钟信号同步地对串行数据进行采样以产生采样数据; PLL电路,被配置为基于所述采样数据执行时钟数据恢复以产生所述时钟信号; 以及错误锁定检测电路,被配置为通过检测包括在采样数据中的假锁定模式来检测PLL电路的假锁定。 假锁定模式是当PLL电路的假锁发生时由接收器电路对预定模式进行采样而获得的模式。