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1. 发明授权

US07126342B2 Voltage measurement device 有权
标题翻译：电压测量装置
公开(公告)号：US07126342B2
公开(公告)日：2006-10-24
申请号：US10549870
申请日：2004-03-23
申请人： Akio Iwabuchi , Masaki Kanazawa , Kazuya Aizawa , Norimasa Yamada , Toshiaki Ariyoshi , Takafumi Tsurumi , Yoshikazu Nomoto
发明人： Akio Iwabuchi , Masaki Kanazawa , Kazuya Aizawa , Norimasa Yamada , Toshiaki Ariyoshi , Takafumi Tsurumi , Yoshikazu Nomoto
IPC分类号： G01N27/416 , H02J7/00
CPC分类号： G01R19/16542 , G01R31/362 , G01R31/3658
摘要： A voltage measurement device includes a first group of switches Q1, Q2, a second group of switches Q7, Q8 and a third groups of switches Q5, Q6. By turning on the third group of switches Q5, Q6, the first group of switches Q1, Q2 are turned on, so that a condenser C1 is charged by voltage impressed between a voltage input terminal A and a voltage input terminal B. While the first group of switches Q1, Q2 are turned off by tuning off the third group of switches Q5, Q6, the second group of switches Q7, Q8 are turned on, so that voltage retained in the condenser C1 is generated between a voltage output terminal G and a voltage output terminal H.
摘要翻译：电压测量装置包括第一组开关Q 1，Q 2，第二组开关Q 7，Q 8和第三组开关Q 5，Q 6。通过接通第三组开关Q 5，Q 6，第一组开关Q 1，Q 2导通，使得电容器C 1被施加在电压输入端子A和电压输入端子当通过调谐第三组开关Q 5，Q 6关闭第一组开关Q 1，Q 2时，第二组开关Q 7，Q 8导通，使得保持在在电压输出端子G和电压输出端子H之间产生电容器C 1。

2. 发明申请

US20060186894A1 VOLTAGE MEASUREMENT DEVICE 有权
标题翻译：电压测量装置
公开(公告)号：US20060186894A1
公开(公告)日：2006-08-24
申请号：US10549870
申请日：2004-03-23
申请人： Akio Iwabuchi , Masaki Kanazawa , Kazuya Aizawa , Norimasa Yamada , Toshiaki Ariyoshi , Takafumi Tsurumi , Yoshikazu Nomoto
发明人： Akio Iwabuchi , Masaki Kanazawa , Kazuya Aizawa , Norimasa Yamada , Toshiaki Ariyoshi , Takafumi Tsurumi , Yoshikazu Nomoto
IPC分类号： G01R27/02
CPC分类号： G01R19/16542 , G01R31/362 , G01R31/3658
摘要： A voltage measurement device includes a first group of switches Q1, Q2, a second group of switches Q7, Q8 and a third groups of switches Q5, Q6. By turning on the third group of switches Q5, Q6, the first group of switches Q1, Q2 are turned on, so that a condenser C1 is charged by voltage impressed between a voltage input terminal A and a voltage input terminal B. While the first group of switches Q1, Q2 are turned off by tuning off the third group of switches Q5, Q6, the second group of switches Q7, Q8 are turned on, so that voltage retained in the condenser C1 is generated between a voltage output terminal G and a voltage output terminal H.
摘要翻译：电压测量装置包括第一组开关Q 1，Q 2，第二组开关Q 7，Q 8和第三组开关Q 5，Q 6。通过接通第三组开关Q 5，Q 6，第一组开关Q 1，Q 2导通，使得电容器C 1被施加在电压输入端子A和电压输入端子当通过调谐第三组开关Q 5，Q 6关闭第一组开关Q 1，Q 2时，第二组开关Q 7，Q 8导通，使得保持在在电压输出端子G和电压输出端子H之间产生电容器C 1。

3. 发明授权

US07592683B2 Semiconductor device with improved electrostatic tolerance 有权
标题翻译：具有改善静电容量的半导体器件
公开(公告)号：US07592683B2
公开(公告)日：2009-09-22
申请号：US10566421
申请日：2005-02-25
申请人： Akio Iwabuchi , Kazuya Aizawa
发明人： Akio Iwabuchi , Kazuya Aizawa
IPC分类号： H01L29/93
CPC分类号： H01L29/7816 , H01L29/0696 , H01L29/1087 , H01L29/1095
摘要： A semiconductor device comprises a P−-type semiconductor substrate (15), an N−-type semiconductor substrate (21) formed on the P−-type semiconductor substrate (15), an upper P-type semiconductor region (13) formed in the surface region of the N−-type semiconductor substrate (21) and electrically connected to a ground electrode (1), a lower P-type semiconductor region (14) formed beneath the upper P-type semiconductor region (13), a first N+-type semiconductor region (22) electrically connected to a drain electrode (2), a P-type semiconductor region (19) functioning as a channel forming region, a P+-semiconductor region (12) electrically connected to a back gate electrode (5), a second N+-semiconductor region (23) electrically connected to a source electrode (4), and a gate electrode (3) and a gate insulating film (31) both on the P-type semiconductor region (19), and the lower P-type semiconductor region (14) extends toward the first N+-type semiconductor region (22).
摘要翻译：半导体器件包括P型半导体衬底（15），形成在P型半导体衬底（15）上的N型半导体衬底（21），形成在P型半导体衬底 N型半导体衬底（21）的表面区域，与接地电极（1）电连接，形成在上P型半导体区域（13）下方的下P型半导体区域（14），第一电连接到漏电极（2）的N +型半导体区域（22），用作沟道形成区域的P型半导体区域（19），电连接到背栅电极的P +半导体区域电连接到源极（4）的第二N +半导体区域（23）以及P型半导体区域（19）上的栅电极（3）和栅绝缘膜（31），以及下P型半导体区域（14）朝向第一N +型半导体区域（22）延伸。

4. 发明申请

US20060087329A1 Voltage measurement device 有权
标题翻译：电压测量装置
公开(公告)号：US20060087329A1
公开(公告)日：2006-04-27
申请号：US11243164
申请日：2005-10-05
申请人： Akio Iwabuchi , Kazuya Aizawa
发明人： Akio Iwabuchi , Kazuya Aizawa
IPC分类号： G01R27/08
CPC分类号： G01R31/3658 , G01R19/16542
摘要： A voltage measurement device includes: a charging circuit 100 having a first switch group of semiconductor elements P1, P2 for connecting voltages of respective blocks, into which a plurality of voltage sources VCn are divided, to a charging condenser Cn and a second switch groups of semiconductor elements N3, N4 for connecting the voltage of each block accumulated in the charging condenser Cn to an output terminal; an A/D converter 120 connected to an output terminal of the charging circuit 100; and a CPU 130 measuring a stray capacitance including a parasitic capacitance of the semiconductor element N4 in advance and further calculates an error voltage due to electrical charges accumulated in the parasitic capacitance. The CPU 130 further calculates a true value of the voltage of each block by subtracting the error voltage from a measured value of terminal voltage at the output terminal of the charging circuit 100.
摘要翻译：电压测量装置包括：充电电路100，其具有用于连接多个电压源V Cn N被分割的各个块的电压的半导体元件P 1，P 2的第一开关组，充电电容器C n和用于将在充电电容器C n n中累积的每个块的电压连接到输出端子的半导体元件N 3，N 4的第二开关组 ; 连接到充电电路100的输出端的A / D转换器120; 以及预先测量包含半导体元件N 4的寄生电容的杂散电容的CPU130，并进一步计算由寄生电容中累积的电荷引起的误差电压。 CPU 130还通过从充电电路100的输出端的端子电压的测量值减去误差电压来计算每个块的电压的真实值。

5. 发明申请

US20050218900A1 Voltage measuring apparatus 有权
标题翻译：电压测量仪
公开(公告)号：US20050218900A1
公开(公告)日：2005-10-06
申请号：US11077624
申请日：2005-03-10
申请人： Akio Iwabuchi , Kazuya Aizawa
发明人： Akio Iwabuchi , Kazuya Aizawa
IPC分类号： G01R19/00 , G01R19/165 , G01R31/36 , H01L23/62 , H01M6/42 , H01M10/42
CPC分类号： G01R31/3658 , H01L2924/0002 , H01M6/42 , H01M10/42 , H01M10/4264 , H01L2924/00
摘要： The voltage measuring apparatus includes a voltage measuring unit 2 being connected to a battery 1, a voltage converting unit 3 connected to the voltage measuring unit 2, and a controller 4 which controls the operation of the voltage measuring unit 2 based on output of the voltage converting unit 3. The voltage measuring unit 2 includes Pch-MOSFET elements P1 and P2 constituting a first switch group connected to both terminals of a voltage source Vcn in the battery 1 , a capacitor Cn connected between the elements P1 and P2, and Nch-MOSFET elements N3 and N4 constituting a second switch group connected to both terminals of the capacitor Cn and to both terminals of the voltage output terminal. A source and a back gate of the Nch-MOSFET element N3 of the second switch group are connected to each other.
摘要翻译：电压测量装置包括连接到电池1的电压测量单元2，连接到电压测量单元2的电压转换单元3，以及基于电压输出来控制电压测量单元2的操作的控制器4 转换单元3。电压测量单元2包括构成连接到电池1中的电压源Vcn的两个端子的第一开关组的Pch-MOSFET元件P 1和P 2，连接在元件P 1和P 2之间的电容器Cn，以及Nch- 构成连接到电容器Cn的两端的电压输出端子的第二开关组的MOSFET元件N 3和N 4。第二开关组的Nch-MOSFET元件N 3的源极和背栅极彼此连接。

6. 发明授权

US07023178B2 Voltage measuring apparatus 有权
标题翻译：电压测量仪
公开(公告)号：US07023178B2
公开(公告)日：2006-04-04
申请号：US11077624
申请日：2005-03-10
申请人： Akio Iwabuchi , Kazuya Aizawa
发明人： Akio Iwabuchi , Kazuya Aizawa
IPC分类号： H02J7/00
CPC分类号： G01R31/3658 , H01L2924/0002 , H01M6/42 , H01M10/42 , H01M10/4264 , H01L2924/00
摘要： The voltage measuring apparatus includes a voltage measuring unit 2 being connected to a battery 1, a voltage converting unit 3 connected to the voltage measuring unit 2, and a controller 4 which controls the operation of the voltage measuring unit 2 based on output of the voltage converting unit 3. The voltage measuring unit 2 includes Pch-MOSFET elements P1 and P2 constituting a first switch group connected to both terminals of a voltage source Vcn in the battery 1, a capacitor Cn connected between the elements P1 and P2, and Nch-MOSFET elements N3 and N4 constituting a second switch group connected to both terminals of the capacitor Cn and to both terminals of the voltage output terminal. A source and a back gate of the Nch-MOSFET element N3 of the second switch group are connected to each other.
摘要翻译：电压测量装置包括连接到电池1的电压测量单元2，连接到电压测量单元2的电压转换单元3，以及基于电压输出来控制电压测量单元2的操作的控制器4 转换单元3。电压测量单元2包括构成连接到电池1中的电压源Vcn的两个端子的第一开关组的Pch-MOSFET元件P 1和P 2，连接在元件P 1和P 2之间的电容器Cn，以及Nch- 构成连接到电容器Cn的两端的电压输出端子的第二开关组的MOSFET元件N 3和N 4。第二开关组的Nch-MOSFET元件N 3的源极和背栅极彼此连接。

7. 发明授权

US07550945B2 Voltage measurement device 有权
标题翻译：电压测量装置
公开(公告)号：US07550945B2
公开(公告)日：2009-06-23
申请号：US11243164
申请日：2005-10-05
申请人： Akio Iwabuchi , Kazuya Aizawa
发明人： Akio Iwabuchi , Kazuya Aizawa
IPC分类号： H02J7/00 , G01R27/26
CPC分类号： G01R31/3658 , G01R19/16542
摘要： A voltage measurement device includes: a charging circuit 100 having a first switch group of semiconductor elements P1, P2 for connecting voltages of respective blocks, into which a plurality of voltage sources VCn are divided, to a charging condenser Cn and a second switch groups of semiconductor elements N3, N4 for connecting the voltage of each block accumulated in the charging condenser Cn to an output terminal; an A/D converter 120 connected to an output terminal of the charging circuit 100; and a CPU 130 measuring a stray capacitance including a parasitic capacitance of the semiconductor element N4 in advance and further calculates an error voltage due to electrical charges accumulated in the parasitic capacitance. The CPU 130 further calculates a true value of the voltage of each block by subtracting the error voltage from a measured value of terminal voltage at the output terminal of the charging circuit 100.
摘要翻译：电压测量装置包括：充电电路100，其具有用于将多个电压源VCn被分割成的各个块的电压连接到充电电容器Cn的第一开关组的半导体元件P1，P2，以及第二开关组用于将累积在充电电容器Cn中的每个块的电压连接到输出端子的半导体元件N3，N4; 连接到充电电路100的输出端的A / D转换器120; 以及预先测量包含半导体元件N4的寄生电容的杂散电容的CPU130，并进一步计算由寄生电容中累积的电荷引起的误差电压。 CPU 130还通过从充电电路100的输出端的端子电压的测量值减去误差电压来计算每个块的电压的真实值。

8. 发明申请

US20060255378A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20060255378A1
公开(公告)日：2006-11-16
申请号：US10566421
申请日：2005-02-25
申请人： Akio Iwabuchi , Kazuya Aizawa
发明人： Akio Iwabuchi , Kazuya Aizawa
IPC分类号： H01L29/76
CPC分类号： H01L29/7816 , H01L29/0696 , H01L29/1087 , H01L29/1095
摘要： A semiconductor device comprises a P−-type semiconductor substrate (15), an N−-type semiconductor substrate (21) formed on the P−-type semiconductor substrate (15), an upper P-type semiconductor region (13) formed in the surface region of the N−-type semiconductor substrate (21) and electrically connected to a ground electrode (1), a lower P-type semiconductor region (14) formed beneath the upper P-type semiconductor region (13), a first N+-type semiconductor region (22) electrically connected to a drain electrode (2), a P-type semiconductor region (19) functioning as a channel forming region, a P+-semiconductor region (12) electrically connected to a back gate electrode (5), a second N+-semiconductor region (23) electrically connected to a source electrode (4), and a gate electrode (3) and a gate insulating film (31) both on the P-type semiconductor region (19), and the lower P-type semiconductor region (14) extends toward the first N+-type semiconductor region (22).
摘要翻译：一种半导体器件包括：P型 - 半导体衬底（15），形成在P-O型半导体衬底上的N + - 型半导体衬底（21） >型半导体衬底（15），形成在N +型半导体衬底（21）的表面区域中并电连接到接地电极（21）的上部P型半导体区域（13） 1），形成在上P型半导体区域（13）下方的下P型半导体区域（14），电连接到漏电极的第一N + +型半导体区域（2），用作沟道形成区域的P型半导体区域（19），电连接到背栅电极（5）的P + +半导体区域（12），第二N 电连接到源电极（4）的半导体区域（23）以及P型半导体区域（19）上的栅电极（3）和栅极绝缘膜（31），和低呃P型半导体区域（14）朝向第一N + +型半导体区域（22）延伸。

9. 发明申请

US20070108533A1 Integrated Circuit Having a Multipurpose Resistor for Suppression of a Parasitic Transistor or Other Purposes 有权
标题翻译：具有用于抑制寄生晶体管或其他目的的多用途电阻器的集成电路
公开(公告)号：US20070108533A1
公开(公告)日：2007-05-17
申请号：US11558804
申请日：2006-11-10
申请人： Keiichi Sekiguchi , Kazuya Aizawa
发明人： Keiichi Sekiguchi , Kazuya Aizawa
IPC分类号： H01L29/76
CPC分类号： H01L27/0629 , H01L29/0634 , H01L29/404 , H01L29/7817
摘要： A composite integrated circuit incorporating two LDMOSFETs of unlike designs, with the consequent creation of a parasitic transistor. A multipurpose resistor is integrally built into the composite integrated circuit in order to prevent the parasitic transistor from accidentally turning on. In an intended application of the composite integrated circuit to a startup circuit of a switching-mode power supply, the multipurpose resistor serves as startup resistor for limiting the flow of rush current during the startup period of the switching-mode power supply.
摘要翻译：包含两个不同于设计的LDMOSFET的复合集成电路，随之产生一个寄生晶体管。复合集成电路中集成了多用途电阻器，以防止寄生晶体管意外导通。在复合集成电路到开关电源的启动电路的预期应用中，多用途电阻器用作用于限制开关模式电源的启动期间的冲击电流的启动电阻。

10. 发明授权

US07675120B2 Integrated circuit having a multipurpose resistor for suppression of a parasitic transistor or other purposes 有权
标题翻译：集成电路具有用于抑制寄生晶体管或其他目的的多用途电阻器
公开(公告)号：US07675120B2
公开(公告)日：2010-03-09
申请号：US11558804
申请日：2006-11-10
申请人： Keiichi Sekiguchi , Kazuya Aizawa
发明人： Keiichi Sekiguchi , Kazuya Aizawa
IPC分类号： H01L29/02
CPC分类号： H01L27/0629 , H01L29/0634 , H01L29/404 , H01L29/7817
摘要： A composite integrated circuit incorporating two LDMOSFETs of unlike designs, with the consequent creation of a parasitic transistor. A multipurpose resistor is integrally built into the composite integrated circuit in order to prevent the parasitic transistor from accidentally turning on. In an intended application of the composite integrated circuit to a startup circuit of a switching-mode power supply, the multipurpose resistor serves as startup resistor for limiting the flow of rush current during the startup period of the switching-mode power supply.
摘要翻译：包含两个不同于设计的LDMOSFET的复合集成电路，随之产生一个寄生晶体管。复合集成电路中集成了多用途电阻器，以防止寄生晶体管意外导通。在复合集成电路到开关电源的启动电路的预期应用中，多用途电阻器用作用于限制开关模式电源的启动期间的冲击电流的启动电阻。

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