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1. 发明申请

US20130052971A1 INTERFERENCE REDUCTION SYSTEMS AND METHODS 有权
标题翻译：干扰减少系统和方法
公开(公告)号：US20130052971A1
公开(公告)日：2013-02-28
申请号：US13217902
申请日：2011-08-25
申请人： Abbas Jamshidi-Roudbari , Cheng-Ho Yu , Moon Jung Kim , Shih Chang Chang
发明人： Abbas Jamshidi-Roudbari , Cheng-Ho Yu , Moon Jung Kim , Shih Chang Chang
IPC分类号： H04B1/04
CPC分类号： H04B15/04
摘要： The antenna on hand held devices, such as the iPhone or iPad, can be subject to interference from other circuitry on the device. Such interference may come from high frequency switching of nearby display circuitry, such as de-multiplexors or other circuits. To address this issue, the switching rates may be slowed in certain circuits by adding resistance and/or capacitance, thus raising the RC time constant and slowing the switching times to reduce the high frequency components. Alternatively or in addition to, an EMI shield can be placed over some or all of the display driving circuitry to shield the antenna from high frequency interference.
摘要翻译：手持式设备（如iPhone或iPad）的天线可能受到设备上其他电路的干扰。这种干扰可能来自附近的显示电路（例如解复用器或其他电路）的高频切换。为了解决这个问题，通过增加电阻和/或电容，某些电路中的开关速率可能会降低，从而提高RC时间常数并减慢开关时间，以减少高频分量。或者或除此之外，可以将EMI屏蔽物放置在部分或全部显示驱动电路上，以将天线屏蔽在高频干扰之下。

2. 发明授权

US08731491B2 Interference reduction systems and methods 有权
标题翻译：干扰减少系统和方法
公开(公告)号：US08731491B2
公开(公告)日：2014-05-20
申请号：US13217902
申请日：2011-08-25
申请人： Abbas Jamshidi-Roudbari , Cheng-Ho Yu , Moon Jung Kim , Shih Chang Chang
发明人： Abbas Jamshidi-Roudbari , Cheng-Ho Yu , Moon Jung Kim , Shih Chang Chang
IPC分类号： H04B1/04
CPC分类号： H04B15/04
摘要： The antenna on hand held devices, such as the iPhone or iPad, can be subject to interference from other circuitry on the device. Such interference may come from high frequency switching of nearby display circuitry, such as de-multiplexors or other circuits. To address this issue, the switching rates may be slowed in certain circuits by adding resistance and/or capacitance, thus raising the RC time constant and slowing the switching times to reduce the high frequency components. Alternatively or in addition to, an EMI shield can be placed over some or all of the display driving circuitry to shield the antenna from high frequency interference.
摘要翻译：手持式设备（如iPhone或iPad）的天线可能受到设备上其他电路的干扰。这种干扰可能来自附近的显示电路（例如解复用器或其他电路）的高频切换。为了解决这个问题，通过增加电阻和/或电容，某些电路中的开关速率可能会降低，从而提高RC时间常数并减慢开关时间，以减少高频分量。或者或除此之外，可以将EMI屏蔽物放置在部分或全部显示驱动电路上以屏蔽天线免受高频干扰。

3. 发明授权

US09319036B2 Gate signal adjustment circuit 有权
标题翻译：门信号调节电路
公开(公告)号：US09319036B2
公开(公告)日：2016-04-19
申请号：US13112862
申请日：2011-05-20
申请人： Shih Chang Chang , Ting-Kuo Chang , Abbas Jamshidi Roudbari , Cheng-Ho Yu
发明人： Shih Chang Chang , Ting-Kuo Chang , Abbas Jamshidi Roudbari , Cheng-Ho Yu
IPC分类号： G06F3/038 , H03K5/12 , G09G3/32 , G09G3/36
CPC分类号： H03K5/12 , G09G3/3266 , G09G3/3677 , G09G2330/06
摘要： A gate signal adjustment circuit for a display is disclosed. The gate signal adjustment circuit can adjust a transition time of a gate signal used to drive data displaying. The adjustment can be to either speed up or slow down the transition time according to the requirements of the display. In an example, the gate signal adjustment circuit can include multiple transistors, where a first set of the transistors outputs the gate signal and a second set of the transistors outputs an adjustment to the gate signal. The second set of transistors can be the same or different sizes depending on the desirable number of adjustment options. The circuit can also include a control line coupled to the second set of transistors to control the adjustment output. Gate signal adjustment can reduce crosstalk in the display.
摘要翻译：公开了一种用于显示器的门信号调节电路。门信号调整电路可以调整用于驱动数据显示的门信号的转换时间。调整可以根据显示器的要求加快或减慢转换时间。在一个示例中，门信号调整电路可以包括多个晶体管，其中第一组晶体管输出栅极信号，第二组晶体管输出对栅极信号的调整。第二组晶体管可以是相同或不同的尺寸，这取决于所需数量的调节选项。电路还可以包括耦合到第二组晶体管的控制线以控制调节输出。门信号调整可以减少显示屏中的串扰。

4. 发明申请

US20120313881A1 DISPLAY SCREEN SHIELD LINE SYSTEM 审中-公开
标题翻译：显示屏幕屏蔽线系统
公开(公告)号：US20120313881A1
公开(公告)日：2012-12-13
申请号：US13126416
申请日：2011-03-03
申请人： Zhibing Ge , Cheng Ho Yu , Young-Bae Park , Abbas Jamshidi Roudbari , Shih Chang Chang , Cheng Chen , Marduke yousefpor , John Zhong
发明人： Zhibing Ge , Cheng Ho Yu , Young-Bae Park , Abbas Jamshidi Roudbari , Shih Chang Chang , Cheng Chen , Marduke yousefpor , John Zhong
IPC分类号： G06F3/044
摘要： Electrical shield line systems are provided for openings in common electrodes near data lines of display and touch screens. Some displays, including touch screens, can include multiple common electrodes (Vcom) that can have openings between individual Vcoms. Some display screens can have an open slit between two adjacent edges of Vcom. Openings in Vcom can allow an electric field to extend from a data line through the Vcom layer. A shield can be disposed over the Vcom opening to help reduce or eliminate an electric field from affecting a pixel material, such as liquid crystal. The shield can be connected to a potential such that electric field is generated substantially between the shield and the data line to reduce or eliminate electric fields reaching the liquid crystal.
摘要翻译：为显示屏和触摸屏数据线附近的公共电极中的开口提供电屏蔽线系统。一些显示器（包括触摸屏）可以包括可以在各个Vcom之间具有开口的多个公共电极（Vcom）。一些显示屏可以在Vcom的两个相邻边缘之间具有开放的狭缝。 Vcom中的开口可以允许电场从数据线延伸通过Vcom层。可以在Vcom开口上设置屏蔽件，以帮助减少或消除电场影响诸如液晶的像素材料。屏蔽可以连接到电位，使得电场基本上在屏蔽和数据线之间产生，以减少或消除到达液晶的电场。

5. 发明申请

US20120154699A1 DISPLAYS WITH MINIMIZED CROSSTALK 有权
标题翻译：显示最小化的CROSSTALK
公开(公告)号：US20120154699A1
公开(公告)日：2012-06-21
申请号：US12975284
申请日：2010-12-21
申请人： Cheng Ho Yu , Ming Xu , Young-Bae Park , Zhibing Ge , Daisuke Nozu , Cheng Chen , Abbas Jamshidi Roudbari , Shih Chang Chang , Shawn R. Gettemy
发明人： Cheng Ho Yu , Ming Xu , Young-Bae Park , Zhibing Ge , Daisuke Nozu , Cheng Chen , Abbas Jamshidi Roudbari , Shih Chang Chang , Shawn R. Gettemy
IPC分类号： G02F1/133 , G09G5/00
CPC分类号： G09G3/18 , G02F1/13338 , G02F2001/134318 , G09G3/3648 , G09G3/3655 , G09G2300/043 , G09G2310/0224 , G09G2310/0283 , G09G2320/0209
摘要： Display ground plane structures may contain slits. Image pixel electrodes in the display may be arranged in rows and columns. Image pixels in the display may be controlled using gate lines that are associated with the rows and data lines that are associated with the columns. An electric field may be produced by each image pixel electrode that extends through a liquid crystal layer to an associated portion of the ground plane. The slits in the ground plane may have a slit width. Data lines may be located sufficiently below the ground plane and sufficiently out of alignment with the slits to minimize crosstalk from parasitic electric fields. A three-column inversion scheme may be used when driving data line signals into the display, so that pairs of pixels that straddle the slits are each driven with a common polarity. Gate line scanning patterns may be used that enhance display uniformity.
摘要翻译：显示接地平面结构可能包含狭缝。显示器中的图像像素电极可以以行和列布置。可以使用与与列相关联的行和数据行相关联的门线来控制显示器中的图像像素。可以通过延伸穿过液晶层的每个图像像素电极产生电场到接地平面的相关部分。接地平面中的狭缝可以具有狭缝宽度。数据线可以充分地位于接地平面的下方，并且与狭缝充分地不对齐，以使来自寄生电场的串扰最小化。当将数据线信号驱动到显示器中时，可以使用三列反转方案，使得跨越狭缝的像素对各自以共同的极性驱动。可以使用增强显示均匀性的栅极线扫描图案。

6. 发明申请

US20120162121A1 SLEW RATE AND SHUNTING CONTROL SEPARATION 审中-公开
标题翻译：怠速和分流控制分离
公开(公告)号：US20120162121A1
公开(公告)日：2012-06-28
申请号：US12976909
申请日：2010-12-22
申请人： Shih Chang Chang , Hopil Bae , Cheng Ho Yu , Ahmad Al-Dahle , Abbas Jamshidi Roudbari
发明人： Shih Chang Chang , Hopil Bae , Cheng Ho Yu , Ahmad Al-Dahle , Abbas Jamshidi Roudbari
IPC分类号： G06F3/045
CPC分类号： G06F3/044 , G06F3/0412 , G06F3/0416 , G06F3/045
摘要： Setting a slew rate, e.g., a rising time or a falling time, of a scanning signal can be performed with a first operation, and a shunting resistance of the scanning line can be set with a second operation. A scanning system that scans a display screen, a touch screen, etc., can set a desired slew rate during a first period of time and can set a desired shunting resistance during a second period of time. A gate line system can sequentially scan gate lines to display an image during a display phase of a touch screen. The gate line system can, for example, increase the falling times of gate line signals. After the falling gate line signal has stabilized, for example, the gate line system can decrease the shunting resistance of the gate line.
摘要翻译：可以通过第一操作来执行扫描信号的转换速率，例如上升时间或下降时间，并且可以通过第二操作来设置扫描线的分流电阻。扫描显示屏，触摸屏等的扫描系统可以在第一时间段期间设置期望的转换速率，并且可以在第二时间段期间设置期望的分流电阻。栅极线系统可以在触摸屏的显示阶段中顺序地扫描栅极线以显示图像。栅极线系统可以例如增加栅极线信号的下降时间。在下降的栅极线信号稳定之后，例如，栅极线系统可以降低栅极线的分流电阻。

7. 发明授权

US10761358B2 Display screen shield line system 有权
公开(公告)号：US10761358B2
公开(公告)日：2020-09-01
申请号：US13126416
申请日：2011-03-03
申请人： Zhibing Ge , Cheng Ho Yu , Young-Bae Park , Abbas Jamshidi Roudbari , Shih Chang Chang , Cheng Chen , Marduke Yousefpor , John Z. Zhong
发明人： Zhibing Ge , Cheng Ho Yu , Young-Bae Park , Abbas Jamshidi Roudbari , Shih Chang Chang , Cheng Chen , Marduke Yousefpor , John Z. Zhong
IPC分类号： G02F1/1362 , G02F1/1333 , G06F3/041 , G06F3/044 , G02F1/1343
摘要： Electrical shield line systems are provided for openings in common electrodes near data lines of display and touch screens. Some displays, including touch screens, can include multiple common electrodes (Vcom) that can have openings between individual Vcoms. Some display screens can have an open slit between two adjacent edges of Vcom. Openings in Vcom can allow an electric field to extend from a data line through the Vcom layer. A shield can be disposed over the Vcom opening to help reduce or eliminate an electric field from affecting a pixel material, such as liquid crystal. The shield can be connected to a potential such that electric field is generated substantially between the shield and the data line to reduce or eliminate electric fields reaching the liquid crystal.

8. 发明授权

US08395715B2 Displays with minimized crosstalk 有权
标题翻译：显示最小的串扰
公开(公告)号：US08395715B2
公开(公告)日：2013-03-12
申请号：US12975284
申请日：2010-12-21
申请人： Cheng Ho Yu , Ming Xu , Young-Bae Park , Zhibing Ge , Daisuke Nozu , Cheng Chen , Abbas Jamshidi Roudbari , Shih Chang Chang , Shawn R. Gettemy
发明人： Cheng Ho Yu , Ming Xu , Young-Bae Park , Zhibing Ge , Daisuke Nozu , Cheng Chen , Abbas Jamshidi Roudbari , Shih Chang Chang , Shawn R. Gettemy
IPC分类号： G02F1/141 , G02F1/133
CPC分类号： G09G3/18 , G02F1/13338 , G02F2001/134318 , G09G3/3648 , G09G3/3655 , G09G2300/043 , G09G2310/0224 , G09G2310/0283 , G09G2320/0209
摘要： Display ground plane structures may contain slits. Image pixel electrodes in the display may be arranged in rows and columns. Image pixels in the display may be controlled using gate lines that are associated with the rows and data lines that are associated with the columns. An electric field may be produced by each image pixel electrode that extends through a liquid crystal layer to an associated portion of the ground plane. The slits in the ground plane may have a slit width. Data lines may be located sufficiently below the ground plane and sufficiently out of alignment with the slits to minimize crosstalk from parasitic electric fields. A three-column inversion scheme may be used when driving data line signals into the display, so that pairs of pixels that straddle the slits are each driven with a common polarity. Gate line scanning patterns may be used that enhance display uniformity.
摘要翻译：显示接地平面结构可能包含狭缝。显示器中的图像像素电极可以以行和列布置。可以使用与与列相关联的行和数据行相关联的门线来控制显示器中的图像像素。可以通过延伸穿过液晶层的每个图像像素电极产生电场到接地平面的相关部分。接地平面中的狭缝可以具有狭缝宽度。数据线可以充分地位于接地平面的下方，并且与狭缝充分地不对齐，以使来自寄生电场的串扰最小化。当将数据线信号驱动到显示器中时，可以使用三列反转方案，使得跨越狭缝的像素对各自以共同的极性驱动。可以使用增强显示均匀性的栅极线扫描图案。

9. 发明申请

US20120293485A1 GATE SIGNAL ADJUSTMENT CIRCUIT 有权
标题翻译：门信号调整电路
公开(公告)号：US20120293485A1
公开(公告)日：2012-11-22
申请号：US13112862
申请日：2011-05-20
申请人： Shih Chang Chang , Ting-Kuo Chang , Abbas Jamshidi Roudbari , Cheng-Ho Yu
发明人： Shih Chang Chang , Ting-Kuo Chang , Abbas Jamshidi Roudbari , Cheng-Ho Yu
IPC分类号： G09G5/00 , H03K5/12
CPC分类号： H03K5/12 , G09G3/3266 , G09G3/3677 , G09G2330/06
摘要： A gate signal adjustment circuit for a display is disclosed. The gate signal adjustment circuit can adjust a transition time of a gate signal used to drive data displaying. The adjustment can be to either speed up or slow down the transition time according to the requirements of the display. In an example, the gate signal adjustment circuit can include multiple transistors, where a first set of the transistors outputs the gate signal and a second set of the transistors outputs an adjustment to the gate signal. The second set of transistors can be the same or different sizes depending on the desirable number of adjustment options. The circuit can also include a control line coupled to the second set of transistors to control the adjustment output. Gate signal adjustment can reduce crosstalk in the display.
摘要翻译：公开了一种用于显示器的门信号调节电路。门信号调整电路可以调整用于驱动数据显示的门信号的转换时间。调整可以根据显示器的要求加快或减慢转换时间。在一个示例中，门信号调整电路可以包括多个晶体管，其中第一组晶体管输出栅极信号，第二组晶体管输出对栅极信号的调整。第二组晶体管可以是相同或不同的尺寸，这取决于所需数量的调节选项。电路还可以包括耦合到第二组晶体管的控制线以控制调节输出。门信号调整可以减少显示屏中的串扰。

10. 发明申请

US20140061656A1 Two Doping Regions in Lightly Doped Drain for Thin Film Transistors and Associated Doping Processes 有权
标题翻译：用于薄膜晶体管和相关掺杂过程的轻掺杂漏极中的两个掺杂区域
公开(公告)号：US20140061656A1
公开(公告)日：2014-03-06
申请号：US13601535
申请日：2012-08-31
申请人： Cheng-Ho Yu , Young Bae Park , Shih Chang Chang
发明人： Cheng-Ho Yu , Young Bae Park , Shih Chang Chang
IPC分类号： H01L27/15 , H01L33/08
CPC分类号： H01L29/78621 , H01L27/1288 , H01L29/78645 , H01L29/78696
摘要： A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack that includes a conductive gate layer, and a semiconductor layer. The method also includes doping the exposed semiconductor layer with a first doping dose. The method further includes etching a portion of the conductive gate layer to expose a portion of the semiconductor layer, and doping the exposed portion of the semiconductor layer with a second doping dose. The method also includes depositing a second photoresist layer over a first portion of the doped semiconductor layer in an active area of the pixels to expose a second portion of the doped semiconductor layer in an area surrounding the active area, and doping the second portion of the doped semiconductor layer with a third doping dose.
摘要翻译：提供了一种制造用于具有像素阵列的LCD的薄膜晶体管（TFT）的方法。该方法包括在包括导电栅极层的TFT堆叠的一部分上沉积第一光致抗蚀剂层和半导体层。该方法还包括以第一掺杂剂量掺杂暴露的半导体层。该方法还包括蚀刻导电栅极层的一部分以暴露半导体层的一部分，并以第二掺杂剂量掺杂半导体层的暴露部分。该方法还包括在像素的有源区域中在掺杂半导体层的第一部分上沉积第二光致抗蚀剂层，以在有源区域周围的区域中暴露掺杂半导体层的第二部分，以及掺杂半导体层的第二部分掺杂半导体层具有第三掺杂剂量。

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