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1. 发明申请

US20060274592A1 Circuit and method for controlling a clock synchronizing circuit for low power refresh operation 失效
公开(公告)号：US20060274592A1
公开(公告)日：2006-12-07
申请号：US11506238
申请日：2006-08-17
申请人： Aaron Schoenfeld , Ross Dermott
发明人： Aaron Schoenfeld , Ross Dermott
IPC分类号： G11C7/00
CPC分类号： G11C7/222 , G11C7/22 , G11C11/406 , G11C2211/4061 , G11C2211/4067
摘要： A method and apparatus is provided for idling a clock synchronizing circuit during at least a portion of time during execution of a refresh operation in a memory device. In a memory device receiving an external clock signal, a method and apparatus for executing a refresh operation is provided that includes initiating at least one refresh operation in the memory device, and ceasing generation of an internal clock signal timed with respect to the external clock signal for at least a portion of the time in which at least one refresh operation takes to complete.

2. 发明申请

US20050078539A1 Circuit and method for controlling a clock synchronizing circuit for low power refresh operation 有权
公开(公告)号：US20050078539A1
公开(公告)日：2005-04-14
申请号：US10684123
申请日：2003-10-09
申请人： Aaron Schoenfeld , Ross Dermott
发明人： Aaron Schoenfeld , Ross Dermott
IPC分类号： G11C7/22 , G11C11/406 , G11C7/00
CPC分类号： G11C7/222 , G11C7/22 , G11C11/406 , G11C2211/4061 , G11C2211/4067
摘要： A method and apparatus is provided for idling a clock synchronizing circuit during at least a portion of time during execution of a refresh operation in a memory device. In a memory device receiving an external clock signal, a method and apparatus for executing a refresh operation is provided that includes initiating at least one refresh operation in the memory device, and ceasing generation of an internal clock signal timed with respect to the external clock signal for at least a portion of the time in which at least one refresh operation takes to complete.

3. 发明申请

US20050254327A1 Circuit and method for controlling a clock synchronizing circuit for low power refresh operation 有权
公开(公告)号：US20050254327A1
公开(公告)日：2005-11-17
申请号：US11184187
申请日：2005-07-18
申请人： Aaron Schoenfeld , Ross Dermott
发明人： Aaron Schoenfeld , Ross Dermott
IPC分类号： G11C7/22 , G11C11/406 , G11C7/00
CPC分类号： G11C7/222 , G11C7/22 , G11C11/406 , G11C2211/4061 , G11C2211/4067
摘要： A method and apparatus is provided for idling a clock synchronizing circuit during at least a portion of time during execution of a refresh operation in a memory device. In a memory device receiving an external clock signal, a method and apparatus for executing a refresh operation is provided that includes initiating at least one refresh operation in the memory device, and ceasing generation of an internal clock signal timed with respect to the external clock signal for at least a portion of the time in which at least one refresh operation takes to complete.

4. 发明授权

US07126393B2 Delay circuit with reset-based forward path static delay 有权
标题翻译：具有基于复位的正向路径静态延迟的延迟电路
公开(公告)号：US07126393B2
公开(公告)日：2006-10-24
申请号：US10922326
申请日：2004-08-20
申请人： Eric Becker , Tyler Gomm , Ross Dermott
发明人： Eric Becker , Tyler Gomm , Ross Dermott
IPC分类号： H03L7/00
CPC分类号： H03L7/0814 , G11C7/22 , G11C7/222
摘要： A delay locked loop circuit and method of operating the same. The delay locked loop circuit comprises a forward delay path having a variable delay portion and a static delay portion, wherein the static delay portion includes a static delay element, a feedback path for generating a feedback signal responsive to an output signal, and a phase detector for comparing the phase of an input signal and the phase of the feedback signal and for generating a variable control signal for controlling the amount of delay provided by the variable delay portion, wherein the static delay element is activated in response to a static control signal indicative of the variable delay portion being unable to lock the output signal to the input signal. Because of the rules governing Abstracts, this Abstract should not be used to construe the claims.
摘要翻译：延迟锁定环电路及其操作方法。所述延迟锁定环电路包括具有可变延迟部分和静态延迟部分的前向延迟路径，其中所述静态延迟部分包括静态延迟元件，用于产生响应于输出信号的反馈信号的反馈路径，以及相位检测器用于比较输入信号的相位和反馈信号的相位，并用于产生用于控制由可变延迟部分提供的延迟量的可变控制信号，其中静态延迟元件响应于指示的静态控制信号而被激活的可变延迟部分不能将输出信号锁定到输入信号。由于摘要规则，本摘要不应用于解释权利要求。

5. 发明授权

US07276947B2 Delay circuit with reset-based forward path static delay 有权
标题翻译：具有基于复位的正向路径静态延迟的延迟电路
公开(公告)号：US07276947B2
公开(公告)日：2007-10-02
申请号：US11493872
申请日：2006-07-26
申请人： Eric Becker , Tyler Gomm , Ross Dermott
发明人： Eric Becker , Tyler Gomm , Ross Dermott
IPC分类号： H03L7/00
CPC分类号： H03L7/0814 , G11C7/22 , G11C7/222
摘要： A delay locked loop circuit and method of operating the same. The delay locked loop circuit comprises a forward delay path having a variable delay portion and a static delay portion, wherein the static delay portion includes a static delay element, a feedback path for generating a feedback signal responsive to an output signal, and a phase detector for comparing the phase of an input signal and the phase of the feedback signal and for generating a variable control signal for controlling the amount of delay provided by the variable delay portion, wherein the static delay element is activated in response to a static control signal indicative of the variable delay portion being unable to lock the output signal to the input signal. Because of the rules governing Abstracts, this Abstract should not be used to construe the claims.
摘要翻译：延迟锁定环电路及其操作方法。所述延迟锁定环电路包括具有可变延迟部分和静态延迟部分的前向延迟路径，其中所述静态延迟部分包括静态延迟元件，用于产生响应于输出信号的反馈信号的反馈路径，以及相位检测器用于比较输入信号的相位和反馈信号的相位，并用于产生用于控制由可变延迟部分提供的延迟量的可变控制信号，其中静态延迟元件响应于指示的静态控制信号而被激活的可变延迟部分不能将输出信号锁定到输入信号。由于摘要规则，本摘要不应用于解释权利要求。

6. 发明申请

US20060038597A1 Delay circuit with reset-based forward path static delay 有权
公开(公告)号：US20060038597A1
公开(公告)日：2006-02-23
申请号：US10922326
申请日：2004-08-20
申请人： Eric Becker , Tyler Gomm , Ross Dermott
发明人： Eric Becker , Tyler Gomm , Ross Dermott
IPC分类号： H03L7/06
CPC分类号： H03L7/0814 , G11C7/22 , G11C7/222
摘要： A delay locked loop circuit and method of operating the same. The delay locked loop circuit comprises a forward delay path having a variable delay portion and a static delay portion, wherein the static delay portion includes a static delay element, a feedback path for generating a feedback signal responsive to an output signal, and a phase detector for comparing the phase of an input signal and the phase of the feedback signal and for generating a variable control signal for controlling the amount of delay provided by the variable delay portion, wherein the static delay element is activated in response to a static control signal indicative of the variable delay portion being unable to lock the output signal to the input signal. Because of the rules governing Abstracts, this Abstract should not be used to construe the claims.

7. 发明授权

US07683305B2 Method and apparatus for ambient light detection 有权
标题翻译：环境光检测方法和装置
公开(公告)号：US07683305B2
公开(公告)日：2010-03-23
申请号：US11905094
申请日：2007-09-27
申请人： Johannes Solhusvik , Trygve Willassen , Ross Dermott , Michael Hartmann
发明人： Johannes Solhusvik , Trygve Willassen , Ross Dermott , Michael Hartmann
IPC分类号： H01L27/00 , G01J1/44
CPC分类号： G01J1/46 , G01J1/02 , G01J1/0228 , G01J1/4204 , G09G3/3406 , G09G2360/144 , H04N5/232 , H04N5/23241 , H04N5/341
摘要： An imaging method and apparatus which use a pixel array for capturing images and for measuring ambient light conditions.
摘要翻译：一种使用像素阵列捕获图像和测量环境光条件的成像方法和装置。

8. 发明申请

US20090084943A1 Method and apparatus for ambient light detection 有权
标题翻译：环境光检测方法和装置
公开(公告)号：US20090084943A1
公开(公告)日：2009-04-02
申请号：US11905094
申请日：2007-09-27
申请人： Johannes Solhusvik , Trygve Willassen , Ross Dermott , Michael Hartmann
发明人： Johannes Solhusvik , Trygve Willassen , Ross Dermott , Michael Hartmann
IPC分类号： G01J1/44
CPC分类号： G01J1/46 , G01J1/02 , G01J1/0228 , G01J1/4204 , G09G3/3406 , G09G2360/144 , H04N5/232 , H04N5/23241 , H04N5/341
摘要： An imaging method and apparatus which use a pixel array for capturing images and for measuring ambient light conditions.
摘要翻译：一种使用像素阵列捕获图像和测量环境光条件的成像方法和装置。

9. 发明申请

US20060261871A1 Delay circuit with reset-based forward path static delay 有权
公开(公告)号：US20060261871A1
公开(公告)日：2006-11-23
申请号：US11493872
申请日：2006-07-26
申请人： Eric Becker , Tyler Gomm , Ross Dermott
发明人： Eric Becker , Tyler Gomm , Ross Dermott
IPC分类号： H03L7/06
CPC分类号： H03L7/0814 , G11C7/22 , G11C7/222
摘要： A delay locked loop circuit and method of operating the same. The delay locked loop circuit comprises a forward delay path having a variable delay portion and a static delay portion, wherein the static delay portion includes a static delay element, a feedback path for generating a feedback signal responsive to an output signal, and a phase detector for comparing the phase of an input signal and the phase of the feedback signal and for generating a variable control signal for controlling the amount of delay provided by the variable delay portion, wherein the static delay element is activated in response to a static control signal indicative of the variable delay portion being unable to lock the output signal to the input signal. Because of the rules governing Abstracts, this Abstract should not be used to construe the claims.

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