专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2008079239A2 METHODS AND APPARATUS FOR SENSING SUBSTRATES IN CARRIERS 审中-公开
标题翻译：传感基座在载体上的方法和装置
公开(公告)号：WO2008079239A2
公开(公告)日：2008-07-03
申请号：PCT/US2007/025962
申请日：2007-12-19
申请人： APPLIED MATERIALS, INC. , KOSHTI, Sushant, S. , ENGLHARDT, Eric, A. , SHAH, Vinay, K.
发明人： KOSHTI, Sushant, S. , ENGLHARDT, Eric, A. , SHAH, Vinay, K.
IPC分类号： H01L21/677 , B65D79/00 , B65D25/56
CPC分类号： H01L21/67265 , H01L21/67259
摘要： In some aspects, a method is provided for mapping contents of a substrate carrier. The method includes (1) moving a carrier to a sensor; and (2) determining, with the sensor, a presence or an absence of a substrate in the carrier based upon a position of a substrate clamp in the carrier. Numerous other aspects are provided.
摘要翻译：在一些方面，提供了一种用于映射衬底载体的内容的方法。该方法包括（1）将载体移动到传感器; 以及（2）基于所述载体中的基板夹具的位置，使用所述传感器确定所述载体中基板的存在或不存在。提供了许多其他方面。

2. 发明申请

WO2014163791A1 SEMICONDUCTOR DEVICE MANUFACTURING PLATFORM WITH SINGLE AND TWINNED PROCESSING CHAMBERS 审中-公开
标题翻译：半导体器件制造平台与单和双工艺加热器
公开(公告)号：WO2014163791A1
公开(公告)日：2014-10-09
申请号：PCT/US2014/016476
申请日：2014-02-14
申请人： APPLIED MATERIALS, INC
发明人： MERRY, Nir , RICE, Michael, Robert , KOSHTI, Sushant, S. , HUDGENS, Jeffrey, C.
IPC分类号： H01L21/02
CPC分类号： H01L21/6719 , H01L21/67196
摘要： A transfer chamber for semiconductor device manufacturing includes (1) a plurality of sides that define a region configured to maintain a vacuum level and allow transport of substrates between processing chambers, the plurality of sides defining a first portion and a second portion of the transfer chamber and including (a) a first side that couples to two twinned processing chambers; and (b) a second side that couples to a single processing chamber; (2) a first substrate handler located in the first portion of the transfer chamber; (3) a second substrate handler located in the second portion of the transfer chamber; and (4) a hand-off location configured to allow substrates to be passed between the first portion and the second portion of the transfer chamber using the first and second substrate handlers. Method aspects are also provided.
摘要翻译：用于半导体器件制造的传送室包括（1）限定被配置为保持真空度并允许在处理室之间传送衬底的区域的多个侧面，所述多个侧面限定传送室的第一部分和第二部分并且包括（a）耦合到两个孪生处理室的第一面; 和（b）耦合到单个处理室的第二侧; （2）位于传送室的第一部分中的第一衬底处理器; （3）位于所述传送室的第二部分中的第二衬底处理器; 和（4）切换位置，其配置为允许基板使用第一和第二基板处理器在传送室的第一部分和第二部分之间通过。还提供了方法方面。

3. 发明申请

WO2008147521A1 USE OF LOGICAL LOTS IN SEMICONDUCTOR SUBSTRATE PROCESSING 审中-公开
标题翻译：半导体基板处理中逻辑LOTS的使用
公开(公告)号：WO2008147521A1
公开(公告)日：2008-12-04
申请号：PCT/US2008/006584
申请日：2008-05-24
申请人： APPLIED MATERIALS, INC. , KOSHTI, Sushant, S. , SHAH, Vinay, K. , ENGLHARDT, Eric, A.
发明人： KOSHTI, Sushant, S. , SHAH, Vinay, K. , ENGLHARDT, Eric, A.
IPC分类号： G05B19/418 , H01L21/00
CPC分类号： H01L21/67276 , H01L21/67271
摘要： In some embodiments, a method of processing substrates is provided that includes (1) grouping substrates in a plurality of substrate carriers as a logical lot; (2) processing the logical lot as if the substrates were stored in a single substrate carrier; and (3) performing metrology on a representative subset of substrates in the logical lot. Numerous other embodiments are provided.
摘要翻译：在一些实施例中，提供了处理衬底的方法，其包括（1）将多个衬底载体中的衬底分组为逻辑批次; （2）处理逻辑批次，好像基板存储在单个基板载体中; 和（3）在逻辑批次中的基板的代表性子集上执行计量。提供了许多其它实施例。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式