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1. 发明申请

WO2002091583A1 MODIFIED REPETITIVE CELL MATCHING TECHNIQUE FOR INTEGRATED CIRCUITS 审中-公开
标题翻译：用于集成电路的改进的重复细胞匹配技术
公开(公告)号：WO2002091583A1
公开(公告)日：2002-11-14
申请号：PCT/US2002/011772
申请日：2002-04-12
申请人： ANALOG Devices, INC
发明人： KRANZ, Rodney, Louis , LANE, Charles, D. , JARMAN, David
IPC分类号： H03M1/36
CPC分类号： H03M1/0678 , H03M1/36
摘要： An integrated circuit including a number of repetitive cells for producing output signals in response to respective inputs, each cell(14,16,18) having associated with it an output circuit responsive to the cell output signal to produce an output circuit output signal, each of the output circuits including a circuit device having two terminals to provide for the flow therethrough of a current from an associated current supply(137) and producing a corresponding output signal; the improvement for producing the effectsof cell mismatch and output circuit mismatch including an impedance network(150), having a set of impedance elements each connected between corresponding terminals or respective pairs of the circuits with each circuit device forming a part of a respective output circuit(110,112), the impedance elements reducing the efforts of cell mismatch and output circuit mismatch on the output signals; there maybe one impedance network which accommodates mismatch es in both the cell and output circuits or there may be one impedance network to accommodate cell mismatch and another to accommodate output circuit mismatch.
摘要翻译：一种集成电路，包括响应于相应输入产生输出信号的多个重复单元，每个单元（14,16,18）具有与其相关联的输出电路，响应于单元输出信号以产生输出电路输出信号，每个输出电路包括具有两个端子的电路装置，用于提供来自相关电流源（137）的电流流过并产生相应的输出信号; 用于产生电池失配和输出电路失配的影响的改进，包括阻抗网络（150），其具有各自连接在相应端子或相应电路对之间的一组阻抗元件，每个电路装置形成相应输出电路的一部分（ 110,112），阻抗元件减少了输出信号的电池失配和输出电路失配的努力; 可能存在一个阻抗网络，其适应电池和输出电路中的不匹配，或者可以存在一个阻抗网络以适应电池失配，另一个阻抗网络适应输出电路不匹配。

2. 发明授权

EP1386402B1 MODIFIED REPETITIVE CELL MATCHING TECHNIQUE FOR INTEGRATED CIRCUITS 有权
标题翻译：改进的，重复的细胞比较时技术集成电路
公开(公告)号：EP1386402B1
公开(公告)日：2008-11-05
申请号：EP02769266.4
申请日：2002-04-12
申请人： Analog Devices, Inc.
发明人： KRANZ, Rodney, Louis , LANE, Charles, D. , JARMAN, David
IPC分类号： H03M1/36 , H03M1/06
CPC分类号： H03M1/0678 , H03M1/36
摘要： An integrated circuit including a number of repetitive cells for producing output signals in response to respective inputs, each cell(14,16,18) having associated with it an output circuit responsive to the cell output signal to produce an output circuit output signal, each of the output circuits including a circuit device having two terminals to provide for the flow therethrough of a current from an associated current supply(137) and producing a corresponding output signal; the improvement for producing the effectsof cell mismatch and output circuit mismatch including an impedance network(150), having a set of impedance elements each connected between corresponding terminals or respective pairs of the circuits with each circuit device forming a part of a respective output circuit(110,112), the impedance elements reducing the efforts of cell mismatch and output circuit mismatch on the output signals; there maybe one impedance network which accommodates mismatch es in both the cell and output circuits or there may be one impedance network to accommodate cell mismatch and another to accommodate output circuit mismatch.

3. 发明公开

EP1386402A1 MODIFIED REPETITIVE CELL MATCHING TECHNIQUE FOR INTEGRATED CIRCUITS 有权
标题翻译：改进的，重复的细胞比较时技术集成电路
公开(公告)号：EP1386402A1
公开(公告)日：2004-02-04
申请号：EP02769266.4
申请日：2002-04-12
申请人： Analog Devices, Inc.
发明人： KRANZ, Rodney, Louis , LANE, Charles, D. , JARMAN, David
IPC分类号： H03M1/36
CPC分类号： H03M1/0678 , H03M1/36
摘要： An integrated circuit including a number of repetitive cells for producing output signals in response to respective inputs, each cell(14,16,18) having associated with it an output circuit responsive to the cell output signal to produce an output circuit output signal, each of the output circuits including a circuit device having two terminals to provide for the flow therethrough of a current from an associated current supply(137) and producing a corresponding output signal; the improvement for producing the effectsof cell mismatch and output circuit mismatch including an impedance network(150), having a set of impedance elements each connected between corresponding terminals or respective pairs of the circuits with each circuit device forming a part of a respective output circuit(110,112), the impedance elements reducing the efforts of cell mismatch and output circuit mismatch on the output signals; there maybe one impedance network which accommodates mismatch es in both the cell and output circuits or there may be one impedance network to accommodate cell mismatch and another to accommodate output circuit mismatch.

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