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1. 发明申请

WO2013185988A1 SENSOR ARRANGEMENT AND METHOD FOR GENERATING AN AMPLIFIED SENSOR SIGNAL 审中-公开
标题翻译：传感器布置和产生放大传感器信号的方法
公开(公告)号：WO2013185988A1
公开(公告)日：2013-12-19
申请号：PCT/EP2013/059732
申请日：2013-05-10
申请人： AMS AG
发明人： STEINER, Matthias
IPC分类号： H04R19/04 , H03F1/34
CPC分类号： G01R27/2605 , G01R1/30 , H03F1/34 , H04R19/005 , H04R19/04
摘要： A sensor arrangement (10) comprises an amplifier (11) having a signal input (12) to receive an input signal (SIN) and a signal output (13) to provide an amplified sensor signal (SOUT) that is an inverted signal with respect to the input signal (SIN). Furthermore, the sensor arrangement (10) comprises a feedback path connecting the signal output (13) to the signal input (12), wherein the feedback path comprises a series connection of a capacitive sensor (14) and a feedback capacitor (15). A voltage source arrangement (19) of the sensor arrangement (10) is connected to a feedback node (18) between the capacitive sensor (14) and the feedback capacitor (15).
摘要翻译：传感器装置（10）包括具有用于接收输入信号（SIN）的信号输入（12）和信号输出（13）的放大器（11），以提供作为反相信号的放大的传感器信号（SOUT），其相对于到输入信号（SIN）。此外，传感器装置（10）包括将信号输出（13）连接到信号输入端（12）的反馈路径，其中反馈路径包括电容传感器（14）和反馈电容器（15）的串联连接。传感器装置（10）的电压源装置（19）连接到电容传感器（14）和反馈电容器（15）之间的反馈节点（18）。

2. 发明申请

WO2020126475A1 TRANSCONDUCTOR CIRCUITRY WITH ADAPTIVE BIASING 审中-公开
公开(公告)号：WO2020126475A1
公开(公告)日：2020-06-25
申请号：PCT/EP2019/083477
申请日：2019-12-03
申请人： AMS AG
发明人： STEINER, Matthias , GREER, Nigel
IPC分类号： H03F3/45
摘要： A transconductor circuitry (10) with adaptive biasing comprises a first input terminal (ElOa) to apply a first input signal (inp), and a second input terminal (ElOb) to apply a second input signal (inn). A control circuit (200) is configured to control a first controllable current source (110) in a first current path (101) and a second controllable current source (120) in a second current path (102) in response to at least one of a first potential of a first node (Nl) of the first current path (101) and a second potential of a second node (N2) of the second current path (102). The first node (Nl) is located between a first transistor (150) and the first controllable current source (110), and the second node (N2) is located between a second transistor (160) and the second controllable current source (120).

3. 发明申请

WO2017092980A1 AMPLIFIER ARRANGEMENT AND SWITCHED CAPACITOR INTEGRATOR 审中-公开
标题翻译：放大器布置和开关电容集成器
公开(公告)号：WO2017092980A1
公开(公告)日：2017-06-08
申请号：PCT/EP2016/076999
申请日：2016-11-08
申请人： AMS AG
发明人： STEINER, Matthias , FITZI, Andreas
IPC分类号： H03F1/26 , H03F3/00 , H03F3/45 , H03F3/42
CPC分类号： H03F1/26 , H03F3/005 , H03F3/423 , H03F3/4521 , H03F3/45645 , H03F2200/129 , H03F2200/264 , H03F2200/372 , H03F2200/555 , H03F2200/75 , H03F2203/45082 , H03F2203/45088 , H03F2203/45091 , H03F2203/45116 , H03F2203/45134 , H03F2203/45156 , H03F2203/45171 , H03F2203/45174 , H03F2203/45208 , H03F2203/45221 , H03F2203/45244 , H03F2203/45352 , H03F2203/45416 , H03F2203/45434 , H03F2203/45481 , H03F2203/45512 , H03F2203/45544 , H03F2203/45551 , H03F2203/45561 , H03F2203/45616
摘要： An amplifier arrangement has a first differential stage with a first transistor pair, a second differential stage with a first and a second transistor pair, each pair having a common source connection coupled to a drain terminal to a respective one of the transistors of the first differential stage. The amplifier arrangement further has a first complementary differential stage with a transistor pair having opposite conductivity type compared to the transistor pair of the first differential stage, and a second complementary differential stage with a first and a second transistor pair of the complementary conductivity type. The first and the second complementary differential stage are connected symmetrically compared to the first and the second differential stage. The transistors of the second complementary differential stage are symmetrically connected to the transistors of the second differential stage such that respective first, second, third and fourth current paths are formed. A pair of output terminals is coupled to the first and the fourth current path. Gate terminals of the transistors of each of the stages are coupled to a respective pair of input terminals.
摘要翻译：放大器装置具有带有第一晶体管对的第一差分级，具有第一和第二晶体管对的第二差分级，每一对具有公共源极连接，该公共源极连接耦合至漏极端子第一差分级的一个晶体管。放大器装置还具有第一互补差分级和第二互补差分级，第一互补差分级具有与第一差分级的晶体管对相比导电类型相反的晶体管对，第二互补差分级具有互补导电类型的第一和第二晶体管对。与第一和第二差动级相比，第一和第二互补差动级对称地连接。第二互补差分级的晶体管对称地连接到第二差分级的晶体管，使得分别形成第一，第二，第三和第四电流路径。一对输出端子耦合到第一和第四电流路径。每个级的晶体管的栅极端子耦合到相应的一对输入端子。

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