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1. 发明申请

WO2021023369A1 CONVERTER ARRANGEMENT 审中-公开
公开(公告)号：WO2021023369A1
公开(公告)日：2021-02-11
申请号：PCT/EP2019/071032
申请日：2019-08-05
申请人： ABB SCHWEIZ AG
发明人： SCHROEDER, Arne , COTTET, Didier , PIASECKI, Wojciech , GRECKI, Filip , WUNSCH, Bernhard , NILSSON, Torsten
IPC分类号： H02M1/44 , H02J3/36 , H02M7/00 , H02M7/483
摘要： A converter arrangement (10A) comprises at least one first string of electrically interconnected modules (12A, 14A, 16A, 18A, 20A, 22A) and a first and a second screen (24A, 26A), where the first screen (24A) is connected to a first defined electric potential and is placed adjacent a first group of modules (G1A) in the first string comprising at least one first module (14A) and the second screen (26A) is connected to a second defined electric potential and is placed adjacent a second group of modules (G2A) in the first string comprising at least one second module (18A), where in operation a resonance loop is created from the first module (14A) via the first and second screens (24A, 26A) and the second module (18A) back to the first module (14A) and the converter arrangement further comprises a damping unit (32A) in the resonance loop set to dampen electromagnetic noise.

2. 发明申请

WO2018109069A1 POWER SEMICONDUCTOR MODULE WITH LOW GATE PATH INDUCTANCE 审中-公开
公开(公告)号：WO2018109069A1
公开(公告)日：2018-06-21
申请号：PCT/EP2017/082777
申请日：2017-12-14
申请人： ABB SCHWEIZ AG , AUDI AG
发明人： COTTET, Didier , TRAUB, Felix , SCHUDERER, Jürgen , APELSMEIER, Andreas , ASAM, Johann
IPC分类号： H01L23/498 , H01L25/07
摘要： A power semiconductor module (10), comprises a housing (60); a power semiconductor chip (14) within the housing (60); power terminals (24) protruding from the housing (60) and electrically interconnected with power electrodes (18) of the semiconductor chip (14); and auxiliary terminals (46) protruding from the housing (60) and electrically interconnected with a gate electrode (16) and one of the power electrodes (18); wherein three auxiliary terminals (46a, 46b) are arranged in a coaxial auxiliary terminal arrangement (52), which comprises an inner and two outer auxiliary terminals (46a, 46b), which are arranged on opposing sides of the inner auxiliary terminal (46a). The inner auxiliary terminal (46a) is electrically interconnected with the gate electrode (16) or one of the power electrodes (18) and the two outer auxiliary terminals (46b) are electrically connected with the other one of the gate electrode (16) and the one of the power electrodes (18).

3. 发明申请

WO2020114660A1 HYBRID SHORT CIRCUIT FAILURE MODE PREFORM FOR POWER SEMICONDUCTOR DEVICES 审中-公开
公开(公告)号：WO2020114660A1
公开(公告)日：2020-06-11
申请号：PCT/EP2019/078249
申请日：2019-10-17
申请人： ABB SCHWEIZ AG
发明人： COTTET, Didier , KICIN, Slavo
IPC分类号： H01L23/62 , H01L25/07
摘要： A power semiconductor module comprises a base plate (1); a semiconductor chip (2) disposed on and in contact with a top surface of the base plate (1), a preform (3) disposed on and in contact with a top surface of the semiconductor chip (2); and a pressing element (4) in contact with and applying a pressure onto a top surface of the preform (3). The preform (3) comprises a first electrically conductive layer (6) and a second electrically conductive layer (5). The first electrically conductive layer (6) has at least one protrusion (7) protruding towards the top surface of the semiconductor chip (2) and defining a recess (9) in the first electrically conductive layer (6) of the preform (3), wherein the recess (9) may annularly surround the protrusion (7). The at least one protrusion (7) is made from the same material as the first electrically conducting layer (6) and integrally formed with it or the first electrically conducting layer (6) and the at least one protrusion (7) are made from different materials. At least a portion of the second electrically conductive layer (5) is positioned in the recess (9) and on the top surface of the semiconductor chip (2). The material of the at least one protrusion (7) has a higher melting point than the material of the second electrically conductive layer (5). The power semiconductor module is configured so that in an event of semiconductor chip failure with heat dissipation, the protrusion (7) of the first electrically conductive layer (6) penetrates through residual material (8) of the semiconductor chip (2) upon pressure applied by the pressing element (4) towards the base plate (1) so as to establish a contact between the protrusion (7) of the first electrically conductive layer (6) and the base plate (1) and form a short circuit bridging the defective semiconductor chip (2) in a short circuit failure mode. The bottom surface of the preform (3) may be formed by a bottom surface of the second electrically conductive layer (5) alone or by a bottom surface of the second electrically conductive layer (5) and a bottom surface of the protrusion (7).

4. 发明公开

EP3164876A1 CAPACITOR ASSEMBLY WITH COOLING ARRANGEMENT 审中-公开
标题翻译：带冷却装置的电容器组件
公开(公告)号：EP3164876A1
公开(公告)日：2017-05-10
申请号：EP14734514.4
申请日：2014-07-03
申请人： ABB Schweiz AG
发明人： PATHEY, Timothy , COTTET, Didier , AGOSTINI, Francesco
IPC分类号： H01G2/08 , H01G4/38 , H01G11/10 , H01G9/26
CPC分类号： H01G2/08 , H01G4/38 , H01G9/14 , H01G9/26 , H01G11/10 , H01G11/18 , Y02E60/13
摘要： A capacitor assembly (200) comprising a group of wound film capacitor elements (210) and a cooling arrangement (350, 651, 652) is disclosed. Each capacitor element extends in an axial direction (A) between two axial end faces (211) and in a radial direction (R) crossing the axial direction. Each capacitor element extends more in the radial direction than in the axial direction. The cooling arrangement is adapted to provide a transfer of heat (230) through spaces (240) defined between adjacent axial end faces of neighboring capacitor elements. The transfer of heat through a space defined by the axial end faces of two neighboring capacitor elements is directed across the axial directions of the two neighboring capacitor elements. The capacitor assembly is applicable in for instance high voltage direct current, HVDC, power converters, but also in other electronic devices.
摘要翻译：公开了包括一组卷绕薄膜电容器元件（210）和冷却装置（350,651,652）的电容器组件（200）。每个电容器元件沿两个轴向端面（211）之间的轴向方向（A）以及与轴向方向交叉的径向方向（R）延伸。每个电容器元件在径向方向上比在轴向方向上更多地延伸。该冷却装置适于提供热量（230）通过限定在相邻电容器元件的相邻轴向端面之间的空间（240）的传递。热量通过由两个相邻电容器元件的轴向端面限定的空间的传导被引导穿过两个相邻电容器元件的轴向方向。该电容器组件适用于例如高压直流电，HVDC，电力转换器，但也适用于其他电子设备。

5. 发明授权

EP3246945B1 POWER MODULE WITH LOW STRAY INDUCTANCE 有权转让
公开(公告)号：EP3246945B1
公开(公告)日：2018-10-03
申请号：EP16170452.3
申请日：2016-05-19
申请人： ABB Schweiz AG , AUDI AG
发明人： COTTET, Didier , TRAUB, Felix
IPC分类号： H01L25/18 , H01L23/24 , H01L25/07 , H02M7/00 , H01L23/538
CPC分类号： H01L23/142 , H01L23/24 , H01L23/5386 , H01L24/06 , H01L24/48 , H01L24/49 , H01L25/072 , H01L25/18 , H01L2224/0603 , H01L2224/49111 , H01L2224/49113 , H01L2224/49175 , H01L2924/1304 , H01L2924/19107 , H01L2924/30107 , H02M7/003
摘要： A power module (10) providing a half bridge (32) comprises at least one substrate (12) and an inner metallization area (16), two intermediate metallization areas (18) and two outer metallization areas (20), each of which extends in a longitudinal direction (L) of the at least one substrate (12); wherein the two intermediate metallization areas (18) are arranged besides the inner metallization area (16) with respect to a cross direction (C) of the at least one substrate (12) and each outer metallization area (20) is arranged beside one of the two intermediate metallization areas (18) with respect to the cross direction (C); wherein the power module (10) comprises two inner sets (22) of semiconductor switches (24), each inner set (22) of semiconductor switches (24) bonded to an intermediate metallization area (18) and electrically connected to the inner metallization area (16), such that the inner sets (22) of semiconductor switches (24) form a first arm (34) of the half bridge (32); wherein the power module (10) comprises two outer sets (28) of semiconductor switches (24), each outer set (28) of semiconductor switches (24) bonded to an outer metallization area (20) and electrically connected to an intermediate metallization area (18), such that the outer sets (28) of semiconductor switches (24) form a second arm (36) of the half bridge (32).

6. 发明授权

EP3050213B1 SYSTEM FOR TRANSMITTING AND RECEIVING A POWER LINE COMMUNICATION SIGNAL OVER THE POWER BUS OF A POWER ELECTRONIC CONVERTER 有权转让
公开(公告)号：EP3050213B1
公开(公告)日：2020-11-18
申请号：EP14783565.6
申请日：2014-09-24
申请人： ABB Schweiz AG
发明人： DZUNG, Dacfey , COTTET, Didier , ROUND, Simon Douglas
IPC分类号： H03K17/605 , H03K17/61 , H04B3/56

7. 发明公开

EP3246945A1 POWER MODULE WITH LOW STRAY INDUCTANCE 有权转让
标题翻译：低电感电源模块
公开(公告)号：EP3246945A1
公开(公告)日：2017-11-22
申请号：EP16170452.3
申请日：2016-05-19
申请人： ABB Schweiz AG , AUDI AG
发明人： COTTET, Didier , TRAUB, Felix
IPC分类号： H01L25/07 , H01L23/538 , H02M7/00
CPC分类号： H01L23/142 , H01L23/24 , H01L23/5386 , H01L24/06 , H01L24/48 , H01L24/49 , H01L25/072 , H01L25/18 , H01L2224/0603 , H01L2224/49111 , H01L2224/49113 , H01L2224/49175 , H01L2924/1304 , H01L2924/19107 , H01L2924/30107 , H02M7/003
摘要： A power module (10) providing a half bridge (32) comprises at least one substrate (12) and an inner metallization area (16), two intermediate metallization areas (18) and two outer metallization areas (20), each of which extends in a longitudinal direction (L) of the at least one substrate (12); wherein the two intermediate metallization areas (18) are arranged besides the inner metallization area (16) with respect to a cross direction (C) of the at least one substrate (12) and each outer metallization area (20) is arranged beside one of the two intermediate metallization areas (18) with respect to the cross direction (C); wherein the power module (10) comprises two inner sets (22) of semiconductor switches (24), each inner set (22) of semiconductor switches (24) bonded to an intermediate metallization area (18) and electrically connected to the inner metallization area (16), such that the inner sets (22) of semiconductor switches (24) form a first arm (34) of the half bridge (32); wherein the power module (10) comprises two outer sets (28) of semiconductor switches (24), each outer set (28) of semiconductor switches (24) bonded to an outer metallization area (20) and electrically connected to an intermediate metallization area (18), such that the outer sets (28) of semiconductor switches (24) form a second arm (36) of the half bridge (32).
摘要翻译：提供半桥（32）的功率模块（10）包括至少一个衬底（12）和内部金属化区域（16），两个中间金属化区域（18）和两个外部金属化区域（20），每个中间金属化区域在所述至少一个衬底（12）的纵向方向（L）上; 其中所述两个中间金属化区域（18）相对于所述至少一个衬底（12）的横向（C）布置在所述内部金属化区域（16）之外，并且每个外部金属化区域（20）布置在所述至少一个两个中间金属化区域（18）相对于横向（C）; 其中功率模块（10）包括两个半导体开关（24）的内部组（22），半导体开关（24）的每个内部组（22）结合到中间金属化区域（18）并且电连接到内部金属化区域（16），使得半导体开关（24）的内部组（22）形成半桥（32）的第一臂（34）; 其特征在于，所述功率模块（10）包括两个半导体开关（24）的外部组（28），每个外部组（28）半导体开关（24）接合到外部金属化区域（20）并且电连接到中间金属化区域（18），使得半导体开关（24）的外组（28）形成半桥（32）的第二臂（36）。

8. 发明公开

EP3114913A1 ENCLOSURE FOR POWER ELECTRONIC COMPONENTS 有权转让
标题翻译： GEHÄUSEFÜRLEISTUNGSELEKTRONISCHE BAUELEMENTE
公开(公告)号：EP3114913A1
公开(公告)日：2017-01-11
申请号：EP15706253.0
申请日：2015-02-26
申请人： ABB Schweiz AG
发明人： GRADINGER, Thomas , DONZEL, Lise , COTTET, Didier , GREUTER, Felix
IPC分类号： H05K7/14
CPC分类号： H05K7/1432
摘要： The present invention relates to an Enclosure for power electronic components, comprising: an enclosure wall (22) comprising an insulating material, a first conductive layer (24) covering a portion of an inner face (26) of the enclosure wall (22), and a second conductive layer (28) covering at least a portion of an outer face (30) of the enclosure wall (22), wherein the first (24) and the second (28) conductive layers are electrically insulated from each other by the enclosure wall (22) and are capable of exhibiting a different electrical potential, and wherein at least a portion of the inner face (26) of the enclosure wall (22) not being covered with a conductive layer (24, 28) and abutting the portion being covered by the conductive layer (24, 28) is covered by a resistive material layer (34). Such an enclosure (20) provides an improved insulation, especially with regard to field grading.
摘要翻译：本发明涉及一种用于电力电子部件的外壳，包括：包括绝缘材料的外壳壁（22），覆盖外壳壁（22）的内表面（26）的一部分的第一导电层（24）以及覆盖所述封闭壁（22）的外表面（30）的至少一部分的第二导电层（28），其中所述第一导电层（24）和所述第二导电层（28）彼此电绝缘壳体壁（22）并且能够呈现不同的电势，并且其中外壳壁（22）的内表面（26）的至少一部分不被导电层（24,28）覆盖并且邻接由导电层（24,28）覆盖的部分被电阻材料层（34）覆盖。这种外壳（20）提供了改进的绝缘，特别是在现场分级方面。

9. 发明公开

EP3105791A1 SEMICONDUCTOR MODULE WITH TWO AUXILIARY EMITTER CONDUCTOR PATHS 有权转让
标题翻译：有两个额外的辐射源CONDUCTORS半导体模块
公开(公告)号：EP3105791A1
公开(公告)日：2016-12-21
申请号：EP15700263.5
申请日：2015-01-14
申请人： ABB Schweiz AG
发明人： HARTMANN, Samuel , COTTET, Didier , KICIN, Slavo
IPC分类号： H01L23/64 , H01L25/07 , H03K17/082 , H03K17/12
CPC分类号： H01L29/7393 , H01L23/02 , H01L23/645 , H01L24/48 , H01L25/072 , H01L27/088 , H01L29/41708 , H01L29/4232 , H01L2224/4813 , H01L2924/00014 , H01L2924/0002 , H01L2924/13055 , H02M1/088 , H03K17/0424 , H03K17/08116 , H03K17/0828 , H03K17/127 , H01L2924/00 , H01L2224/45099 , H01L2224/85399 , H01L2224/05599
摘要： A semiconductor module comprises a semiconductor chip comprising a semiconductor switch having a collector, emitter and gate, a collector terminal connected to the collector, gate terminal connected to the gate, an emitter terminal connected to the emitter via an emitter conductor path having an emitter inductance, an auxiliary emitter terminal connected to the emitter, a first conductor path connected to the emitter, and a second conductor path connected to the emitter having a different mutually inductive coupling with the emitter conductor path as the first conductor path. The first conductor path and the second conductor path are connectable to the auxiliary emitter terminal and/or the first conductor path is connected to the auxiliary emitter terminal and the second conductor path is connected to a second auxiliary emitter terminal. The semiconductor switch is an IGBT and each of the first conductor path and the second conductor path comprises bridging points for connecting the respective conductor path to the auxiliary emitter terminal.

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