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    • 6. 发明公开
    • 음성 인식 장치 및 그 제어 방법
    • 语音识别装置及其控制方法
    • KR1020140074229A
    • 2014-06-17
    • KR1020130151129
    • 2013-12-06
    • 삼성전자주식회사
    • 박은상김경덕김명재리우유류성한이근배
    • G10L15/28G10L15/22
    • G10L15/22G10L15/1822G10L2015/228
    • Disclosed are a voice recognition device and a control method thereof. According to the present invention, the voice recognition device includes: an extraction unit which extracts one among a first speech element which indicates an execution order from the speech of a user and a second speech element which indicates a target; a domain determination unit which determines the current domain to provide response data for the speech based on the first and the second speech element; and a control unit which determines a dialog frame candidate to provide response data for the speech on at least one among the current domain and the previous domain based on the dialog status on the current domain and a predetermined previous domain from the previous speech of the user. By doing so, the voice recognition device is able to provide response data appropriate for user intention in consideration of a large number of cases for speeches from a user.
    • 公开了一种语音识别装置及其控制方法。 根据本发明,语音识别装置包括:提取单元,从指示用户的语音的指示执行顺序的第一语音单元和表示目标的第二语音单元中提取单元; 域确定单元,其基于第一和第二语音元素确定当前域以提供用于语音的响应数据; 以及控制单元,其基于当前域的对话状态和来自用户的先前语音的预定的先前域,确定在当前域和先前域中的至少一个上为语音提供语音的响应数据的对话框候选 。 通过这样做,考虑到来自用户的演讲的大量情况,语音识别装置能够提供适合于用户意图的响应数据。
    • 7. 发明公开
    • 음성인식장치 및 음성인식방법
    • 语音识别装置和语音识别方法
    • KR1020140054643A
    • 2014-05-09
    • KR1020120120374
    • 2012-10-29
    • 삼성전자주식회사
    • 박은상김명재리우유박거근
    • G10L15/00G10L15/28
    • G10L17/00G10L15/30G10L15/32
    • A voice recognition apparatus according to the present invention comprises a voice receiving part which receives the voice signal of a user; a first voice recognition engine which receives the voice signal and performs a voice recognition process; a communication part which receives the voice signal and transmits the voice signal to an external second voice recognition engine; and a control part which controls the transmission of the voice signal received by the voice receiving part so that the voice signal is transmitted to one among the first voice recognition engine and the communication part, based on the selection of the user.
    • 根据本发明的语音识别装置包括接收用户的语音信号的语音接收部分; 第一语音识别引擎,其接收语音信号并执行语音识别处理; 通信部件,其接收所述语音信号并将所述语音信号发送到外部第二语音识别引擎; 以及控制部,其基于所述用户的选择,控制由所述语音接收部接收到的语音信号的发送,使得所述语音信号被发送到所述第一语音识别引擎和所述通信部中的一个。
    • 9. 发明公开
    • 노어형 플래시 메모리 장치의 행 디코딩 회로
    • NOR型闪存存储器件的ROD解码电路
    • KR1020020039095A
    • 2002-05-25
    • KR1020000068999
    • 2000-11-20
    • 삼성전자주식회사
    • 변대석김명재임영호
    • G11C16/08
    • G11C16/08G11C16/12G11C16/16G11C16/30G11C29/80
    • PURPOSE: A row decoding circuit of a NOR type flash memory device is provided, which reduces an occupied layout area by embodying a local decoder using a depletion mode transistor. CONSTITUTION: The memory device includes a global word line decoder circuit(120), the first and the second local decoder circuits(140a,140b) and the first and the second sector selection circuits(160a,160b). Global word lines(GWL0-GWLn) are connected to the global word line decoder circuit. The first and the second local decoder circuits correspond to sectors(100a,100b) respectively, and the first and the second sector selection circuits correspond to the first and the second local decoder circuit respectively. The first and the second local decoder circuit include a plurality of depletion mode NMOS transistors(M0-Mn), and each transistor corresponds to the local word lines of a corresponding sector. The NMOS transistors of the first local decoder circuit have gates connected to a selection signal or a control signal(SWSa) supplied from the first sector selection circuit, and the NMOS transistors of the second local decoder circuit have gates connected to a selection signal or a control signal from the second sector selection circuit.
    • 目的:提供NOR型闪速存储器件的行解码电路,其通过使用耗尽型晶体管实现本地解码器来减少占用的布局面积。 构成:存储器件包括全局字线解码器电路(120),第一和第二本地解码器电路(140a,140b)和第一和第二扇区选择电路(160a,160b)。 全局字线(GWL0-GWLn)连接到全局字线解码电路。 第一和第二本地解码器电路分别对应于扇区(100a,100b),并且第一和第二扇区选择电路分别对应于第一和第二本地解码器电路。 第一和第二本地解码器电路包括多个耗尽型NMOS晶体管(M0-Mn),并且每个晶体管对应于相应扇区的本地字线。 第一本地解码器电路的NMOS晶体管具有连接到从第一扇区选择电路提供的选择信号或控制信号(SWSa)的栅极,并且第二本地解码器电路的NMOS晶体管具有连接到选择信号或 来自第二扇区选择电路的控制信号。
    • 10. 发明公开
    • 정류 회로
    • 修复电路
    • KR1020010046526A
    • 2001-06-15
    • KR1019990050322
    • 1999-11-12
    • 삼성전자주식회사
    • 김명재
    • G11C5/14
    • PURPOSE: A rectifying circuit is provided to normally operates even when boosting voltage supplied from a charge pump boosting circuit reach the value near to internal boosting voltage. CONSTITUTION: The rectifying circuit rectifies the first voltage from the outside in response to a reference voltage and outputs the rectified voltage as the second voltage and includes first through fourth MOS transistors(102,106,104,110) and a resistance(108). The first MOS transistor has one current path and a gate. The second MOS transistor has one current path and a gate being controlled by the reference voltage. The current paths of the first and second MOS transistors are sequentially formed between the first voltage and the ground voltage in series. The third MOS transistor has a current path formed between the first voltage and the first node and a gate. The gates of the second and third transistors are connected to a connection node of the current paths of the first and second transistors. The resistance is connected between the first node and the ground voltage. The fourth MOS transistor has a current path formed between the first and second voltages and a gate connected to the first node.
    • 目的:提供整流电路,即使从电荷泵升压电路提供的升压电压达到接近内部升压电压的值,也能正常工作。 结构:整流电路响应于参考电压对外部的第一电压进行整流,并输出整流电压作为第二电压,并包括第一至第四MOS晶体管(102,106,104,110)和电阻(108)。 第一MOS晶体管具有一个电流通路和一个栅极。 第二MOS晶体管具有一个电流路径,栅极由参考电压控制。 第一和第二MOS晶体管的电流路径依次形成在第一电压和接地电压之间。 第三MOS晶体管具有形成在第一电压和第一节点之间的电流路径和栅极。 第二和第三晶体管的栅极连接到第一和第二晶体管的电流路径的连接节点。 电阻连接在第一节点和地电压之间。 第四MOS晶体管具有形成在第一和第二电压之间的电流路径和连接到第一节点的栅极。