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1. 发明申请

US20080003703A1 CONTROL OF HOT CARRIER INJECTION IN A METAL-OXIDE SEMICONDUCTOR DEVICE 有权
标题翻译：金属氧化物半导体器件中热载体注入的控制
公开(公告)号：US20080003703A1
公开(公告)日：2008-01-03
申请号：US11853417
申请日：2007-09-11
申请人： Peter Gammel , Isik Kizilyalli , Marco Mastrapasqua , Muhammed Shibib , Zhijian Xie , Shuming Xu
发明人： Peter Gammel , Isik Kizilyalli , Marco Mastrapasqua , Muhammed Shibib , Zhijian Xie , Shuming Xu
IPC分类号： H01L21/66
CPC分类号： H01L29/402 , H01L29/41 , H01L29/7835
摘要： In a metal-oxide semiconductor device including first and second source/drain regions of a first conductivity type formed in a semiconductor layer of a second conductivity type proximate an upper surface of the semiconductor layer, a drift region formed in the semiconductor layer proximate the upper surface of the semiconductor layer and at least partially between the first and second source/drain regions, an insulating layer formed on at least a portion of the upper surface of the semiconductor layer, and a gate formed on the insulating layer and at least partially between the first and second source/drain regions, a method for controlling an amount of hot carrier injection degradation in the device includes the steps of: forming a shielding structure on the insulating layer above at least a portion of the drift region and substantially between the gate and the second source/drain region; and adjusting an amount of coverage of the shielding structure over an upper surface of the drift region so as to minimize the amount of hot-carrier injection degradation while maintaining a breakdown voltage in the device which is greater than or equal to a prescribed value.
摘要翻译：在包括形成在靠近半导体层的上表面的第二导电类型的半导体层中的第一导电类型的第一和第二源极/漏极区域的金属氧化物半导体器件中，形成在靠近上部的半导体层中的漂移区域半导体层的表面，并且至少部分地在第一和第二源极/漏极区之间，形成在半导体层的上表面的至少一部分上的绝缘层和形成在绝缘层上的栅极，并且至少部分地在第一和/ 第一和第二源极/漏极区域，用于控制器件中热载流子注入劣化量的方法包括以下步骤：在绝缘层上形成屏蔽结构，该屏蔽结构位于漂移区域的至少一部分上方并且基本上在栅极和第二源极/漏极区域; 以及调整所述屏蔽结构在所述漂移区域的上表面上的覆盖范围，以便在保持所述器件中的击穿电压大于或等于规定值的同时使热载流子注入劣化的量最小化。

2. 发明申请

US20050110083A1 Metal-oxide-semiconductor device having improved gate arrangement 审中-公开
标题翻译：具有改进的栅极布置的金属氧化物半导体器件
公开(公告)号：US20050110083A1
公开(公告)日：2005-05-26
申请号：US10719197
申请日：2003-11-21
申请人： Peter Gammel , Muhammed Shibib , Zhijian Xie , Shuming Xu
发明人： Peter Gammel , Muhammed Shibib , Zhijian Xie , Shuming Xu
IPC分类号： H01L29/78 , H01L21/8234 , H01L29/06 , H01L29/423 , H01L29/76
CPC分类号： H01L29/7801 , H01L21/823481 , H01L29/0619 , H01L29/0696 , H01L29/4238 , H01L29/7816 , H01L29/7835
摘要： An MOS device comprises a semiconductor layer of a first conductivity type and first and second source/drain regions of a second conductivity type formed in the semiconductor layer proximate an upper surface of the semiconductor layer. The first and second source/drain regions are spaced laterally apart relative to one another and are formed in an active region of the semiconductor layer. The MOS device further comprises a gate formed above the semiconductor layer proximate the upper surface of the semiconductor layer and at least partially between the first and second source/drain regions. The gate is configured such that a dimension of the gate, defined substantially parallel to at least one of the first and second source/drain regions, is confined to be substantially within the active region of the device. An isolation structure is formed in the semiconductor layer, the isolation structure being configured to substantially isolate the first source/drain region from the second source/drain region.
摘要翻译： MOS器件包括第一导电类型的半导体层和形成在半导体层中的靠近半导体层的上表面的第二导电类型的第一和第二源极/漏极区域。第一和第二源极/漏极区域相对于彼此横向间隔开，并且形成在半导体层的有源区中。 MOS器件还包括形成在半导体层上方的接近半导体层的上表面并且至少部分地在第一和第二源极/漏极区之间的栅极。栅极被配置为使得基本上平行于第一和第二源极/漏极区域中的至少一个限定的栅极的尺寸被限制为基本上位于器件的有源区域内。在半导体层中形成隔离结构，隔离结构被配置为使第一源极/漏极区域与第二源极/漏极区域基本上隔离。

3. 发明申请

US20050017298A1 Shielding structure for use in a metal-oxide-semiconductor device 有权
标题翻译：用于金属氧化物半导体器件的屏蔽结构
公开(公告)号：US20050017298A1
公开(公告)日：2005-01-27
申请号：US10623983
申请日：2003-07-21
申请人： Zhijian Xie , Shuming Xu
发明人： Zhijian Xie , Shuming Xu
IPC分类号： H01L21/336 , H01L23/522 , H01L29/06 , H01L29/40 , H01L29/417 , H01L29/78 , H01L29/76 , H01L31/062
CPC分类号： H01L29/402 , H01L23/5225 , H01L29/4175 , H01L29/66659 , H01L29/7835 , H01L2924/0002 , H01L2924/00
摘要： An MOS device is formed comprising a semiconductor layer of a first conductivity type, a first source/drain region of a second conductivity type formed in the semiconductor layer, and a second source/drain region of the second conductivity type formed in the semiconductor layer and spaced apart from the first source/drain region. The MOS device further comprises a gate formed proximate an upper surface of the semiconductor layer and at least partially between the first and second source/drain regions, and a shielding structure formed proximate the upper surface of the semiconductor layer and between the gate and the second source/drain region, the shielding structure being electrically connected to the first source/drain region, the shielding structure being spaced laterally from the gate and being non-overlapping relative to the gate. In this manner, the MOS device is substantially compatible with a CMOS process technology.
摘要翻译：形成MOS器件，其包括形成在半导体层中的第一导电类型的半导体层，第二导电类型的第一源极/漏极区域和形成在半导体层中的第二导电类型的第二源极/漏极区域，以及与第一源极/漏极区间隔开。 MOS器件还包括形成在半导体层的上表面附近并且至少部分地在第一和第二源极/漏极区之间的栅极，以及靠近半导体层的上表面并且在栅极和第二源极/漏极之间形成的屏蔽结构源极/漏极区域，屏蔽结构电连接到第一源极/漏极区域，屏蔽结构与栅极横向间隔开并且相对于栅极不重叠。以这种方式，MOS器件与CMOS工艺技术基本兼容。

4. 发明授权

US06828628B2 Diffused MOS devices with strained silicon portions and methods for forming same 有权
标题翻译：具有应变硅部分的扩散MOS器件及其形成方法
公开(公告)号：US06828628B2
公开(公告)日：2004-12-07
申请号：US10382142
申请日：2003-03-05
申请人： John Michael Hergenrother , Muhammed Ayman Shibib , Shuming Xu , Zhijian Xie
发明人： John Michael Hergenrother , Muhammed Ayman Shibib , Shuming Xu , Zhijian Xie
IPC分类号： H01L2972
CPC分类号： H01L29/7802 , H01L29/165 , H01L29/267 , H01L29/7813 , H01L29/7835
摘要： A diffused MOS device comprises one or more strained silicon portions formed in a carrier transit path of the DMOS device. The one or more strained silicon portions may comprise a layer of strained silicon, generally formed above a layer of lattice mismatch material such as silicon germanium or silicon carbide. The carrier transit path is at least partially defined by a body of the DMOS device, and may also include other regions, such as a diffusion area, channel region, or accumulation region. The one or more strained silicon portions may be formed only in selected regions of the DMOS device or may be formed as a layer throughout. The one or more strained silicon portions may be formed through patterning of a hard mask, forming a lattice mismatch layer, forming a strained silicon layer, and removing the hard mask. Trenches may also be formed prior to forming the lattice mismatch material on the patterned hard mask.
摘要翻译：扩散MOS器件包括形成在DMOS器件的载流子传输路径中的一个或多个应变硅部分。一个或多个应变硅部分可以包括通常在诸如硅锗或碳化硅的晶格失配材料层之上形成的应变硅层。载体传输路径至少部分地由DMOS设备的主体限定，并且还可以包括诸如扩散区域，信道区域或累积区域的其他区域。一个或多个应变硅部分可以仅形成在DMOS器件的选定区域中，或者可以形成为整个层。可以通过图案化硬掩模，形成晶格失配层，形成应变硅层和去除硬掩模来形成一个或多个应变硅部分。也可以在图案化的硬掩模上形成晶格失配材料之前形成沟槽。

5. 发明申请

US20050280100A1 Laterally diffused MOS device 审中-公开
标题翻译：左侧扩散MOS器件
公开(公告)号：US20050280100A1
公开(公告)日：2005-12-22
申请号：US10870102
申请日：2004-06-17
申请人： Michael Artaki , Isik Kizilyalli , Zhijian Xie
发明人： Michael Artaki , Isik Kizilyalli , Zhijian Xie
IPC分类号： H01L21/336 , H01L29/10 , H01L29/49 , H01L29/76 , H01L29/78
CPC分类号： H01L29/1045 , H01L29/1095 , H01L29/4916 , H01L29/4933 , H01L29/66659 , H01L29/66681 , H01L29/7816 , H01L29/7835
摘要： Significant improvement in gain is achievable in a laterally diffused MOS device without substantial change in threshold voltage. Such improvement in a device having a channel with lateral dopant gradient of at least a factor of 10 per micrometer of channel is attained using a P-type gate. For example, a gm of 0.02 S/mm (at VDS=28 V) and a drain breakdown of more than 70V with gate oxide of 350 Å is possible with a threshold voltage of 3.5 volts.
摘要翻译：在横向扩散的MOS器件中可以实现增益的显着改善，而阈值电压没有实质的变化。使用P型栅极获得具有横向掺杂剂梯度通道至少为每微米通道10倍的通道的器件的这种改进。例如，在阈值电压为3.5伏的情况下，可以使用0.02S / mm（VDS = 28V）和大于70V的栅极氧化物的漏极击穿。

6. 发明授权

US07820517B2 Control of hot carrier injection in a metal-oxide semiconductor device 有权
标题翻译：在金属氧化物半导体器件中控制热载流子注入
公开(公告)号：US07820517B2
公开(公告)日：2010-10-26
申请号：US11853417
申请日：2007-09-11
申请人： Peter L. Gammel , Isik C. Kizilyalli , Marco G. Mastrapasqua , Muhammed Ayman Shibib , Zhijian Xie , Shuming Xu
发明人： Peter L. Gammel , Isik C. Kizilyalli , Marco G. Mastrapasqua , Muhammed Ayman Shibib , Zhijian Xie , Shuming Xu
IPC分类号： H01L21/00
CPC分类号： H01L29/402 , H01L29/41 , H01L29/7835
摘要： In a metal-oxide semiconductor device including first and second source/drain regions of a first conductivity type formed in a semiconductor layer of a second conductivity type proximate an upper surface of the semiconductor layer, a drift region formed in the semiconductor layer proximate the upper surface of the semiconductor layer and at least partially between the first and second source/drain regions, an insulating layer formed on at least a portion of the upper surface of the semiconductor layer, and a gate formed on the insulating layer and at least partially between the first and second source/drain regions, a method for controlling an amount of hot carrier injection degradation in the device includes the steps of: forming a shielding structure on the insulating layer above at least a portion of the drift region and substantially between the gate and the second source/drain region; and adjusting an amount of coverage of the shielding structure over an upper surface of the drift region so as to minimize the amount of hot-carrier injection degradation while maintaining a breakdown voltage in the device which is greater than or equal to a prescribed value.
摘要翻译：在包括形成在靠近半导体层的上表面的第二导电类型的半导体层中的第一导电类型的第一和第二源极/漏极区域的金属氧化物半导体器件中，形成在靠近上部的半导体层中的漂移区域半导体层的表面，并且至少部分地在第一和第二源极/漏极区之间，形成在半导体层的上表面的至少一部分上的绝缘层和形成在绝缘层上的栅极，并且至少部分地在第一和/ 第一和第二源极/漏极区域，用于控制器件中热载流子注入劣化量的方法包括以下步骤：在绝缘层上形成屏蔽结构，该屏蔽结构位于漂移区域的至少一部分上方并且基本上在栅极和第二源极/漏极区域; 以及调整所述屏蔽结构在所述漂移区域的上表面上的覆盖范围，以便在保持所述器件中的击穿电压大于或等于规定值的同时使热载流子注入劣化的量最小化。

7. 发明授权

US07279744B2 Control of hot carrier injection in a metal-oxide semiconductor device 有权
标题翻译：在金属氧化物半导体器件中控制热载流子注入
公开(公告)号：US07279744B2
公开(公告)日：2007-10-09
申请号：US10977732
申请日：2004-10-29
申请人： Peter L. Gammel , Isik C. Kizilyalli , Marco G. Mastrapasqua , Muhammed Ayman Shibib , Zhijian Xie , Shuming Xu
发明人： Peter L. Gammel , Isik C. Kizilyalli , Marco G. Mastrapasqua , Muhammed Ayman Shibib , Zhijian Xie , Shuming Xu
IPC分类号： H01L29/76
CPC分类号： H01L29/402 , H01L29/41 , H01L29/7835
摘要： An MOS device is formed including a semiconductor layer of a first conductivity type, and first and second source/drain regions of a second conductivity type formed in the semiconductor layer proximate an upper surface of the semiconductor layer, the first and second source/drain regions being spaced apart relative to one another. A drift region is formed in the semiconductor layer proximate the upper surface of the semiconductor layer and at least partially between the first and second source/drain regions. An insulating layer is formed on at least a portion of the upper surface of the semiconductor layer and above at least a portion of the drift region. A gate is formed on the insulating layer and at least partially between the first and second source/drain regions. The MOS device further includes a shielding structure formed on the insulating layer above at least a portion of the drift region. The shielding structure is configured such that an amount of hot carrier injection degradation in the MOS device is controlled as a function of an amount of coverage of the shielding structure over an upper surface of the drift region.
摘要翻译：形成MOS器件，其包括第一导电类型的半导体层，以及形成在靠近半导体层的上表面的半导体层中的第二导电类型的第一和第二源极/漏极区域，第一和第二源极/漏极区域相对于彼此间隔开。在靠近半导体层的上表面的半导体层中至少部分地在第一和第二源/漏区之间形成漂移区。绝缘层形成在半导体层的上表面的至少一部分上方和漂移区的至少一部分上方。栅极形成在绝缘层上并且至少部分地在第一和第二源/漏区之间。 MOS器件还包括形成在漂移区的至少一部分上方的绝缘层上的屏蔽结构。屏蔽结构被配置为使得MOS器件中的热载流子注入劣化量被控制为在漂移区域的上表面上的屏蔽结构的覆盖量的函数。

8. 发明授权

US07138690B2 Shielding structure for use in a metal-oxide-semiconductor device 有权
标题翻译：用于金属氧化物半导体器件的屏蔽结构
公开(公告)号：US07138690B2
公开(公告)日：2006-11-21
申请号：US10623983
申请日：2003-07-21
申请人： Zhijian Xie , Shuming Xu
发明人： Zhijian Xie , Shuming Xu
IPC分类号： H01L29/78
CPC分类号： H01L29/402 , H01L23/5225 , H01L29/4175 , H01L29/66659 , H01L29/7835 , H01L2924/0002 , H01L2924/00
摘要： An MOS device is formed comprising a semiconductor layer of a first conductivity type, a first source/drain region of a second conductivity type formed in the semiconductor layer, and a second source/drain region of the second conductivity type formed in the semiconductor layer and spaced apart from the first source/drain region. The MOS device further comprises a gate formed proximate an upper surface of the semiconductor layer and at least partially between the first and second source/drain regions, and a shielding structure formed proximate the upper surface of the semiconductor layer and between the gate and the second source/drain region, the shielding structure being electrically connected to the first source/drain region, the shielding structure being spaced laterally from the gate and being non-overlapping relative to the gate. In this manner, the MOS device is substantially compatible with a CMOS process technology.
摘要翻译：形成MOS器件，其包括形成在半导体层中的第一导电类型的半导体层，第二导电类型的第一源极/漏极区域和形成在半导体层中的第二导电类型的第二源极/漏极区域，以及与第一源极/漏极区间隔开。 MOS器件还包括形成在半导体层的上表面附近并且至少部分地在第一和第二源极/漏极区之间的栅极，以及靠近半导体层的上表面并且在栅极和第二源极/漏极之间形成的屏蔽结构源极/漏极区域，屏蔽结构电连接到第一源极/漏极区域，屏蔽结构与栅极横向间隔开并且相对于栅极不重叠。以这种方式，MOS器件与CMOS工艺技术基本兼容。

9. 发明申请

US20050156234A1 Control of hot carrier injection in a metal-oxide semiconductor device 有权
标题翻译：在金属氧化物半导体器件中控制热载流子注入
公开(公告)号：US20050156234A1
公开(公告)日：2005-07-21
申请号：US10977732
申请日：2004-10-29
申请人： Peter Gammel , Isik Kizilyalli , Marco Mastrapasqua , Muhammed Shibib , Zhijian Xie , Shuming Xu
发明人： Peter Gammel , Isik Kizilyalli , Marco Mastrapasqua , Muhammed Shibib , Zhijian Xie , Shuming Xu
IPC分类号： H01L21/336 , H01L29/40 , H01L29/41 , H01L29/76 , H01L29/78 , H01L31/113
CPC分类号： H01L29/402 , H01L29/41 , H01L29/7835
摘要： An MOS device is formed including a semiconductor layer of a first conductivity type, and first and second source/drain regions of a second conductivity type formed in the semiconductor layer proximate an upper surface of the semiconductor layer, the first and second source/drain regions being spaced apart relative to one another. A drift region is formed in the semiconductor layer proximate the upper surface of the semiconductor layer and at least partially between the first and second source/drain regions. An insulating layer is formed on at least a portion of the upper surface of the semiconductor layer and above at least a portion of the drift region. A gate is formed on the insulating layer and at least partially between the first and second source/drain regions. The MOS device further includes a shielding structure formed on the insulating layer above at least a portion of the drift region. The shielding structure is configured such that an amount of hot carrier injection degradation in the MOS device is controlled as a function of an amount of coverage of the shielding structure over an upper surface of the drift region.
摘要翻译：形成MOS器件，其包括第一导电类型的半导体层，以及形成在靠近半导体层的上表面的半导体层中的第二导电类型的第一和第二源极/漏极区域，第一和第二源极/漏极区域相对于彼此间隔开。在靠近半导体层的上表面的半导体层中至少部分地在第一和第二源/漏区之间形成漂移区。绝缘层形成在半导体层的上表面的至少一部分上方和漂移区的至少一部分上方。栅极形成在绝缘层上并且至少部分地在第一和第二源/漏区之间。 MOS器件还包括形成在漂移区的至少一部分上方的绝缘层上的屏蔽结构。屏蔽结构被配置为使得MOS器件中的热载流子注入劣化量被控制为在漂移区域的上表面上的屏蔽结构的覆盖量的函数。

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