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1. 发明专利

DE102020134254A1 Verfahren zur Messung der Trittkraft an einem Tretantrieb und Tretantrieb mit mindestens einem Kraftsensor 未知
公开(公告)号：DE102020134254A1
公开(公告)日：2022-06-23
申请号：DE102020134254
申请日：2020-12-18
申请人： SCHEFTLEIN FRANK , ZHANG GANG , ZHONG MING
发明人： SCHEFTLEIN FRANK , ZHANG GANG , ZHONG MING
IPC分类号： B62M6/50
摘要： Die vorliegende Erfindung betrifft ein Verfahren zur Messung der Trittkraft an einem Tretantrieb (1) mittels mindestens eines Kraftsensors (100), wobei der Tretantrieb (1) zumindest durch zwei durch eine in einem Lagergehäuse (101) mittels eines Tretlagers (105) drehbar gelagerte Tretlagerwelle (102) miteinander verbundene Tretkurbeln (103) sowie mindestens einem mit einer Tretkurbel (103) verbundenen Antriebsblatt (104) gebildet ist, welches mit mindestens einem weiteren Antriebsblatt über eine Kette oder einen Riemen verbunden ist. Das erfindungsgemäße Verfahren ist dadurch gekennzeichnet, dass die durch die angespannte Kette oder den Riemen auf ein Bauteil des Tretantriebs (1) ausgeübte Zugkraft (K) mittels des mindestens einen Kraftsensors (100) ermittelt wird.

2. 发明专利

DE102021108107A1 Photovoltaik-Einheit für Gewässer 未知
公开(公告)号：DE102021108107A1
公开(公告)日：2022-10-06
申请号：DE102021108107
申请日：2021-03-30
申请人： SCHULTE ENNO , ZHANG GANG
发明人： ZHANG GANG , SCHULTE ENNO
IPC分类号： H02S20/30 , B63B21/00
摘要： Die Erfindung betrifft eine PV-Einheit (100) zum Einsatz auf Gewässern, insbesondere auf dem Meer. Gemäß einer bevorzugten Ausführungsform kann dabei ein Modulfeld (120) mit mindestens einem PV-Modul situationsabhängig von einer Betriebsposition an der Gewässeroberfläche (GO) in eine Tauchposition (ST) unterhalb der Gewässeroberfläche (GO) verlagert werden. Zu diesem Zweck ist das Modulfeld (120) vorzugsweise positionsveränderlich mit einem Feldhalter (110) verbunden, welcher am Gewässerboden (GB) fixiert ist.

3. 发明申请

WO2009036221A1 OSCILLATOR SIGNAL GENERATION WITH SPUR MITIGATION IN A WIRELESS COMMUNICATION DEVICE 审中-公开
标题翻译：振荡器信号发生在无线通信设备中的缓和
公开(公告)号：WO2009036221A1
公开(公告)日：2009-03-19
申请号：PCT/US2008/076085
申请日：2008-09-11
申请人： QUALCOMM Incorporated , KIM, Hong Sun , KIM, Jin Wook , ZHANG, Gang , DUNWORTH, Jeremy Darren , PALS, Timothy Paul
发明人： KIM, Hong Sun , KIM, Jin Wook , ZHANG, Gang , DUNWORTH, Jeremy Darren , PALS, Timothy Paul
IPC分类号： H03L7/107 , H03L7/193 , H03L7/197
CPC分类号： H03L7/193 , H03L7/107 , H03L7/1976
摘要： Techniques for generating oscillator signals in a wireless communication device are described. A phase-locked loop (PLL) may be used to generate an oscillator signal for a selected frequency channel. Different PLL settings may be used for the blocks in the PLL for different frequency channels. The different PLL settings may be for different PLL loop bandwidths, different amounts of charge pump current, different frequency equations associated with different sets of high and low divider ratios, different frequency division schemes associated with different prescaler ratios and/or different integer divider ratios, high side or low side injection for a super-heterodyne receiver or transmitter, and/or different supply voltages for one or more circuit blocks such as an oscillator. A suitable set of PLL settings may be selected for each frequency channel such that adverse impact due to spurs can be mitigated.
摘要翻译：描述了在无线通信设备中产生振荡器信号的技术。可以使用锁相环（PLL）来产生所选频道的振荡器信号。对于不同的频率通道，PLL中的块可能使用不同的PLL设置。不同的PLL设置可能是针对不同的PLL环路带宽，不同的电荷泵浦电流量，与不同的高和低分频比组相关的不同频率方程，与不同的预分频比和/或不同的整数分频比相关的不同分频方案，用于超外差接收器或发射器的高侧或低侧注入，和/或用于一个或多个电路块（例如振荡器）的不同电源电压。可以为每个频道选择合适的一组PLL设置，从而可以减轻由于刺激引起的不利影响。

4. 发明申请

WO2005065433A3 ELECTROCHEMICAL FABRICATION METHODS INCORPORATING DIELECTRIC MATERIALS AND/OR USING DIELECTRIC SUBSTRATES 审中-公开
标题翻译：电介质材料和/或使用电介质基板的电化学制造方法
公开(公告)号：WO2005065433A3
公开(公告)日：2006-03-30
申请号：PCT/US2005000061
申请日：2005-01-03
申请人： MICROFABRICA INC , COHEN ADAM L , LOCKARD MICHAEL S , KIM KIEUN , LE QUI T , ZHANG GANG , FRODIS URI , MCPHERSON DALE S , SMALLEY DENNIS R
发明人： COHEN ADAM L , LOCKARD MICHAEL S , KIM KIEUN , LE QUI T , ZHANG GANG , FRODIS URI , MCPHERSON DALE S , SMALLEY DENNIS R
IPC分类号： B44C1/22 , C03C15/00 , C03C25/68 , C23C18/16 , C23F1/00 , C25D5/02 , C25D5/10 , C25D5/34 , H01L21/288 , H01L21/44 , H01L21/4763 , H01L21/768 , B05D1/36
CPC分类号： B44C1/22 , B33Y10/00 , B81C1/00492 , C03C15/00 , C03C25/68 , C23C18/1605 , C23C18/161 , C23C18/1651 , C23C18/1653 , C23C18/405 , C23F1/00 , C25D1/003 , C25D5/02 , C25D5/10 , H01L21/2885 , H01L21/44 , H01L21/4763 , H01L21/76885
摘要： Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures (222) on dielectric or partially dielectric substrates (202). Certain embodiments deposit seed layer material (206) directly onto substrate materials while other embodiments use an intervening adhesion layer material (324). Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial (212) and structural (216) conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material (702), at least one conductive sacrificial material (706), and at least one dielectric material (704). In some embodiments the dielectric material is a UV-curable photopolymer.
摘要翻译：本发明的一些实施例涉及用于在电介质或部分电介质基底（202）上建立单层或多层结构（222）的技术。某些实施例将种子层材料（206）直接沉积到基底材料上，而其它实施例使用中间粘合层材料（324）。一些实施例使用用于牺牲（212）和结构（216）导电建筑材料的不同种子层材料和/或粘合层材料。一些实施例将种子层和/或粘合层材料应用于有选择性的方式，而其他实施例以毯子的方式应用材料。一些实施例通过平面化操作去除外来沉积物（例如沉积到非预期形成层的一部分的区域），而其它实施例通过蚀刻操作去除外来材料。其它实施方案涉及使用至少一种导电结构材料（702），至少一种导电牺牲材料（706）和至少一种电介质材料（704）形成的多层中尺度或微结构结构的电化学制造。在一些实施方案中，介电材料是可UV固化的光聚合物。

5. 发明申请

WO2005065431A3 MICROPROBE TIPS AND METHODS FOR MAKING 审中-公开
标题翻译： MICROPROBE提示和制作方法
公开(公告)号：WO2005065431A3
公开(公告)日：2005-12-08
申请号：PCT/US2005000301
申请日：2005-01-03
申请人： MICROFABRICA INC , KIM KIEUN , COHEN ADAM L , LARSEN WILLA M , CHEN RICHARD T , KUMAR ANANDA H , KRUGLICK EZEKIEL J J , ARAT VACIT , ZHANG GANG , LOCKARD MICHAEL S , BANG CHRISTOPHER A , THOMPSON JEFFREY A
发明人： KIM KIEUN , COHEN ADAM L , LARSEN WILLA M , CHEN RICHARD T , KUMAR ANANDA H , KRUGLICK EZEKIEL J J , ARAT VACIT , ZHANG GANG , LOCKARD MICHAEL S , BANG CHRISTOPHER A , THOMPSON JEFFREY A
IPC分类号： G01R3/00 , G01R31/02
CPC分类号： G01R3/00
摘要： Embodiments of the present invention are directed to the formation of microprobe tips elements (164) having a variety of configurations. In some embodiments tips (164) are formed from the same building material as the probes themselves, while in other embodiments the tips (164) may be formed from a different material and/or may include a coating material (508). In some embodiments, the tips (164) are formed before the main portions of the probes and the tips (164) are formed in proximity to or in contact with a temporary substrate (152). Probe tip patterning may occur in a variety of different ways, including, for example, via molding in patterned holes that have been isotropically or anisotropically etched silicon, via molding in voids formed in over exposed photoresist, via molding in voids in a sacrificial material that have formed as a result of the sacrificial material mushrooming over carefully sized and located regions of dielectric material, via isotropic etching of a the tip material around carefully sized placed etching shields, via hot pressing, and the like.
摘要翻译：本发明的实施例涉及形成具有各种构造的微探针尖元件（164）。在一些实施例中，尖端（164）由与探针本身相同的建筑材料形成，而在其它实施例中，尖端（164）可由不同材料形成和/或可包括涂层材料（508）。在一些实施例中，尖端（164）形成在探针的主要部分之前，并且尖端（164）形成在临时衬底（152）附近或与其接触。探针尖端图案化可以以各种不同的方式发生，包括例如通过在各向异性或各向异性地蚀刻硅的图案化孔中模制，通过在暴露在光致抗蚀剂中的空隙中模制，通过在牺牲材料中的空隙中模制，由于牺牲材料在电介质材料的精细尺寸和定位的区域上的形成，通过各种各向同性的蚀刻尖端材料，围绕小心尺寸放置的蚀刻屏蔽件，通过热压等形成。

6. 发明申请

WO2005065433A2 ELECTROCHEMICAL FABRICATION METHODS INCORPORATING DIELECTRIC MATERIALS AND/OR USING DIELECTRIC SUBSTRATES 审中-公开
标题翻译：电介质材料和/或使用电介质基板的电化学制造方法
公开(公告)号：WO2005065433A2
公开(公告)日：2005-07-21
申请号：PCT/US2005/000061
申请日：2005-01-03
申请人： MICROFABRICA INC. , COHEN, Adam, L. , LOCKARD, Michael, S. , KIM, Kieun , LE, Qui, T. , ZHANG, Gang , FRODIS, Uri , MCPHERSON, Dale, S. , SMALLEY, Dennis, R.
发明人： COHEN, Adam, L. , LOCKARD, Michael, S. , KIM, Kieun , LE, Qui, T. , ZHANG, Gang , FRODIS, Uri , MCPHERSON, Dale, S. , SMALLEY, Dennis, R.
IPC分类号： B44C1/22 , C03C15/00 , C03C25/68 , C23C18/16 , C23F1/00 , C25D5/02 , C25D5/10 , C25D5/34 , H01L21/288 , H01L21/44 , H01L21/4763 , H01L21/768
CPC分类号： B44C1/22 , B33Y10/00 , B81C1/00492 , C03C15/00 , C03C25/68 , C23C18/1605 , C23C18/161 , C23C18/1651 , C23C18/1653 , C23C18/405 , C23F1/00 , C25D1/003 , C25D5/02 , C25D5/10 , H01L21/2885 , H01L21/44 , H01L21/4763 , H01L21/76885
摘要： Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.
摘要翻译：本发明的一些实施例涉及在电介质或部分电介质基底上建立单层或多层结构的技术。某些实施方案将种子层材料直接沉积到基底材料上，而其它实施例使用中间粘合层材料。一些实施例使用不同种子层材料和/或用于牺牲和结构导电建筑材料的粘合层材料。一些实施例将种子层和/或粘合层材料应用于有选择性的方式，而其它实施例以毯子的方式应用材料。一些实施例通过平面化操作去除外来沉积物（例如沉积到不想要形成层的一部分的区域），而其他实施例通过蚀刻操作去除外来材料。其它实施方案涉及使用至少一种导电结构材料，至少一种导电牺牲材料和至少一种电介质材料形成的多层中尺度或微结构结构的电化学制造。在一些实施方案中，电介质材料是可UV固化的光聚合物。

7. 发明申请

WO2013022679A1 PHASE LOCKED LOOP WITH PHASE CORRECTION IN THE FEEDBACK LOOP 审中-公开
标题翻译：在反馈环中进行相位校正的相位锁定环
公开(公告)号：WO2013022679A1
公开(公告)日：2013-02-14
申请号：PCT/US2012/049226
申请日：2012-08-01
申请人： QUALCOMM INCORPORATED , ZHANG, Gang
发明人： ZHANG, Gang
IPC分类号： H03L7/081 , H03L7/197
CPC分类号： H03L7/1976
摘要： A frequency synthesizer circuit is disclosed. The frequency synthesizer circuit includes a comparator circuit coupled to a reference clock and a phase-corrected output signal. The frequency synthesizer circuit also includes a loop filter coupled to the comparator circuit. The frequency synthesizer circuit also includes an oscillator coupled to the loop filter. The frequency synthesizer circuit also includes a fractional divider coupled to an output of the oscillator. The frequency synthesizer circuit also includes phase correction circuitry that corrects a phase of an output of the fractional divider to produce the phase-corrected output signal.
摘要翻译：公开了一种频率合成器电路。频率合成器电路包括耦合到参考时钟和相位校正的输出信号的比较器电路。频率合成器电路还包括耦合到比较器电路的环路滤波器。频率合成器电路还包括耦合到环路滤波器的振荡器。频率合成器电路还包括耦合到振荡器的输出的分数分频器。频率合成器电路还包括相位校正电路，其校正分数分频器的输出的相位以产生相位校正的输出信号。

8. 发明申请

WO2012003190A1 RIMINOPHENAZINES WITH 2-(HETEROARYL)AMINO SUBSTITUENTS AND THEIR ANTI-MICROBIAL ACTIVITY 审中-公开
标题翻译：具有2-（杂芳基）氨基取代基的RIMINOPHENAZINS和其抗微生物活性
公开(公告)号：WO2012003190A1
公开(公告)日：2012-01-05
申请号：PCT/US2011/042221
申请日：2011-06-28
申请人： GLOBAL ALLIANCE FOR TB DRUG DEVELOPMENT , INSTITUTE OF MATERIA MEDICA , LIU, Kai , COOPER, Christopher, B. , HUANG, Haihong , LI, Chun , LIU, Binna , LIU, Yang , MA, Zhenkun , WANG, Jingbin , YIN, Dali , ZHANG, Dongfeng , ZHANG, Gang , ZHANG, Hao
发明人： LIU, Kai , COOPER, Christopher, B. , HUANG, Haihong , LI, Chun , LIU, Binna , LIU, Yang , MA, Zhenkun , WANG, Jingbin , YIN, Dali , ZHANG, Dongfeng , ZHANG, Gang , ZHANG, Hao
IPC分类号： C07D401/12 , A61P31/06 , A61K31/495
CPC分类号： C07D409/14 , A61K31/498 , A61K31/506 , A61K31/5377 , A61K45/06 , C07D401/12 , C07D401/14 , C07D403/12 , C07D405/12 , C07D407/14 , C07D409/12
摘要： The present invention relates to riminophenazines having heteroaromatic substitutions, including those with 2-heteroaryl-amino substituents, to their preparation, and to their use as drugs for treating Mycobacterium tuberculosis and other microbial infections, either alone or in combination with other anti-infective treatments.
摘要翻译：本发明涉及具有杂芳香取代基，包括具有2-杂芳基 - 氨基取代基的那些，其制备方法及其用作治疗结核分枝杆菌和其它微生物感染的药物，其单独使用或与其它抗感染治疗组合。

9. 发明申请

WO2011002944A1 ADC-BASED MIXED-MODE DIGITAL PHASE-LOCKED LOOP 审中-公开
标题翻译：基于ADC的混合模式数字锁相环
公开(公告)号：WO2011002944A1
公开(公告)日：2011-01-06
申请号：PCT/US2010/040684
申请日：2010-06-30
申请人： QUALCOMM INCORPORATED , ZHANG, Gang
发明人： ZHANG, Gang
IPC分类号： H03L7/085 , H03L7/089
CPC分类号： H03L7/0891 , H03L7/085 , H03L7/0895 , H03L7/10 , H03L7/1976
摘要： A Phase-Locked Loop (PLL) includes a Phase-to-Digital Converter (PDC), a programmable digital loop filter, a Digitally-Controlled Oscillator (DCO), and a loop divider. Within the PDC, phase information is converted into a stream of digital values by a charge pump and an Analog-to-Digital Converter (ADC). The stream of digital values is supplied to the digital loop filter which in turn supplies digital tuning words to the DCO. A number of types of ADCs can be used for the ADC including a continuous-time delta-sigma oversampling Digital ADC and a Successive Approximation ADC. The voltage signal on the charge pump output is a small amplitude midrange voltage signal. The small voltage amplitude of the signal leads to numerous advantages including improved charge pump linearity, reduced charge pump noise, and lower supply voltage operation of the overall PLL.
摘要翻译：锁相环（PLL）包括一个相位数转换器（PDC），一个可编程数字环路滤波器，一个数字控制振荡器（DCO）和一个环路分频器。在PDC中，相位信息由电荷泵和模数转换器（ADC）转换成数字值流。数字值流被提供给数字环路滤波器，数字环路滤波器又向DCO提供数字调谐字。 ADC可以使用多种类型的ADC，包括连续时间Δ-sigma过采样数字ADC和逐次逼近ADC。电荷泵输出上的电压信号是一个小幅度的中频电压信号。信号的小电压幅度导致许多优点，包括改进的电荷泵线性度，降低的电荷泵噪声以及整个PLL的较低电源电压操作。

10. 发明申请

WO2008067324A1 LINEAR PHASE FREQUENCY DETECTOR AND CHARGE PUMP FOR PHASE-LOCKED LOOP 审中-公开
标题翻译：线性相位频率检测器和充电泵用于锁相环
公开(公告)号：WO2008067324A1
公开(公告)日：2008-06-05
申请号：PCT/US2007/085658
申请日：2007-11-27
申请人： QUALCOMM INCORPORATED , ZHANG, Gang
发明人： ZHANG, Gang
IPC分类号： H03L7/00
CPC分类号： H03L7/1976 , H03L7/0891
摘要： Techniques for achieving linear operation for a phase frequency detector and a charge pump in a phase-locked loop (PLL) are described. The phase frequency detector receives a reference signal and a clock signal, generates first and second signals based on the reference and clock signals, and resets the first and second signals based on only the first signal. The first and second signals may be up and down signals, respectively, or may be down and up signals, respectively. The phase frequency detector may delay the first signal by a predetermined amount, generate a reset signal based on the delayed first signal and the second signal, and reset the first and second signals with the reset signal. The charge pump receives the first and second signals and generates an output signal indicative of phase error between the reference and clock signals.
摘要翻译：描述了在锁相环（PLL）中实现相位频率检测器和电荷泵的线性操作的技术。相位频率检测器接收参考信号和时钟信号，基于参考和时钟信号产生第一和第二信号，并且仅基于第一信号复位第一和第二信号。第一和第二信号可以分别是上下信号，也可以分别是下降信号。相位频率检测器可以将第一信号延迟预定量，基于延迟的第一信号和第二信号产生复位信号，并用复位信号复位第一和第二信号。电荷泵接收第一和第二信号，并产生指示参考和时钟信号之间的相位误差的输出信号。

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