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1. 发明授权

US09287448B2 Semiconductor light emitting element 有权
标题翻译：半导体发光元件
公开(公告)号：US09287448B2
公开(公告)日：2016-03-15
申请号：US13053527
申请日：2011-03-22
申请人： Hironori Yamasaki , Katsuyoshi Furuki , Yukie Nishikawa
发明人： Hironori Yamasaki , Katsuyoshi Furuki , Yukie Nishikawa
IPC分类号： H01L33/60 , H01L33/22 , H01L33/16 , H01L33/20
CPC分类号： H01L33/20 , H01L33/16 , H01L33/22
摘要： According to one embodiment, a semiconductor light emitting element includes a light emitting layer, a current spreading layer of a first conductivity type, and a pad electrode. The light emitting layer is capable of emitting light. The current spreading layer has a first surface and a second surface. The light emitting layer is disposed on a side of the first surface. A light extraction surface having convex structures of triangle cross-sectional shape and a flat surface which is a crystal growth plane are included in the second surface. The pad electrode is provided on the flat surface. One base angle of the convex structure is 90 degrees or more.
摘要翻译：根据一个实施例，半导体发光元件包括发光层，第一导电类型的电流扩展层和焊盘电极。发光层能够发光。电流扩散层具有第一表面和第二表面。发光层设置在第一表面的一侧。在第二表面中包括具有三角形截面形状的凸形结构和作为晶体生长面的平坦表面的光提取表面。焊盘电极设置在平坦表面上。凸结构的一个底角为90度以上。

2. 发明申请

US20120273793A1 SEMICONDUCTOR LIGHT EMITTING DEVICE 有权
标题翻译：半导体发光器件
公开(公告)号：US20120273793A1
公开(公告)日：2012-11-01
申请号：US13219862
申请日：2011-08-29
申请人： Yukie Nishikawa , Hironori Yamasaki , Katsuyoshi Furuki , Takashi Kataoka
发明人： Yukie Nishikawa , Hironori Yamasaki , Katsuyoshi Furuki , Takashi Kataoka
IPC分类号： H01L33/60
CPC分类号： H01L33/38 , H01L33/14 , H01L33/405 , H01L33/42 , H01L2933/0016
摘要： According to one embodiment, a semiconductor light emitting device includes a substrate, a first electrode, a first conductivity type layer, a light emitting layer, a second conductivity type layer and a second electrode. The first conductivity type layer includes a first contact layer, a window layer having a lower impurity concentration than the first contact layer and a first cladding layer. The second conductivity type layer includes a second cladding layer, a current spreading layer and a second contact layer. The second electrode includes a narrow-line region on the second contact layer and a pad region electrically connected to the narrow-line region. Band gap energies of the first contact and window layers are larger than that of the light emitting layer. The first contact layer is provided selectively between the window layer and the first electrode and without overlapping the second contact layer as viewed from above.
摘要翻译：根据一个实施例，半导体发光器件包括衬底，第一电极，第一导电类型层，发光层，第二导电类型层和第二电极。第一导电类型层包括第一接触层，具有比第一接触层低的杂质浓度的窗口层和第一包层。第二导电类型层包括第二包覆层，电流扩散层和第二接触层。第二电极包括在第二接触层上的窄线区域和电连接到窄线区域的焊盘区域。第一触点和窗口层的带隙能量大于发光层的带隙能量。选择性地在窗口层和第一电极之间提供第一接触层，并且从上方观察不与第二接触层重叠。

3. 发明申请

US20120146072A1 SEMICONDUCTOR LIGHT EMITTING ELEMENT 有权
标题翻译：半导体发光元件
公开(公告)号：US20120146072A1
公开(公告)日：2012-06-14
申请号：US13053527
申请日：2011-03-22
申请人： Hironori Yamasaki , Katsuyoshi Furuki , Yukie Nishikawa
发明人： Hironori Yamasaki , Katsuyoshi Furuki , Yukie Nishikawa
IPC分类号： H01L33/60
CPC分类号： H01L33/20 , H01L33/16 , H01L33/22
摘要： According to one embodiment, a semiconductor light emitting element includes a light emitting layer, a current spreading layer of a first conductivity type, and a pad electrode. The light emitting layer is capable of emitting light. The current spreading layer has a first surface and a second surface. The light emitting layer is disposed on a side of the first surface. A light extraction surface having convex structures of triangle cross-sectional shape and a flat surface which is a crystal growth plane are included in the second surface. The pad electrode is provided on the flat surface. One base angle of the convex structure is 90 degrees or more.
摘要翻译：根据一个实施例，半导体发光元件包括发光层，第一导电类型的电流扩展层和焊盘电极。发光层能够发光。电流扩散层具有第一表面和第二表面。发光层设置在第一表面的一侧。在第二表面中包括具有三角形截面形状的凸形结构和作为晶体生长面的平坦表面的光提取表面。焊盘电极设置在平坦表面上。凸结构的一个底角为90度以上。

4. 发明授权

US07560767B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US07560767B2
公开(公告)日：2009-07-14
申请号：US11548914
申请日：2006-10-12
申请人： Naoki Yasuda , Yukie Nishikawa , Koichi Muraoka
发明人： Naoki Yasuda , Yukie Nishikawa , Koichi Muraoka
IPC分类号： H01L29/423 , H01L29/788
CPC分类号： H01L29/42324 , H01L21/28273 , H01L21/28282 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L29/4234 , H01L29/513 , H01L29/7881 , H01L29/792
摘要： A nonvolatile semiconductor memory device according to an example of the present invention includes source/drain diffusion layers, a first insulation film on a channel between the source/drain diffusion layers, a floating gate electrode on the first insulation film and composed of first electrically conductive layers, a second insulation film on the floating gate electrode, and a control gate electrode on the second insulation film. In the case where one first electrically conductive layer excluding a top layer is defined as a reference layer among first electrically conductive layers, a work function of the reference layer is 4.0 eV or more and work functions of the reference layer and of the first electrically conductive layers above the reference layer gradually increase as the layers are proximal to the second insulation film.
摘要翻译：根据本发明实施例的非易失性半导体存储器件包括源极/漏极扩散层，源极/漏极扩散层之间的沟道上的第一绝缘膜，第一绝缘膜上的浮置栅电极和由第一导电层，在浮栅电极上的第二绝缘膜，以及在第二绝缘膜上的控制栅电极。在除了顶层之外的一个第一导电层被定义为第一导电层中的参考层的情况下，参考层的功函数为4.0eV或更大，并且参考层和第一导电层的功函数随着层靠近第二绝缘膜，参考层之上的层逐渐增加。

5. 发明授权

US07405451B2 Semiconductor device including MIS transistors 失效
标题翻译：半导体器件包括MIS晶体管
公开(公告)号：US07405451B2
公开(公告)日：2008-07-29
申请号：US11020275
申请日：2004-12-27
申请人： Tatsuo Shimizu , Takeshi Yamaguchi , Yukie Nishikawa
发明人： Tatsuo Shimizu , Takeshi Yamaguchi , Yukie Nishikawa
IPC分类号： H01L21/8234
CPC分类号： H01L21/28194 , H01L21/28202 , H01L21/823842 , H01L29/517 , H01L29/518 , H01L29/66545
摘要： The present invention is to obtain an MIS transistor which allows considerable reduction in threshold fluctuation for each transistor and has a low threshold voltage. First gate electrode material for nMIS and second gate electrode material for pMIS can be mutually converted to each other, so that a process can be simplified. Such a fact that a dependency of a work function on a doping amount is small is first disclosed, so that fluctuation in threshold voltage for each transistor hardly occurs.
摘要翻译：本发明是为了获得允许每个晶体管的阈值波动显着降低并且具有低阈值电压的MIS晶体管。用于nMIS的第一栅电极材料和用于pMIS的第二栅极电极材料可以相互转换，从而可以简化工艺。首先公开了功函数对掺杂量的依赖性小的事实，因此几乎不发生各晶体管的阈值电压的波动。

6. 发明申请

US20080121979A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20080121979A1
公开(公告)日：2008-05-29
申请号：US11846251
申请日：2007-08-28
申请人： Yukie NISHIKAWA , Akira Takashima , Koichi Muraoka
发明人： Yukie NISHIKAWA , Akira Takashima , Koichi Muraoka
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11521 , H01L29/42336 , H01L29/513
摘要： A nonvolatile semiconductor memory device includes: a tunneling insulating film; a floating gate electrode; an inter-electrode insulating film, in which an interface facing the floating gate electrode and an interface facing a control gate electrode are defined as the first interface and the second interface, respectively; and a control gate electrode. The inter-electrode insulating film includes one or more first elements selected from rare earth elements, one or more second elements selected from Al, Ti, Zr, Hf, Ta, Mg, Ca, Sr and Ba, and oxygen. A composition ratio of the first element, which is defined as the number of atoms of the first element divided by that of the second element, is changed between the first interface and the second interface, and the composition ratio in the vicinity of the first interface is lower than that in the vicinity of the second interface.
摘要翻译：非易失性半导体存储器件包括：隧道绝缘膜; 浮栅电极; 分别将面对浮置栅极的界面和面对控制栅电极的界面分别定义为第一界面和第二界面的电极间绝缘膜; 和控制栅电极。电极间绝缘膜包括选自稀土元素，选自Al，Ti，Zr，Hf，Ta，Mg，Ca，Sr和Ba中的一种或多种第二元素和氧的一种或多种第一元素。被定义为第一元素的原子数除以第二元素的原子数的第一元素的组成比在第一界面和第二界面之间改变，并且第一界面附近的组成比低于第二界面附近的位置。

7. 发明申请

US20070132004A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20070132004A1
公开(公告)日：2007-06-14
申请号：US11548914
申请日：2006-10-12
申请人： Naoki YASUDA , Yukie NISHIKAWA , Koichi MURAOKA
发明人： Naoki YASUDA , Yukie NISHIKAWA , Koichi MURAOKA
IPC分类号： H01L29/788
CPC分类号： H01L29/42324 , H01L21/28273 , H01L21/28282 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L29/4234 , H01L29/513 , H01L29/7881 , H01L29/792
摘要： A nonvolatile semiconductor memory device according to an example of the present invention includes source/drain diffusion layers, a first insulation film on a channel between the source/drain diffusion layers, a floating gate electrode on the first insulation film and composed of first electrically conductive layers, a second insulation film on the floating gate electrode, and a control gate electrode on the second insulation film. In the case where one first electrically conductive layer excluding a top layer is defined as a reference layer among first electrically conductive layers, a work function of the reference layer is 4.0 eV or more and work functions of the reference layer and of the first electrically conductive layers above the reference layer gradually increase as the layers are proximal to the second insulation film.
摘要翻译：根据本发明实施例的非易失性半导体存储器件包括源极/漏极扩散层，源极/漏极扩散层之间的沟道上的第一绝缘膜，第一绝缘膜上的浮置栅电极和由第一导电层，在浮栅电极上的第二绝缘膜，以及在第二绝缘膜上的控制栅电极。在除了顶层之外的一个第一导电层被定义为第一导电层中的参考层的情况下，参考层的功函数为4.0eV或更大，并且参考层和第一导电层的功函数随着层靠近第二绝缘膜，参考层之上的层逐渐增加。

8. 发明授权

US07115953B2 Semiconductor device and method of manufacturing semiconductor device 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07115953B2
公开(公告)日：2006-10-03
申请号：US11049661
申请日：2005-02-04
申请人： Tatsuo Shimizu , Takeshi Yamaguchi , Yukie Nishikawa
发明人： Tatsuo Shimizu , Takeshi Yamaguchi , Yukie Nishikawa
IPC分类号： H01L29/72
CPC分类号： H01L29/513 , H01L21/02123 , H01L21/02142 , H01L21/022 , H01L21/28194 , H01L21/31604 , H01L21/31641 , H01L21/31645 , H01L21/31691 , H01L29/4966 , H01L29/51 , H01L29/517
摘要： A semiconductor device includes a semiconductor substrate containing Si as a main component, and an active element formed on the semiconductor substrate and including an insulating metal silicide thin film formed on the semiconductor substrate, dangling bonds of Si of the semiconductor substrate being terminated by the insulating metal silicide thin film.
摘要翻译：半导体器件包括以Si为主要成分的半导体衬底和形成在半导体衬底上的有源元件，并且包括形成在半导体衬底上的绝缘金属硅化物薄膜，半导体衬底的Si与绝缘体端接的悬挂键金属硅化物薄膜。

9. 发明申请

US20050017304A1 Field effect transistor and method of manufacturing the same 失效
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US20050017304A1
公开(公告)日：2005-01-27
申请号：US10863226
申请日：2004-06-09
申请人： Daisuke Matsushita , Yukie Nishikawa , Hideki Satake , Noburu Fukushima
发明人： Daisuke Matsushita , Yukie Nishikawa , Hideki Satake , Noburu Fukushima
IPC分类号： H01L21/336 , H01L21/84 , H01L27/12 , H01L29/786 , H01L27/01
CPC分类号： H01L29/785 , H01L21/84 , H01L27/1203 , H01L29/66795 , H01L29/7842 , H01L29/78603 , H01L2924/0002 , H01L2924/00
摘要： There is provided a field effect transistor including: a first insulating film formed on a semiconductor substrate, and including at least a metal oxide having a crystallinity and different in a lattice distance of a crystal on an interface from the semiconductor substrate; a convex channel region formed above the first insulating film, and different in the lattice distance from the semiconductor substrate; a source region and a drain region formed above the first insulating film on side surfaces of the channel region, respectively; a second insulating film formed right above the channel region; a gate insulating film formed on a side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain regions are formed; and a gate electrode formed through the gate insulating film on at least the side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain region are formed.
摘要翻译：提供了一种场效应晶体管，包括：第一绝缘膜，形成在半导体衬底上，并且至少包括具有与半导体衬底的界面上的晶体的晶格距离不同的结晶度的金属氧化物; 形成在所述第一绝缘膜的上方的与所述半导体基板的晶格距离不同的凸状沟道区域; 源极区域和漏极区域，分别在沟道区域的侧表面上形成在第一绝缘膜的上方; 在通道区域正上方形成的第二绝缘膜; 形成在与形成有源极区域和漏极区域的沟道区域的侧面不同的沟道区域的侧面的栅极绝缘膜; 以及在与形成有源极区域和漏极区域的沟道区域的侧面不同的沟道区域的至少侧面上通过栅极绝缘膜形成的栅极电极。

10. 发明授权

US6080599A Semiconductor optoelectric device and method of manufacturing the same 失效
标题翻译：半导体光电器件及其制造方法
公开(公告)号：US6080599A
公开(公告)日：2000-06-27
申请号：US89130
申请日：1998-06-02
申请人： Masahiro Yamamoto , Hidetoshi Fujimoto , Yoshihiro Kokubun , Masayuki Ishikawa , Shinji Saito , Yukie Nishikawa , John Rennie
发明人： Masahiro Yamamoto , Hidetoshi Fujimoto , Yoshihiro Kokubun , Masayuki Ishikawa , Shinji Saito , Yukie Nishikawa , John Rennie
IPC分类号： H01L21/203 , H01L21/301 , H01L21/31 , H01L33/06 , H01L33/16 , H01L33/20 , H01L33/24 , H01L33/28 , H01L33/32 , H01L33/34 , H01S5/00 , H01S5/02 , H01S5/30 , H01S5/32 , H01S5/323 , H01S5/327 , H01L33/00 , H01L21/786 , H01L21/86
CPC分类号： H01L33/20 , H01L33/16 , H01S5/0202 , H01S5/0213 , H01S5/3202 , H01S5/3226 , H01S5/32341 , Y10S438/973 , Y10S438/975
摘要： The present invention is intended to provide a semiconductor optoelectric device with high luminescent efficiency and a method of manufacturing the same. The semiconductor optoelectric device 18 according to the present invention is constructed by depositing compound-semiconductor layers 13 and 14 on a monocrystalline substrate 11 of a hexagonal close-packed structure. The shape of the monocrystalline substrate 11 is a parallelogram. Individual sides of the parallelogram are parallel to a orientation. As the monocrystalline substrate, sapphire, zinc oxide or silicon carbide may be used. As the compound-semiconductor layers, an n-type GaN layer 13 and p-type GaN layer 14 may be used.
摘要翻译：本发明旨在提供一种具有高发光效率的半导体光电器件及其制造方法。根据本发明的半导体光电器件18通过将化合物半导体层13和14沉积在六方密堆积结构的单晶衬底11上而构成。单晶衬底11的形状是平行四边形。平行四边形的各个边平行于<11-20>方向。作为单晶衬底，可以使用蓝宝石，氧化锌或碳化硅。作为化合物半导体层，可以使用n型GaN层13和p型GaN层14。

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