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1. 发明授权

US06691424B1 Displacement measuring device 失效
标题翻译：位移测量装置
公开(公告)号：US06691424B1
公开(公告)日：2004-02-17
申请号：US10313460
申请日：2002-12-06
申请人： Yu-Lung Tung
发明人： Yu-Lung Tung
IPC分类号： G01B312
CPC分类号： B23Q17/22 , B23Q5/385 , B23Q5/54
摘要： A displacement measuring device includes a body which is movable on a plurality of rails and driven by a first shaft. An extension portion is connected to the body and a second shaft connected to the body extends through the extension portion. A first gear and a second gear are respectively mounted to the first shaft and the second shaft. Both of the two gears are engaged with a rack. A spring is received in the extension portion and pushes the second gear so that the second gear is pushed toward the rack. The second gear is snugly engaged with the rack so that the tolerance therebetween is reduced. A counting member is connected to the second shaft so that the number of the revolution of the second gear is counted and the sum of the displacement of the object can be precisely calculated.
摘要翻译：位移测量装置包括可在多个轨道上移动并由第一轴驱动的主体。延伸部分连接到主体，并且连接到主体的第二轴延伸穿过延伸部分。第一齿轮和第二齿轮分别安装到第一轴和第二轴。两个齿轮都与机架接合。弹簧被容纳在延伸部分中并推动第二齿轮，使得第二齿轮被推向齿条。第二齿轮与齿条紧密接合，从而减小了它们之间的公差。计数构件连接到第二轴，使得第二档的转数被计数，并且可以精确地计算物体的位移之和。

2. 发明申请

US20130154100A1 METHOD OF PATTERNING A SEMICONDUCTOR DEVICE HAVING IMPROVED SPACING AND SHAPE CONTROL AND A SEMICONDUCTOR DEVICE 有权
标题翻译：绘制具有改进的间隔和形状控制的半导体器件的方法和半导体器件
公开(公告)号：US20130154100A1
公开(公告)日：2013-06-20
申请号：US13328419
申请日：2011-12-16
申请人： Jhun Hua CHEN , Yu-Lung TUNG , Chi-Tien CHEN , Hua-Tai LIN , Hsiang-Lin CHEN , Hung-Chang HSIEH , Yi-Fan CHEN
发明人： Jhun Hua CHEN , Yu-Lung TUNG , Chi-Tien CHEN , Hua-Tai LIN , Hsiang-Lin CHEN , Hung-Chang HSIEH , Yi-Fan CHEN
IPC分类号： H01L23/48 , H01L21/28
CPC分类号： H01L23/528 , H01L21/31144 , H01L21/76897 , H01L21/8238 , H01L21/823871 , H01L2924/0002 , H01L2924/00
摘要： A pattern on a semiconductor substrate is formed using two separate etching processes. The first etching process removes a portion of an intermediate layer above an active region of the substrate. The second etching process exposes a portion of the active region of the substrate. A semiconductor device formed using the patterning method has a decreased mask error enhancement factor and increased critical dimension uniformity than the prior art.
摘要翻译：使用两个单独的蚀刻工艺形成半导体衬底上的图案。第一蚀刻工艺除去衬底的有源区上方的中间层的一部分。第二蚀刻工艺暴露了衬底的一部分有源区。使用图案化方法形成的半导体器件具有比现有技术更低的掩模误差增强因子和增加的临界尺寸均匀性。

3. 发明授权

US08580637B2 Method of patterning a semiconductor device having improved spacing and shape control and a semiconductor device 有权
标题翻译：图案化具有改进的间隔和形状控制的半导体器件的方法和半导体器件
公开(公告)号：US08580637B2
公开(公告)日：2013-11-12
申请号：US13328419
申请日：2011-12-16
申请人： Jhun Hua Chen , Yu-Lung Tung , Chi-Tien Chen , Hua-Tai Lin , Hsiang-Lin Chen , Hung Chang Hsieh , Yi-Fan Chen
发明人： Jhun Hua Chen , Yu-Lung Tung , Chi-Tien Chen , Hua-Tai Lin , Hsiang-Lin Chen , Hung Chang Hsieh , Yi-Fan Chen
IPC分类号： H01L21/8242
CPC分类号： H01L23/528 , H01L21/31144 , H01L21/76897 , H01L21/8238 , H01L21/823871 , H01L2924/0002 , H01L2924/00
摘要： A pattern on a semiconductor substrate is formed using two separate etching processes. The first etching process removes a portion of an intermediate layer above an active region of the substrate. The second etching process exposes a portion of the active region of the substrate. A semiconductor device formed using the patterning method has a decreased mask error enhancement factor and increased critical dimension uniformity than the prior art.
摘要翻译：使用两个单独的蚀刻工艺形成半导体衬底上的图案。第一蚀刻工艺除去衬底的有源区上方的中间层的一部分。第二蚀刻工艺暴露了衬底的一部分有源区。使用图案化方法形成的半导体器件具有比现有技术更低的掩模误差增强因子和增加的临界尺寸均匀性。

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