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1. 发明专利

JP2014227645A フットカバー有权
标题翻译：脚
公开(公告)号：JP2014227645A
公开(公告)日：2014-12-08
申请号：JP2014103153
申请日：2014-05-19
申请人：ヨンスパク , Young Soo Park , ヨンスパク
发明人： PARK YOUNG SOO
IPC分类号： A41B11/00 , A41B11/12
摘要：【課題】靴下のように着用する脱げ防止型フットカバーを提供すること。【解決手段】本発明の脱げ防止型フットカバーは、靴下編成機を用いて足底部(2)と甲部(3)を綿糸で製織し、甲部に連結される履き口部(5)を伸縮性のゴム糸で一体に製織して形成し、前記履き口部(5)の上端を外側に折り返してオーバーロックをかけた帯状の仕上げ部(6)を形成することにより、前記履き口部全体が足に弾力的に密着して従来のフットカバーに比べて脱げを防止し、優れた着用感を提供するうえ、従来のフットカバーに比べて製造工程が単純化されてコストダウンおよび生産性の向上を図ることができる。【選択図】図3
摘要翻译：要解决的问题：提供像袜子一样穿着的防滑型脚罩。解决方案：防滑型脚罩被制造成使用针织机，鞋底部分（2）和脚背部分（3）用棉纱编织，用于脚部的开口部分（5）通过与弹性橡胶纱线整体编织而形成，该开口部分（5）作为与脚背部分连接的部分，并且开口（5）的顶部边缘向外折叠以形成包缝的带状整理部分（6）。结果，与传统的脚罩相比，足部进入的整个开口弹性地附着到脚上，防止脚脱落，并提供极好的穿着感。此外，与传统的脚罩相比，制造工艺简化，便于降低成本并提高生产率。

2. 发明专利

JP2010044766A Character input method using preliminary step 审中-公开
标题翻译：使用初步步骤的字符输入方法
公开(公告)号：JP2010044766A
公开(公告)日：2010-02-25
申请号：JP2009189452
申请日：2009-08-18
申请人： Young-Soo Park , Ayako Yoshida , ユンスーパク , あや子吉田
发明人： PARK YOUNG-SOO , YOSHIDA AYAKO
IPC分类号： G06F3/023 , H03M11/08 , H04M1/00
摘要： PROBLEM TO BE SOLVED: To provide a keypad and a character input method for rapidly and correctly inputting various characters with a reduced number of character keys by inputting after separating one character into a vowel and a consonant when the one character is input and using a special space key, etc., arranged at the center of the keypad.
SOLUTION: The method for inputting characters by using the keypad where basic keys have consonant values and vowel values and many basic keys are included, includes: a preliminary step for selectively inputting the consonant value from the basic key which is selected first in forming the character; an establishment step for selecting the vowel value from the basic key, which is selected secondly after the preliminary step, combining the consonant value with the vowel value, establishing the final character, and performing an input; and a step for converting the consonant value into a space value when a space key is selected after selecting the consonant value from the basic key, which is selected first in the preliminary step, since the keypad includes the space key arranged at the center and the space value of the basic key, which is displayed when the space key is selected after selecting the basic key, is set.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种小键盘和字符输入方法，用于当输入一个字符时将一个字符分离成元音和辅音后，通过输入来快速正确地输入具有减少的字符键的各种字符的字符输入方法;以及使用设置在键盘中心的特殊空格键等。包括：用于通过使用基本键具有辅音值和元音值和许多基本键的键盘输入字符的方法，包括：用于从基本键中选择性地输入辅音值的初步步骤，形成人物; 一个建立步骤，用于从初步步骤之后第二选择的基本键选择元音值，将辅音值与元音值组合，建立最终字符，并执行输入; 以及在从初步步骤中首先选择的基本密钥中选择辅音值之后选择空格键时将辅音值转换为空格值的步骤，因为键盘包括布置在中央的空格键设置选择基本键后选择空格键时显示的基本键的空格值。版权所有（C）2010，JPO＆INPIT

3. 发明授权

US09337381B2 Semiconductor buffer structure, semiconductor device including the semiconductor buffer structure, and method of manufacturing the semiconductor device using the semiconductor buffer structure 有权
标题翻译：半导体缓冲结构，包括半导体缓冲结构的半导体器件，以及使用半导体缓冲结构制造半导体器件的方法
公开(公告)号：US09337381B2
公开(公告)日：2016-05-10
申请号：US14484456
申请日：2014-09-12
申请人： Jun-youn Kim , Young-jo Tak , Jae-kyun Kim , Joo-sung Kim , Young-soo Park , Su-hee Chae
发明人： Jun-youn Kim , Young-jo Tak , Jae-kyun Kim , Joo-sung Kim , Young-soo Park , Su-hee Chae
IPC分类号： H01L21/00 , H01L33/00 , H01L33/12 , H01L21/02 , H01L33/32
CPC分类号： H01L33/0025 , H01L21/02381 , H01L21/02433 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L33/007 , H01L33/0079 , H01L33/12 , H01L33/32
摘要： A semiconductor buffer structure includes a silicon substrate, a nucleation layer formed on the silicon substrate, and a buffer layer formed on the nucleation layer. The buffer layer includes a first layer formed of a nitride semiconductor material having a uniform composition rate, a second layer formed of the same material as the nucleation layer on the first layer, and a third layer formed of the same material with the same composition ratio as the first layer on the second layer.
摘要翻译：半导体缓冲结构包括硅衬底，形成在硅衬底上的成核层和形成在成核层上的缓冲层。缓冲层包括由具有均匀组成比的氮化物半导体材料形成的第一层，由与第一层上的成核层相同的材料形成的第二层和由相同组成比的相同材料形成的第三层作为第二层的第一层。

4. 发明授权

US09257599B2 Semiconductor light emitting device including hole injection layer 有权
标题翻译：半导体发光器件包括空穴注入层
公开(公告)号：US09257599B2
公开(公告)日：2016-02-09
申请号：US14288824
申请日：2014-05-28
申请人： Jae-kyun Kim , Joo-sung Kim , Jun-youn Kim , Young-soo Park , Young-jo Tak
发明人： Jae-kyun Kim , Joo-sung Kim , Jun-youn Kim , Young-soo Park , Young-jo Tak
IPC分类号： H01L21/00 , H01L29/06 , H01L33/00 , H01L33/06 , H01L33/14 , H01L33/32 , H01L33/12
CPC分类号： H01L33/06 , H01L33/007 , H01L33/12 , H01L33/14 , H01L33/32
摘要： According to example embodiments, a semiconductor light emitting device includes a first semiconductor layer, a pit enlarging layer on the first semiconductor layer, an active layer on the pit enlarging layer, a hole injection layer, and a second semiconductor layer on the hole injection layer. The first semiconductor layer is doped a first conductive type. An upper surface of the pit enlarging layer and side surfaces of the active layer define pits having sloped surfaces on the dislocations. The pits are reverse pyramidal spaces. The hole injection layer is on a top surface of the active layer and the sloped surfaces of the pits. The second semiconductor layer doped a second conductive type that is different than the first conductive type.
摘要翻译：根据示例性实施例，半导体发光器件包括第一半导体层，第一半导体层上的凹坑放大层，凹坑放大层上的有源层，空穴注入层和空穴注入层上的第二半导体层。第一半导体层掺杂有第一导电类型。凹坑扩大层的上表面和活性层的侧表面限定了在位错上具有倾斜表面的凹坑。凹坑是反锥形空间。空穴注入层位于有源层的顶表面和凹坑的倾斜表面上。第二半导体层掺杂与第一导电类型不同的第二导电类型。

5. 发明授权

US08928017B2 Semiconductor light emitting devices having an uneven emission pattern layer and methods of manufacturing the same 有权
标题翻译：具有不均匀发射图案层的半导体发光器件及其制造方法
公开(公告)号：US08928017B2
公开(公告)日：2015-01-06
申请号：US12929149
申请日：2011-01-04
申请人： Su-hee Chae , Young-soo Park , Bok-ki Min , Jun-youn Kim , Hyun-gi Hong
发明人： Su-hee Chae , Young-soo Park , Bok-ki Min , Jun-youn Kim , Hyun-gi Hong
IPC分类号： H01L33/00 , H01L33/38 , H01L33/22 , H01L33/40
CPC分类号： H01L33/0066 , H01L33/0075 , H01L33/0079 , H01L33/12 , H01L33/22 , H01L33/24 , H01L33/382 , H01L33/405 , H01L2933/0016
摘要： Example embodiments are directed to light-emitting devices (LEDs) and methods of manufacturing the same. The LED includes a first semiconductor layer; a second semiconductor layer; an active layer formed between the first and second semiconductor layers; and an emission pattern layer including a plurality of layers on the first semiconductor layer, the emission pattern including an emission pattern for externally emitting light generated from the active layer.
摘要翻译：示例性实施例涉及发光器件（LED）及其制造方法。 LED包括第一半导体层; 第二半导体层; 形成在所述第一和第二半导体层之间的有源层; 以及在所述第一半导体层上包括多层的发光图案层，所述发光图案包括用于从所述有源层产生的外部发射光的发射图案。

6. 发明授权

US08724534B2 Information service apparatus and method in wireless communication system 有权
标题翻译：无线通信系统中的信息服务装置和方法
公开(公告)号：US08724534B2
公开(公告)日：2014-05-13
申请号：US12469008
申请日：2009-05-20
申请人： Young-Soo Park , Geun-Ho Lee
发明人： Young-Soo Park , Geun-Ho Lee
IPC分类号： H04H20/71 , H04W4/00
CPC分类号： H04H20/72 , H04H60/15 , H04W4/06 , H04W76/40
摘要： An information service apparatus and method in a wireless communication system are provided. A method of operating a Radio Access Station (RAS) includes receiving information regarding business offices located in a cell coverage area of the RAS from a network entity of a core service network, classifying the received business office information according to a plurality of items and storing the classified information in a Data Base (DB), allocating a Multicast Connection IDentifier (MCID) for each item, determining a transmission period for each item, obtaining a business office list of a corresponding item from the DB when a Transmit (Tx) time elapses according to the Tx period, generating an advertisement multicast burst including the obtained business office list, and multicasting the generated burst to pre-registered Mobile Stations (MSs).
摘要翻译：提供了一种无线通信系统中的信息服务装置和方法。一种操作无线电接入站（RAS）的方法包括从核心业务网络的网络实体接收关于位于RAS的小区覆盖区域内的业务部门的信息，根据多个项目对接收到的业务处信息进行分类，并存储数据库（DB）中的分类信息，为每个项目分配多播连接标识符（MCID），确定每个项目的传输周期，当发送（Tx）时间时，从DB获得相应项目的营业单列表根据Tx周期经过，产生包括所获得的商务办公室列表的广播多播突发，以及将生成的突发组播到预注册的移动台（MS）。

7. 发明授权

US08625354B2 Semiconductor memory device and method of programming the same 失效
标题翻译：半导体存储器件及其编程方法
公开(公告)号：US08625354B2
公开(公告)日：2014-01-07
申请号：US12982558
申请日：2010-12-30
申请人： Ka Young Cho , Young Soo Park
发明人： Ka Young Cho , Young Soo Park
IPC分类号： G11C16/10
CPC分类号： G11C16/3459 , G11C16/3454
摘要： A semiconductor memory device includes a voltage generator configured to supply a program voltage, a sub-verification voltage, or a target verification voltage to memory cells selected during a program operation, page buffers configured to latch first data according to results from comparing threshold voltages of the selected memory cells with the sub-verification voltage and latch second data according to results from comparing the threshold voltages of the memory cells with the target verification voltage, a sub-pass check circuit configured to output a sub-pass signal in response to the first data outputted from the page buffers, a main pass check circuit configured to output a main pass signal in response to the second data outputted from the page buffers, and a control circuit configured to control whether the voltage generator supplies the sub-verification voltage and the target verification voltage in response to the sub-pass signal and the main pass signal.
摘要翻译：半导体存储器件包括：电压发生器，被配置为将程序电压，子验证电压或目标验证电压提供给在编程操作期间选择的存储器单元，所述页缓冲器被配置为根据比较阈值电压的结果来锁存第一数据根据将存储单元的阈值电压与目标验证电压进行比较的结果，将所选择的具有子验证电压的存储单元和锁存第二数据进行锁存;副通路检查电路，被配置为响应于所述目标验证电压输出子通过信号从页缓冲器输出的第一数据，主通检查电路，配置为响应于从页缓冲器输出的第二数据输出主通道信号;以及控制电路，被配置为控制电压发生器是否提供子验证电压，以及响应于副通信号和主通道信号的目标验证电压。

8. 发明申请

US20130252395A1 RESISTIVE RANDOM ACCESS MEMORY AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：电阻随机存取存储器及其制造方法
公开(公告)号：US20130252395A1
公开(公告)日：2013-09-26
申请号：US13892881
申请日：2013-05-13
申请人： Sun-ae SEO , Young-soo PARK , Ran-Ju JUNG , Myoung-jae LEE , Dong-chul KIM , Seung-eon AHN
发明人： Sun-ae SEO , Young-soo PARK , Ran-Ju JUNG , Myoung-jae LEE , Dong-chul KIM , Seung-eon AHN
IPC分类号： H01L45/00
CPC分类号： H01L45/165 , H01L27/2436 , H01L45/085 , H01L45/1233 , H01L45/146
摘要： Example embodiments relate to a resistive random access memory (RRAM) and a method of manufacturing the RRAM. A RRAM according to example embodiments may include a lower electrode, which may be formed on a lower structure (e.g., substrate). A resistive layer may be formed on the lower electrode, wherein the resistive layer may include a transition metal dopant. An upper electrode may be formed on the resistive layer. Accordingly, the transition metal dopant may form a filament in the resistive layer that operates as a current path.
摘要翻译：示例实施例涉及电阻随机存取存储器（RRAM）和制造RRAM的方法。根据示例性实施例的RRAM可以包括下电极，其可以形成在下结构（例如，衬底）上。电阻层可以形成在下电极上，其中电阻层可以包括过渡金属掺杂剂。上电极可以形成在电阻层上。因此，过渡金属掺杂剂可以在作为电流路径工作的电阻层中形成丝。

9. 发明申请

US20130188904A1 HYBRID LASER LIGHT SOURCES FOR PHOTONIC INTEGRATED CIRCUITS 有权
标题翻译：用于光电集成电路的混合激光光源
公开(公告)号：US20130188904A1
公开(公告)日：2013-07-25
申请号：US13614432
申请日：2012-09-13
申请人： Bok-ki MIN , Taek KIM , Young-soo PARK
发明人： Bok-ki MIN , Taek KIM , Young-soo PARK
IPC分类号： G02B6/12 , H01L21/02
CPC分类号： H01S5/18358 , H01S5/021 , H01S5/0215 , H01S5/02248 , H01S5/026 , H01S5/1032 , H01S5/105 , H01S5/18325 , H01S5/18341 , H01S5/18361 , H01S5/1838 , H01S5/2018 , H01S5/2031
摘要： A light source for a photonic integrated circuit may comprise a reflection coupling layer formed on a substrate in which an optical waveguide is provided, at least one side of the reflection coupling layer being optically connected to the optical waveguide; an optical mode alignment layer provided on the reflection coupling layer; and/or an upper structure provided on the optical mode alignment layer and including an active layer for generating light and a reflection layer provided on the active layer. A light source for a photonic integrated circuit may comprise a lower reflection layer; an optical waveguide optically connected to the lower reflection layer; an optical mode alignment layer on the lower reflection layer; an active layer on the optical mode alignment layer; and/or an upper reflection layer on the active layer.
摘要翻译：用于光子集成电路的光源可以包括形成在其中设置有光波导的基板上的反射耦合层，反射耦合层的至少一侧光学连接到光波导; 设置在反射耦合层上的光学模式取向层; 和/或设置在光学模式对准层上的上部结构，并且包括用于产生光的有源层和设置在有源层上的反射层。光子集成电路的光源可以包括下反射层; 与下反射层光学连接的光波导; 在下反射层上的光学取向层; 光学对准层上的有源层; 和/或有源层上的上反射层。

10. 发明申请

US20120268992A1 SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：半导体存储器件
公开(公告)号：US20120268992A1
公开(公告)日：2012-10-25
申请号：US13452236
申请日：2012-04-20
申请人： Beom Sik KIM , Young Soo PARK
发明人： Beom Sik KIM , Young Soo PARK
IPC分类号： G11C16/04
CPC分类号： G11C16/0483 , G11C16/3418
摘要： A semiconductor memory device includes a memory cell array configured to include a plurality of memory blocks, a voltage generator configured to output operating voltages for data input and output to global lines, and a row decoder configured to transfer the operating voltages to local lines of a memory block, selected from among the plurality of memory blocks, and supply a ground voltage to local lines of unselected memory blocks in response to address signals.
摘要翻译：半导体存储器件包括被配置为包括多个存储器块的存储单元阵列，被配置为输出用于数据输入和输出到全局线的工作电压的电压发生器，以及配置成将工作电压传送到本地线的本地线的行解码器存储器块，从多个存储器块中选择，并且响应于地址信号将接地电压提供给未选择的存储器块的本地线。

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