专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2012020785A Foot-operated petroleum pump 审中-公开
标题翻译：石油泵油
公开(公告)号：JP2012020785A
公开(公告)日：2012-02-02
申请号：JP2010171112
申请日：2010-07-12
申请人： Yoshinobu Yamamoto , 義信山本
发明人： YAMAMOTO YOSHINOBU
IPC分类号： B65D83/00
摘要： PROBLEM TO BE SOLVED: To provide a foot-operated petroleum pump for feeding oil with excellent economic efficiency by the use of a foot-operated air pump in moving oil from an oil storage polyethylene tank to a fuel tank of an oil heater or the like.SOLUTION: The foot-operated petroleum pump is characterized in that the foot-operated air pump is connected to a container having an air injection port and an oil feeding port on a lid of the oil polyethylene tank, and atmospheric pressure in the tank is increased or decreased in order to freely control the feed of the oil.
摘要翻译：要解决的问题：提供一种脚踏式石油泵，其通过使用脚踏式空气泵将油从储油聚乙烯罐移动到油加热器的燃料箱来提供极好的经济效率的油或类似物。解决方案：脚踏式石油泵的特征在于，脚踏式空气泵连接到在油聚乙烯罐的盖上具有空气注入口和供油口的容器，并且其中的大气压罐的增加或减少以便自由地控制油的进料。版权所有（C）2012，JPO＆INPIT

2. 发明专利

JP2009066377A Mitarashi soy-sauced dumpling extrusion device 审中-公开
标题翻译： MITARASHI SOY-SAUCED DUMPLING EXTRUSION DEVICE
公开(公告)号：JP2009066377A
公开(公告)日：2009-04-02
申请号：JP2007269502
申请日：2007-09-14
申请人： Yoshinobu Yamamoto , 義信山本
发明人： YAMAMOTO YOSHINOBU
IPC分类号： A47G19/22 , A23L7/10 , A47G23/00
摘要： PROBLEM TO BE SOLVED: To provide a Mitarashi soy-sauced dumpling extrusion device in which it is possible to finely eat without soiling the month and a cheek with sauce adhering to a dumpling at the time of eating the Mitarashi soy-sauced dumpling and to be released from an accident such as poking in a throat by a spit. SOLUTION: In the Mitarashi soy-sauced dumpling extrusion device, a hard-baked cracker of the shape of a coin without a hole is passed from the holding part of a bamboo skewer in order to make the dumplings, which stand in a row, easy to eat and the dumpling is pushed up to the leading edge of the skewer with every eating and advancing. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种Mitarashi大豆调味饺子挤出装置，其中可以在进食Mitarashi酱油饺子时，不用弄脏月份，并且用蘸酱的酱汁进行精细的食用并从事故中释放出来，例如用吐痰戳在喉咙里。
解决方案：在Mitarashi大豆调味饺子挤出装置中，从竹笋的保持部分通过一根没有孔的硬币形状的硬烘烤饼干，以使饺子行，容易吃，饺子每一次进食都被推到串的前缘。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2008018213A Comfortable lateral auxiliary pillow 审中-公开
标题翻译：舒适的侧面辅助枕头
公开(公告)号：JP2008018213A
公开(公告)日：2008-01-31
申请号：JP2006220610
申请日：2006-07-14
申请人： Yoshinobu Yamamoto , 義信山本
发明人： YAMAMOTO YOSHINOBU
IPC分类号： A47G9/10
摘要： PROBLEM TO BE SOLVED: To provide a comfortable lateral auxiliary pillow for comfortably retaining the body at a desired angle with a user laying in a lateral recumbent posture.
SOLUTION: This comfortable lateral auxiliary pillow is characterized in connecting two cloth bags incorporating triangular-prism-shaped low repulsion urethane, and retaining a user's comfortable posture as a regular pillow and as a pillow for the lateral recumbent posture by folding and developing them respectively.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种舒适的侧面辅助枕头，用于将身体舒适地保持在与放置在横向卧姿中的使用者所需的角度上。
解决方案：这种舒适的侧面辅助枕头的特征在于连接两个装有三棱柱形低排斥聚氨酯的布袋，并且通过折叠和显影来保持用户的舒适姿势作为普通枕头和枕头，用于侧卧位置他们分别。版权所有（C）2008，JPO＆INPIT

4. 发明授权

US08535073B2 Connector 有权
标题翻译：连接器
公开(公告)号：US08535073B2
公开(公告)日：2013-09-17
申请号：US13478611
申请日：2012-05-23
申请人： Nobuyasu Oiri , Masakazu Kuroiwa , Yusuke Obata , Yoshinobu Yamamoto
发明人： Nobuyasu Oiri , Masakazu Kuroiwa , Yusuke Obata , Yoshinobu Yamamoto
IPC分类号： H01R13/62
CPC分类号： H01R13/62944 , H01R13/62955
摘要： The connector matable with a mating connector comprises a housing, a lever and an attached member. The housing has a front end, a rear end and an accommodating portion. The accommodating portion communicates with the front end and the rear end. The accommodating portion has an upper portion, a lower portion and side portions. The side portions are formed on respective opposite ends in a width direction of the accommodating portion so as to couple the upper portion and the lower portion with each other. The lever is configured to mate the connector with the mating connector and accommodated in the accommodating portion so as to be pivotable. The attached member is other than the housing. The attached member is attached to the housing so as to couple the upper portion and the lower portion with each other at a position located between the side portions in the width direction.
摘要翻译：可配合配合连接器的连接器包括壳体，杆和附接构件。壳体具有前端，后端和容纳部分。容纳部分与前端和后端连通。容纳部具有上部，下部和侧部。侧部形成在容纳部的宽度方向上的相应的相对端上，以将上部和下部彼此连接。杠杆配置成将连接器与配合连接器配合并容纳在容纳部分中以便可枢转。附件不是外壳。附接构件附接到壳体，以便在位于宽度方向上的侧部之间的位置处将上部和下部彼此联接。

5. 发明申请

US20100146201A1 MEMORY DEVICE, MEMORY CONTROLLER AND MEMORY SYSTEM 有权
公开(公告)号：US20100146201A1
公开(公告)日：2010-06-10
申请号：US12612215
申请日：2009-11-04
申请人： Tomohiro Kawakubo , Syusaku Yamaguchi , Hitoshi Ikeda , Toshiya Uchida , Hiroyuki Kobayashi , Tatsuya Kanda , Yoshinobu Yamamoto , Satoru Shirakawa , Tetsuo Miyamoto , Tatsushi Otsuka , Hidenaga Takahashi , Masanori Kurita , Shinnosuke Kamata , Ayako Sato
发明人： Tomohiro Kawakubo , Syusaku Yamaguchi , Hitoshi Ikeda , Toshiya Uchida , Hiroyuki Kobayashi , Tatsuya Kanda , Yoshinobu Yamamoto , Satoru Shirakawa , Tetsuo Miyamoto , Tatsushi Otsuka , Hidenaga Takahashi , Masanori Kurita , Shinnosuke Kamata , Ayako Sato
IPC分类号： G06F12/00
CPC分类号： G11C11/406 , G11C7/1027 , G11C8/12 , G11C11/40618 , G11C11/4087
摘要： Provided is a memory device in which the decrease of the effective bandwidth caused by the refresh operation of the memory device has been solved, a memory controller of the memory device, and a memory system thereof. A memory device that is operated in response to a command from a memory controller has a plurality of banks that respectively have memory cores including memory cell arrays and decoders and are selected by bank addresses; and a control circuit, which, in response to a background refresh command, causes the memory cores within refresh target banks set by the memory controller to successively execute refresh operation a number of times corresponding to refresh burst length that is set by the memory controller, and, in response to a normal operation command, further causes the memory cores within banks other than the refresh target banks and selected by the bank addresses to execute normal memory operation corresponding to the normal operation command, during the refresh operation executed by the memory cores within the refresh target banks.

6. 发明申请

US20100072498A1 Lithium-containing sialon phosphor and method of manufactring the same 有权
标题翻译：含锂锡隆荧光粉及其制造方法
公开(公告)号：US20100072498A1
公开(公告)日：2010-03-25
申请号：US11919237
申请日：2006-04-27
申请人： Rong Jun Xie , Mamoru Mitomo , Naoto Hirosaki , Yoshinobu Yamamoto
发明人： Rong Jun Xie , Mamoru Mitomo , Naoto Hirosaki , Yoshinobu Yamamoto
IPC分类号： H01L33/00 , C09K11/64
CPC分类号： C09K11/0883 , C04B35/597 , C04B35/62675 , C04B2235/3203 , C04B2235/3208 , C04B2235/3224 , C04B2235/3852 , C04B2235/3865 , C04B2235/3873 , C04B2235/766 , C09K11/7734 , H01L33/502
摘要： According to the invention, a highly crystalline α-sialon is synthesized to emit highly intense light and a white LED showing an excellent color rendering characteristic is provided by shifting emitted light to the short wavelength side (blue shift). Such an α-sialon is designed so as to be expressed by general formula (Lix, Cay, Euz) (Si12-(m+n)Alm+n) (OnN16-n) wherein the numerical ranges of x, y, z, m and n are respectively 0
摘要翻译：根据本发明，合成高结晶性α-赛隆发射高强度光，并且通过将发射光移动到短波长侧（蓝移）来提供显示出优异显色特性的白色LED。这样的α赛隆被设计成通过通式（Lix，Cay，Euz）（Si12-（m + n）Alm + n）（OnN16-n）表示，其中x，y，z， m和n分别为0

7. 发明申请

US20090302197A1 LIQUID LENS DRIVING METHOD, LIGUID LENS DRIVER, AND IMAGE PICKUP METHOD AND IMAGE PICKUP DEVICE USING LIQUID LENS 有权
标题翻译：液体镜头驱动方法，镜头镜头驱动器和图像拾取方法和使用液晶镜头的图像拾取器件
公开(公告)号：US20090302197A1
公开(公告)日：2009-12-10
申请号：US12193410
申请日：2008-08-18
申请人： Osamu Uchino , Hiroaki Kohriyama , Yoshinobu Yamamoto
发明人： Osamu Uchino , Hiroaki Kohriyama , Yoshinobu Yamamoto
IPC分类号： G02B27/40 , G02B26/00
CPC分类号： H04N5/23212 , G02B3/14 , G02B7/08 , H04N5/2254 , H04N5/23241
摘要： A liquid lens driver 10 has DC-DC converter 12, oscillator 14, pulse width modulator 16, and control logic circuit 18. The output buffer circuit 30 divides converter output voltage Vs of a prescribed amplitude (voltage level), input as the power source voltage, into bipolar, that is, positive/negative, output voltages Out-A, Out-B for output, and, corresponding to the H/L level of PWM signal CPWM, it turns ON/OFF the two output voltages Out-A, Out-B. In this way, from liquid lens driver 10, pulse width modulation (PWM) output voltages Out-A, Out-B are applied as driving voltage VL on electrodes 104, 108 of liquid lens 100.
摘要翻译：液体透镜驱动器10具有DC-DC转换器12，振荡器14，脉冲宽度调制器16和控制逻辑电路18.输出缓冲电路30将作为电源输入的规定幅度（电压电平）的转换器输出电压Vs 电压为双极，即正/负，输出电压Out-A，Out-B输出，并且对应于PWM信号CPWM的H / L电平，它将ON / OFF两个输出电压Out-A ，Out-B。以这种方式，从液体透镜驱动器10，在液体透镜100的电极104,108上施加脉宽调制（PWM）输出电压Out-A，Out-B作为驱动电压VL。

8. 发明申请

US20080181027A1 Memory device, memory controller and memory system 有权
公开(公告)号：US20080181027A1
公开(公告)日：2008-07-31
申请号：US12000952
申请日：2007-12-19
申请人： Takahiro Sato , Toshiya Uchida , Tatsuya Kanda , Tetsuo Miyamoto , Satoru Shirakawa , Yoshinobu Yamamoto , Tatsushi Otsuka , Hidenaga Takahashi , Masanori Kurita , Shinnosuke Kamata , Ayako Sato
发明人： Takahiro Sato , Toshiya Uchida , Tatsuya Kanda , Tetsuo Miyamoto , Satoru Shirakawa , Yoshinobu Yamamoto , Tatsushi Otsuka , Hidenaga Takahashi , Masanori Kurita , Shinnosuke Kamata , Ayako Sato
IPC分类号： G11C7/00 , G11C8/00
CPC分类号： G11C11/4087 , G09G5/393 , G09G5/395 , G11C8/12
摘要： An image memory, image memory system, and memory controller that are capable of efficiently accessing a rectangular area of two-dimensionally arrayed data are provided. The memory device has: a memory cell array that has a plurality of memory unit areas, each of which is selected by addresses; a plurality of input/output terminals; and an input/output unit provided between the memory cell array and the plurality of input/output terminals. Each of the memory unit areas stores therein data of a plurality of bytes or bits corresponding to the plurality of input/output terminals respectively, and the memory cell array and the input/output unit access a plurality of bytes or bits stored in a first memory unit area corresponding to the input address and in a second memory unit area adjacent to the first memory unit on the basis of the input address and combination information of the bytes or bits in response to a first operation code, and then, from the plurality of bytes or bits within the accessed first and second memory unit areas, associate a combination of the plurality of bytes or bits based on the combination information, with the plurality of input/output terminals.

9. 发明申请

US20080049240A1 Image data buffer apparatus and data transfer system for efficient data transfer 有权
标题翻译：用于高效数据传输的图像数据缓冲装置和数据传输系统
公开(公告)号：US20080049240A1
公开(公告)日：2008-02-28
申请号：US11651968
申请日：2007-01-11
申请人： Yoshinobu Yamamoto
发明人： Yoshinobu Yamamoto
IPC分类号： G06F15/00
CPC分类号： G06T1/60
摘要： An image data buffer apparatus includes a memory, and a FIFO control unit configured to cause the memory to operate as a FIFO and having a write pointer indicative of a write position of the memory and a read pointer indicative of a read position of the memory, wherein the FIFO control unit is configured to store image data as a plurality of blocks in the memory at respective positions successively indicated by the write pointer as the image data are supplied as the blocks contained in an image, to read one of the blocks from the memory at a position indicated by the read pointer, to read, from the memory, partial data that is part of at least one block adjacent to the one of the blocks, and to consolidate the one of the blocks and the partial data for transmission as one consolidated block.
摘要翻译：图像数据缓冲装置包括存储器和FIFO控制单元，其被配置为使存储器作为FIFO操作，并具有指示存储器的写入位置的写入指针和指示存储器的读取位置的读取指针，其中，所述FIFO控制单元被配置为当作为包含在图像中的块提供图像数据时，在由写指针连续指示的各个位置处将图像数据作为多个块存储在存储器中，从由读取指针指示的位置处的存储器，从存储器读取作为与该块之一相邻的至少一个块的一部分的部分数据，并将该块中的一个和部分数据合并以进行传输，作为一个整合块。

10. 发明授权

US07024442B2 Processing apparatus 失效
公开(公告)号：US07024442B2
公开(公告)日：2006-04-04
申请号：US09988615
申请日：2001-11-20
申请人： Yoshinobu Yamamoto , Nobukazu Koizumi , Atsushi Sakurai
发明人： Yoshinobu Yamamoto , Nobukazu Koizumi , Atsushi Sakurai
IPC分类号： G06F15/00
CPC分类号： G06F17/142
摘要： A processing apparatus includes a memory capable of storing data, a butterfly arithmetic unit for performing butterfly computation processes, and a bit-reversed order shuffle processing unit for writing results obtained by butterfly computation processes performed by the butterfly arithmetic unit at addresses in the memory after bit-reversed order shuffle instead of writing the results at addresses in the memory in processing order. The data written by the bit-reversed order shuffle processing unit are discrete fast Fourier transform results.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式