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    • 1. 发明授权
    • Semiconductor device and manufacturing method of the same
    • 半导体器件及其制造方法相同
    • US08343827B2
    • 2013-01-01
    • US13182750
    • 2011-07-14
    • Tadashi YamaguchiKeiichiro KashiharaYoji Kawasaki
    • Tadashi YamaguchiKeiichiro KashiharaYoji Kawasaki
    • H01L21/8238
    • H01L21/823807H01L21/823814H01L29/7848
    • In a CMIS device, to improve the operating characteristics of an n-channel electric field transistor that is formed by using a strained silicon technique, without degrading the operating characteristics of a p-channel field effect transistor. After forming a source/drain (an n-type extension region and an n-type diffusion region) of an nMIS and a source/drain (a p-type extension region and a p-type diffusion region) of a pMIS, the each source/drain having a desired concentration profile and resistance, a Si:C layer having a desired amount of strain is formed in the n-type diffusion region, and thus the optimum parasitic resistance and the optimum amount of strain in the Si:C layer are obtained in the source/drain of the nMIS. Moreover, by performing a heat treatment in forming the Si:C layer in a short time equal to or shorter than 1 millisecond, a change in the concentration profile of the respective p-type impurities of the already-formed p-type extension region and p-type diffusion region is suppressed.
    • 在CMIS器件中,为了改善通过使用应变硅技术形成的n沟道电场晶体管的工作特性,而不降低p沟道场效应晶体管的工作特性。 在形成pISIS的nMIS和源极/漏极(p型延伸区域和p型扩散区域)的源极/漏极(n型延伸区域和n型扩散区域)之后, 源极/漏极具有所需的浓度分布和电阻,在n型扩散区域中形成具有所需量的应变的Si:C层,因此Si:C层中的最佳寄生电阻和最佳应变量 在nMIS的源/漏中获得。 此外,通过在等于或短于1毫秒的短时间内形成Si:C层进行热处理,已经形成的p型延伸区域的各个p型杂质的浓度分布的变化和 p型扩散区被抑制。
    • 3. 发明申请
    • HOLLOW TYPE PLANAR ILLUMINATNG DEVICE
    • 中空型平面照明装置
    • US20100208490A1
    • 2010-08-19
    • US12682683
    • 2008-10-07
    • Ryuji TsuchiyaYoji Kawasaki
    • Ryuji TsuchiyaYoji Kawasaki
    • F21V7/00
    • G02B6/0096F21V7/0091F21V7/22F21V13/04F21Y2115/10G02B6/003G02B6/0046G02B6/0051G02B6/0055
    • Provided is a hollow type planar illuminating device having uniform luminance distribution over the entire light emitting surface. A reflecting surface member (2) is arranged on the bottom side of a hollow unit case (1), a light emitting surface member (3) is arranged on the side facing the reflecting surface member of the unit case, and a space sandwiched between the reflecting surface member and the light emitting surface member of the unit case is permitted to be a hollow light guide space (10). An LED light source unit (5) wherein many LEDs are mounted in a row on a wiring board is arranged adjacent to the both sides or one side of the hollow light guide space so that light is emitted to the hollow light guide space. Between the LED light source unit and an end surface of the hollow light guide space, a light collecting lens (9) is arranged. The light collecting lens reduces the directivity angle of light emitted from the LED light source unit in the device thickness direction. Thus, a hollow type planar illuminating device (30) is formed. The surface roughness (Ra) of the surface of the reflecting surface member (2) facing the hollow light guide space (10) is set to satisfy the inequalities of 1 μm
    • 提供了一种在整个发光表面上具有均匀亮度分布的中空型平面照明装置。 在中空单元壳体(1)的底侧设置有反射面构件(2),在与单元壳体的反射面构件相对的一侧配置有发光面构件(3),夹着 单元壳体的反射面构件和发光面构件被允许为中空导光空间(10)。 其中许多LED在布线板上一排安装的LED光源单元(5)被布置成与中空导光空间的两侧或一侧相邻,使得光被发射到空心导光空间。 在LED光源单元与中空导光空间的端面之间布置有聚光透镜(9)。 聚光透镜降低了从LED光源单元在器件厚度方向发射的光的方向角。 因此,形成中空型面状照明装置(30)。 面向中空导光空间(10)的反射面构件(2)的表面的表面粗糙度(Ra)设定为满足1μm
    • 5. 发明授权
    • Method of manufacturing semiconductor device
    • 制造半导体器件的方法
    • US08252651B2
    • 2012-08-28
    • US13046750
    • 2011-03-13
    • Yoji Kawasaki
    • Yoji Kawasaki
    • H01L21/336
    • H01L21/26586H01L21/26513H01L21/2652H01L29/66803H01L29/785
    • A semiconductor device having a FIN type transistor including a FIN-shape semiconductor portion improved for reliability by suppressing scattering of the characteristics of the FIN-shape transistor by decreasing a difference between impurity concentration at an upper surface and impurity concentration on a lateral side of the FIN-shape semiconductor portion, in which a pad insulating film at a thickness of about 2 to 5 nm is formed to the upper surface of the FIN-shape semiconductor portion, cluster ions are implanted to one lateral side of the FIN-shape semiconductor portion from an oblique direction at a first implantation angle θ1 and then cluster ions are implanted to another lateral side of the FIN-shape semiconductor portion from an oblique direction at a second implantation angle θ2 in symmetrical with the first implantation angle θ1 and, subsequently, the cluster ions implanted to the FIN-shape semiconductor portion 10 are activated to form a diffusion region that forms a portion of a source region and a drain region.
    • 一种具有FIN型晶体管的半导体器件,其包括通过减小上表面的杂质浓度与外部侧杂质浓度之间的差异来抑制FIN形状晶体管的特性的散射而提高可靠性的FIN型晶体管 在FIN型半导体部的上表面形成厚度约2〜5nm的焊垫绝缘膜的FIN型半导体部,将簇离子注入到FIN型半导体部的一侧面 从倾斜方向以第一注入角度& 1;然后将簇离子从倾斜方向以第一注入角度θ与第一注入角度θ对称地注入到FIN形状半导体部分的另一侧面; 1,并且随后,注入到FIN形状半导体部分10的簇离子被激活以形成扩散区域 在其上形成源极区域和漏极区域的一部分。
    • 8. 发明申请
    • Surface Light-Emitting Device and Display Device Using the Same
    • 表面发光装置及使用其的显示装置
    • US20100059767A1
    • 2010-03-11
    • US12555856
    • 2009-09-09
    • Yoji KAWASAKIRyuji TSUCHIYA
    • Yoji KAWASAKIRyuji TSUCHIYA
    • H01L33/00
    • G02F1/133615G02B6/0055G02B6/0068G02B6/0073G02B6/0096
    • A surface light-emitting device is disclosed, in which a plurality of spot light sources are arranged along the side surface of a housing of the device, and the light emitted from the spot light sources located at the end portions of the spot light source sequence emits a lower light flux than the average light flux of the light emitted from the other spot light sources. The spot light source sequence is, for example, an LED array including an alignment of light-emitting diodes (LEDs). The LED array includes two groups of LED elements arranged in a predetermined repetitive pattern from one and the other ends, respectively, of the LED array, and at least an LED emitting low light flux is arranged at a predetermined position in the vicinity of the center of the array. As a result, the requirement for a reduced thickness and a narrower frame can be met, while at the same time producing the white light of uniform chromaticity over the whole light-emitting surface.
    • 公开了一种表面发光装置,其中多个点光源沿着装置的壳体的侧表面布置,并且从位于点光源序列的端部的点光源发射的光 发射比从其他聚光光源发射的光的平均光通量更低的光通量。 点光源序列例如是包括发光二极管(LED)的对准的LED阵列。 LED阵列包括分别从LED阵列的一端和另一端以预定的重复图案布置的两组LED元件,并且至少一个发射低光通量的LED布置在中心附近的预定位置 的数组。 结果,可以满足减小厚度和较窄框架的要求,同时在整个发光表面上产生均匀色度的白光。
    • 9. 发明申请
    • METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    • 制造半导体器件的方法
    • US20110269282A1
    • 2011-11-03
    • US13046750
    • 2011-03-13
    • Yoji KAWASAKI
    • Yoji KAWASAKI
    • H01L21/336
    • H01L21/26586H01L21/26513H01L21/2652H01L29/66803H01L29/785
    • A semiconductor device having a FIN type transistor including a FIN-shape semiconductor portion improved for reliability by suppressing scattering of the characteristics of the FIN-shape transistor by decreasing a difference between impurity concentration at an upper surface and impurity concentration on a lateral side of the FIN-shape semiconductor portion, in which a pad insulating film at a thickness of about 2 to 5 nm is formed to the upper surface of the FIN-shape semiconductor portion, cluster ions are implanted to one lateral side of the FIN-shape semiconductor portion from an oblique direction at a first implantation angle θ1 and then cluster ions are implanted to another lateral side of the FIN shape semiconductor portion from an oblique direction at a second implantation angle θ2 in symmetrical with the first implantation angle θ1 and, subsequently, the cluster ions implanted to the FIN-shape semiconductor portion 10 are activated to form a diffusion region that forms a portion of a source region and a drain region.
    • 一种具有FIN型晶体管的半导体器件,其包括通过减小上表面的杂质浓度与外部侧杂质浓度之间的差异来抑制FIN形状晶体管的特性的散射而提高可靠性的FIN型晶体管 在FIN型半导体部的上表面形成厚度约2〜5nm的焊垫绝缘膜的FIN型半导体部,将簇离子注入到FIN型半导体部的一侧面 从倾斜方向以第一注入角度& 1;然后将簇离子从倾斜方向以第一注入角度θ与第一注入角度θ对称地注入到FIN形状半导体部分的另一侧面; 1 并且随后,注入到FIN形状半导体部分10的簇离子被激活以形成扩散区 在其上形成源极区域和漏极区域的一部分。
    • 10. 发明申请
    • SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
    • 半导体器件及其制造方法
    • US20120049201A1
    • 2012-03-01
    • US13182750
    • 2011-07-14
    • Tadashi YAMAGUCHIKeiichiro KashiharaYoji Kawasaki
    • Tadashi YAMAGUCHIKeiichiro KashiharaYoji Kawasaki
    • H01L27/092H01L21/8238
    • H01L21/823807H01L21/823814H01L29/7848
    • In a CMIS device, to improve the operating characteristics of an n-channel electric field transistor that is formed by using a strained silicon technique, without degrading the operating characteristics of a p-channel field effect transistor. After forming a source/drain (an n-type extension region and an n-type diffusion region) of an nMIS and a source/drain (a p-type extension region and a p-type diffusion region) of a pMIS, the each source/drain having a desired concentration profile and resistance, a Si:C layer having a desired amount of strain is formed in the n-type diffusion region, and thus the optimum parasitic resistance and the optimum amount of strain in the Si:C layer are obtained in the source/drain of the nMIS. Moreover, by performing a heat treatment in forming the Si:C layer in a short time equal to or shorter than 1 millisecond, a change in the concentration profile of the respective p-type impurities of the already-formed p-type extension region and p-type diffusion region is suppressed.
    • 在CMIS器件中,为了改善通过使用应变硅技术形成的n沟道电场晶体管的工作特性,而不降低p沟道场效应晶体管的工作特性。 在形成pISIS的nMIS和源极/漏极(p型延伸区域和p型扩散区域)的源极/漏极(n型延伸区域和n型扩散区域)之后, 源极/漏极具有所需的浓度分布和电阻,在n型扩散区域中形成具有所需量的应变的Si:C层,因此Si:C层中的最佳寄生电阻和最佳应变量 在nMIS的源/漏中获得。 此外,通过在等于或短于1毫秒的短时间内形成Si:C层进行热处理,已经形成的p型延伸区域的各个p型杂质的浓度分布的变化和 p型扩散区被抑制。