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    • 5. 发明授权
    • Driving circuit for plasma display panel
    • 等离子显示面板驱动电路
    • US07623094B2
    • 2009-11-24
    • US11425387
    • 2006-06-20
    • Bi-Hsien ChenYi-Min Huang
    • Bi-Hsien ChenYi-Min Huang
    • G09G3/28
    • G09G3/2965
    • A driving circuit for the sustain waveforms of plasma display panel (PDP) includes voltage clamping and energy recovery. The PDP functions as an equivalent capacitor having X and Y sides. A Scan IC has a transistor QH coupled between a first terminal of the Scan IC and the Y side and a transistor QL coupled between a second terminal of the Scan IC and the Y side. The first terminal of the Scan IC is coupled with a first voltage source. A first switch is coupled to coupled to the second terminal of the Scan IC, a second switch is coupled between a second voltage source and the X side, and a third switch is coupled with both the X side and a fourth switch. The fourth switch is also coupled to the second terminal of the Scan IC and serially to an inductor, a fifth switch, and ground.
    • 用于等离子体显示面板(PDP)的维持波形的驱动电路包括电压钳位和能量回收。 PDP用作具有X和Y侧的等效电容器。 扫描IC具有耦合在扫描IC的第一端和Y侧之间的晶体管QH和耦合在扫描IC的第二端和Y侧之间的晶体管QL。 扫描IC的第一个端子与第一个电压源耦合。 第一开关被耦合到耦合到扫描IC的第二端子,第二开关耦合在第二电压源和X侧之间,第三开关与X侧和第四开关耦合。 第四开关还耦合到Scan IC的第二端子,并且连续地耦合到电感器,第五开关和地。
    • 7. 发明授权
    • Multi-mode switch for plasma display panel
    • 等离子显示面板多模开关
    • US07474281B2
    • 2009-01-06
    • US11425156
    • 2006-06-20
    • Shin-Chang LinBi-Hsien ChenYi-Min Huang
    • Shin-Chang LinBi-Hsien ChenYi-Min Huang
    • G09G3/28
    • G09G3/2092G09G2330/02
    • A claimed multiple mode switch includes an input signal interface for receiving first and second input signals and producing a combined input signal; a driving circuit for receiving the combined input signal and producing driving signals accordingly; a resistor mode circuit electrically connected to a first output of the driving circuit, to a first node, and to a second node for enabling the multiple mode switch to operate in variable resistor mode or in large resistor mode; a fully-on mode circuit electrically connected to the second input signal, the first output of the driving circuit, and the second node for enabling the multiple mode switch to operate in fully-on mode; and a power switch electrically connected to the first node, the second node, and a third node for controlling switching of the multiple mode switch between off mode, fully-on mode, and variable resistor mode or large resistor mode.
    • 所要求的多模式开关包括用于接收第一和第二输入信号并产生组合输入信号的输入信号接口; 驱动电路,用于接收组合的输入信号并产生相应的驱动信号; 与驱动电路的第一输出端电连接到第一节点的电阻器模式电路,以及使得多模式开关能够以可变电阻器模式或大电阻器模式工作的第二节点; 电连接到第二输入信号,驱动电路的第一输出和第二节点的完全导通模式电路,用于使多模式开关能够在完全启动模式下操作; 以及电连接到第一节点,第二节点和第三节点的电源开关,用于控制关闭模式,完全启动模式和可变电阻器模式或大电阻器模式之间的多模式开关的切换。
    • 8. 发明申请
    • METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH THIN GATE SPACER
    • 用于制造具有薄型间隙的半导体器件的方法
    • US20080227260A1
    • 2008-09-18
    • US11686980
    • 2007-03-16
    • Yi-Min Huang
    • Yi-Min Huang
    • H01L21/336
    • H01L21/2652H01L29/665H01L29/6659H01L29/7833
    • A method for fabricating a transistor. A substrate having a gate electrode thereon and insulated therefrom is provided. A first gate spacer with a first dielectric material is formed on the sidewalls of the gate electrode. A liner with a second dielectric material is formed on the upper surfaces of the substrate, the first gate spacer and the gate electrode, wherein the first dielectric material has an etching selectivity relative to the second dielectric material. Ion implantation is performed on the substrate to form source/drain regions in the substrate and substantially self-aligned with the liner on the first gate spacer. The liner is removed from the upper surfaces of the gate electrode and the source/drain regions. A method for fabricating a semiconductor device is also disclosed.
    • 一种制造晶体管的方法。 提供了具有栅电极并与其绝缘的衬底。 具有第一介电材料的第一栅极间隔物形成在栅电极的侧壁上。 具有第二介电材料的衬垫形成在衬底,第一栅极间隔物和栅电极的上表面上,其中第一介电材料相对于第二电介质材料具有蚀刻选择性。 在衬底上执行离子注入,以在衬底中形成源极/漏极区域,并且与第一栅极间隔物上的衬垫基本上自对准。 从栅电极和源/漏区的上表面去除衬垫。 还公开了一种制造半导体器件的方法。
    • 10. 发明授权
    • Driving circuit of plasma display panel
    • 等离子显示面板驱动电路
    • US07345656B2
    • 2008-03-18
    • US11425693
    • 2006-06-21
    • Bi-Hsien ChenYi-Min Huang
    • Bi-Hsien ChenYi-Min Huang
    • G09G3/28
    • G09G3/2965G09G3/294
    • A plasma display panel driving circuit includes a panel capacitor having a first side and a second side, a first switch electrically connected between the first side of the panel capacitor and a first voltage, a second switch electrically connected between the second side of the panel capacitor and the first voltage, a first inductor and a first diode electrically connected in series between the first side of the panel capacitor and a first node, a second inductor and a second diode electrically connected in series between the second side of the panel capacitor and the first node, a third switch electrically connected between the first side of the panel capacitor and the first node, a fourth switch electrically connected between the second side of the panel capacitor and the first node, and a fifth switch electrically connected between the first node and a second voltage.
    • 等离子体显示面板驱动电路包括具有第一侧和第二侧的面板电容器,电连接在面板电容器的第一侧和第一电压之间的第一开关,电连接在面板电容器的第二面之间的第二开关 并且所述第一电压,第一电感器和第一二极管电连接在所述面板电容器的第一侧和第一节点之间,第二电感器和第二二极管电连接在所述面板电容器的第二侧和 第一节点,电连接在面板电容器的第一侧和第一节点之间的第三开关,电连接在面板电容器的第二侧和第一节点之间的第四开关,以及电连接在第一节点和 第二电压。