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1. 发明专利

JPS61127656A Gypsum hardened body 失效
标题翻译： GYPSUM硬化体
公开(公告)号：JPS61127656A
公开(公告)日：1986-06-14
申请号：JP24457384
申请日：1984-11-21
申请人： Fuji Funen Kenzai Kogyo Kk , Keiichi Murakami , Yasuo Arai
发明人： MURAKAMI KEIICHI , ARAI YASUO
IPC分类号： C04B22/14 , C04B24/04 , C04B28/14
CPC分类号： C04B28/14

2. 发明专利

JPS6117461A Manufacture of blast furnace slag construction material 失效
标题翻译： BLAST FURNACE SLAG建筑材料的制造
公开(公告)号：JPS6117461A
公开(公告)日：1986-01-25
申请号：JP10795785
申请日：1985-05-20
申请人： Fuji Funen Kenzai Kogyo Kk , Yasuo Arai , Shigeki Aoki
发明人： ARAI YASUO , AOKI SHIGEKI
IPC分类号： C04B22/06 , C04B28/08

3. 发明专利

JPS59137362A Manufacture of refractory lightweight construction material 失效
$Manufacture of refractory lightweight construction material$
标题翻译：制冷轻型建筑材料的制造
公开(公告)号：JPS59137362A
公开(公告)日：1984-08-07
申请号：JP1105883
申请日：1983-01-26
申请人： Fuji Funen Kenzai Kogyo Kk , Yasuo Arai , Shigeki Aoki
发明人： MATSUURA SADAJI , ARAI YASUO , AOKI SHIGEKI , ANDOU SATORU
IPC分类号： C04B38/00 , C04B18/08 , C04B18/24
CPC分类号： Y02W30/92 , Y02W30/97

4. 发明专利

JPS615672B2 JPS615672B2 - 失效
公开(公告)号：JPS615672B2
公开(公告)日：1986-02-20
申请号：JP13905481
申请日：1981-09-03
申请人： Yasuo Arai , Shigeki Aoki , Fuji Funen Kenzai Kogyo Kk
发明人： ARAI YASUO , AOKI SHIGEKI
IPC分类号： C04B38/00 , C04B18/24
CPC分类号： C04B18/241 , Y02W30/97

5. 发明专利

JPS59137359A Manufacture of refractory lightweight foamed construction material 失效
$Manufacture of refractory lightweight foamed construction material$
标题翻译：制冷轻型泡沫结构材料的制造
公开(公告)号：JPS59137359A
公开(公告)日：1984-08-07
申请号：JP1105983
申请日：1983-01-26
申请人： Fuji Funen Kenzai Kogyo Kk , Yasuo Arai , Shigeki Aoki
发明人： MATSUURA SADAJI , ARAI YASUO , AOKI SHIGEKI , ANDOU SATORU
IPC分类号： C04B38/00 , C04B18/08 , C04B18/10 , C04B38/02
CPC分类号： Y02W30/92

6. 发明专利

JPS61126009A Method for filling and solidifying cosmetic, and apparatus therefor 失效
标题翻译：填充和固化化妆品的方法及其装置
公开(公告)号：JPS61126009A
公开(公告)日：1986-06-13
申请号：JP24452584
申请日：1984-11-21
申请人： Yasuo Arai
发明人： ARAI YASUO
IPC分类号： A61K8/00 , A45D33/00 , A45D40/16 , A61K8/90 , A61Q1/00 , A61Q1/02 , B30B9/06
CPC分类号： B30B15/302 , A45D33/006 , A45D40/16 , B30B9/06 , B30B15/0017
摘要： PURPOSE: To prevent the seepage of cosmetic by using a specific container and dripping a cosmetic dissolved in a solvent, and to obtain a cosmetic free from surface mottling by applying a water-absorbing film to the upper surface of the cosmetic container and applying pressure to the film to effect the absorption of the solvent.
CONSTITUTION: A proper amount of a viscous solution of cosmetic 11, 21 dissolved in a solvent is dripped to a dish-shaped top-opened container 20 having a filter 23 at the bottom. A water-absorbing film 45 is applied to the top of the container 20 containing the cosmetic, and a pressing block 41 (preferably a porous block) fitting to the top opening of the container 20 is placed on the film 45 to press the cosmetic 20 in the container. The solvent in the cosmetic is absorbed through the filter of the bottom of the container. The solvent in the cosmetic 20 is absorbed also from the top by the use of a porous material as the pressing block 41.
EFFECT: Since the solvent is absorbed quickly, the solidified cosmetic is free from cracking nor surface dent.
COPYRIGHT: (C)1986,JPO&Japio
摘要翻译：目的：通过使用特定的容器和滴加溶解在溶剂中的化妆品来防止化妆品的渗漏，并通过在化妆品容器的上表面施加吸水膜并获得不含表面斑点的化妆品，并施加压力该膜能够吸收溶剂。构成：将溶解在溶剂中的适量的化妆品11,21的粘稠溶液滴入到底部具有过滤器23的碟形顶部敞开的容器20中。在包含化妆品的容器20的顶部涂敷吸水膜45，并且将与容器20的顶部开口相配合的按压块41（优选为多孔块）放置在膜45上，以按压化妆品20 在容器中化妆品中的溶剂通过容器底部的过滤器吸收。化妆品20中的溶剂也通过使用多孔材料作为压块41从顶部吸收。效果：由于溶剂被快速吸收，所以固化的化妆品没有开裂或表面凹陷。

7. 发明授权

US08928101B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08928101B2
公开(公告)日：2015-01-06
申请号：US13253791
申请日：2011-10-05
申请人： Hiroki Kasai , Yasuo Arai , Takaki Hatsui
发明人： Hiroki Kasai , Yasuo Arai , Takaki Hatsui
IPC分类号： H01L31/0224 , H01L27/146 , H01L27/12
CPC分类号： H01L27/14607 , H01L27/1203 , H01L27/14659
摘要： A semiconductor device includes: a first semiconductor layer of a first conductivity type; an insulation layer on the first semiconductor layer; a second semiconductor layer in the insulation layer; an active element in the second semiconductor layer; a first semiconductor region on the first semiconductor layer and of a second conductivity type; a second semiconductor region in the first semiconductor region and of the second conductivity type with a higher impurity concentration than the first semiconductor region; a first conductor in a through hole in the insulation layer and connected to the second semiconductor region; a second conductor above or within the insulation layer, the second conductor surrounding the first conductor such that an outside edge thereof is outside the second semiconductor region; a third conductor connecting the first and second conductors; and a fourth conductor connected to the first semiconductor layer.
摘要翻译：半导体器件包括：第一导电类型的第一半导体层; 第一半导体层上的绝缘层; 绝缘层中的第二半导体层; 第二半导体层中的有源元件; 第一半导体区域和第二导电类型的第一半导体区域; 在第一半导体区域中的第二半导体区域和具有比第一半导体区域更高的杂质浓度的第二导电类型的第二半导体区域; 绝缘层中的通孔中的第一导体，并连接到第二半导体区; 绝缘层之上或之内的第二导体，所述第二导体围绕所述第一导体，使得其外边缘在所述第二半导体区域的外部; 连接第一和第二导体的第三导体; 以及连接到第一半导体层的第四导体。

8. 发明申请

US20130043537A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
公开(公告)号：US20130043537A1
公开(公告)日：2013-02-21
申请号：US13583409
申请日：2011-03-09
申请人： Yasuo Arai , Masao Okihara , Hiroki Kasai
发明人： Yasuo Arai , Masao Okihara , Hiroki Kasai
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L27/14658 , H01L21/225 , H01L21/2652 , H01L21/84 , H01L27/0629 , H01L27/1203 , H01L27/1207 , H01L27/1443 , H01L27/1461 , H01L27/14612 , H01L29/66477 , H01L29/78648 , H01L29/8611
摘要： There is provided a semiconductor device and a method for manufacturing a semiconductor device. Within the N-type semiconductor layer formed from a high resistance N-type substrate, the P-type well diffusion layer and P-type extraction layer are formed and are fixed to ground potential. Due thereto, a depletion layer spreading on the P-type well diffusion layer side does not reach the interlayer boundary between the P-type well diffusion layer and the buried oxide film. Hence, the potential around the surface of the P-type well diffusion layer is kept at a ground potential. Accordingly, when the voltages are applied to the backside of the N-type semiconductor layer and a cathode electrode, a channel region at the MOS-type semiconductor formed as a P-type semiconductor layer is not activated. Due thereto, leakage current that may occur independently of a control due to the gate electrode of a transistor can be suppressed.

9. 发明授权

US5349669A Data write control means 失效
标题翻译：数据写入控制装置
公开(公告)号：US5349669A
公开(公告)日：1994-09-20
申请号：US12618
申请日：1993-02-02
申请人： Yasuo Arai , Hisatake Sato
发明人： Yasuo Arai , Hisatake Sato
IPC分类号： G06F1/30 , G06F11/00 , G06F11/14 , G11C7/22 , G06F12/16
CPC分类号： G06F11/0754 , G06F1/30 , G06F11/004 , G11C7/22 , G06F11/0757 , G06F11/1415
摘要： The present invention relates to a data protection (310) for preventing data from being erroneously written in a data holding circuit (307). A data protection circuit (311) receives a data protection set release select signal Sa provided by a processor (330), thereby causing a second timer (316) to start timing. The data protection circuit (311) further detects the level of a chip select signal CS provided by a power supply monitoring circuit (320) after the second timer (316) timed the time interval T2 and provides a data protection signal DP corresponding to the signal Sa to the data holding circuit (307) only in the case that the data protection circuit (311) judged that the main power supply (305) is at normal state.
摘要翻译：本发明涉及一种用于防止数据被错误写入数据保持电路（307）的数据保护（310）。数据保护电路（311）接收由处理器（330）提供的数据保护设置释放选择信号Sa，从而使第二定时器（316）开始定时。数据保护电路（311）在第二定时器（316）定时到时间间隔T2之后，进一步检测由电源监视电路（320）提供的片选信号CS的电平，并提供对应于信号的数据保护信号DP 只有在数据保护电路（311）判断主电源（305）处于正常状态的情况下，才将数据保持电路Sa连接到数据保持电路（307）。

10. 发明授权

US5502418A Voltage-controlled oscillating circuit 失效
标题翻译：电压控制振荡电路
公开(公告)号：US5502418A
公开(公告)日：1996-03-26
申请号：US380580
申请日：1995-01-30
申请人： Yasuo Arai
发明人： Yasuo Arai
IPC分类号： H03K3/354 , H03K3/03 , H03L7/099 , H03B5/24 , H03K3/353
CPC分类号： H03L7/0995 , H03K3/0315
摘要： The present invention provides a voltage controlled oscillating circuit comprising a multi-staged phase inversion circuit composed of 4 or more even-number stages of phase inversion devices connected in series; and a switch circuit having a delay time characteristic similar to that of said phase inversion circuit, wherein the switch circuit satisfies oscillation conditions by converting an output phase of the even-numbered inverters connected in series into a phase that is the same as those of the outputs of odd-numbered inverters connected in series; thereby obtaining timing signals having a period equal to 1/N of the oscillation period.
摘要翻译：本发明提供了一种压控振荡电路，包括由串联连接的4个或更多个偶数阶段的相位反相装置构成的多级相位反转电路; 以及具有与所述相位反转电路类似的延迟时间特性的开关电路，其中所述开关电路通过将串联连接的所述偶数反相器的输出相位转换成与所述相位相同的相位来满足振荡条件串联连接的奇数型逆变器的输出; 从而获得周期等于振荡周期的1 / N的定时信号。

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