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    • 7. 发明申请
    • SELECTIVE SLICING EQUALIZER
    • 选择性平滑化
    • US20080260017A1
    • 2008-10-23
    • US11736699
    • 2007-04-18
    • Yih-Ming TsuieWei-Ting Wang
    • Yih-Ming TsuieWei-Ting Wang
    • H03H7/30
    • H04L25/03057H04L2025/03598H04L2025/03681H04L2025/03726
    • An equalizer. The equalizer, either operated in a blind mode or a decision directed mode, comprises a feed-forward filter, a feedback filter, a decision device, a control circuit, and a multiplexer. The feed-forward filter receives an input signal. The feedback filter filters an equalized signal. The combiner combines the feed-forward filtered signal and the feedback filtered signal. The decision device maps the combined signal to one symbol of a symbol set. The control circuit receives the combined output and generates a slice control signal. The multiplexer selects the combined signal or the mapped signal as the equalized according to the slice control signal when operated in the blind mode.
    • 均衡器 以盲模式或决策指示模式操作的均衡器包括前馈滤波器,反馈滤波器,判定装置,控制电路和多路复用器。 前馈滤波器接收输入信号。 反馈滤波器滤除均衡信号。 组合器组合前馈滤波信号和反馈滤波信号。 决定装置将组合的信号映射到符号集合的一个符号。 控制电路接收组合输出并产生一个片控制信号。 当在盲模式下操作时,复用器根据片控制信号选择组合信号或映射信号作为均衡。
    • 8. 发明授权
    • Carrier recovery system and method thereof
    • 载波恢复系统及其方法
    • US07406137B2
    • 2008-07-29
    • US10710783
    • 2004-08-02
    • Cheng-Yi HuangBao-Chi PengWei-Ting Wang
    • Cheng-Yi HuangBao-Chi PengWei-Ting Wang
    • H04L27/14H04L27/16H04L27/22
    • H04L25/061H04L27/066H04L2027/0028H04L2027/0057
    • A carrier recovery system includes an in-phase mixer for mixing an incoming signal with an in-phase reference signal to produce an in-phase baseband signal; a quadrature-phase mixer for mixing the incoming signal with a quadrature-phase reference signal to produce a quadrature-phase baseband signal; a DC detector for measuring a DC offset of the quadrature-phase baseband signal; and a frequency synthesizer for generating the in-phase reference signal and the quadrature-phase reference signal according to the DC offset measured by the DC detector. The quadrature-phase reference signal is the in-phase reference signal phase-delayed by ninety degrees. The DC offset of the quadrature-phase baseband signal is caused by a pilot tone of the VSB signal for a selected carrier in an Advanced Television Systems Committee (ATSC) digital television (DTV) receiver. By minimizing the DC offset, the carrier recover system locks the quadrature-phase reference signal and the in-phase reference signal to the selected channel.
    • 载波恢复系统包括同步混频器,用于将输入信号与同相参考信号混频以产生同相基带信号; 正交相位混频器,用于将输入信号与正交相位参考信号混频以产生正交相位基带信号; DC检测器,用于测量正交相位基带信号的DC偏移; 以及用于根据由DC检测器测量的DC偏移产生同相参考信号和正交参考信号的频率合成器。 正交参考信号是相位延迟90度的同相参考信号。 正交相位基带信号的直流偏移由高级电视系统委员会(ATSC)数字电视(DTV)接收机中的所选载波的VSB信号的导频音引起。 通过最小化DC偏移,载波恢复系统将正交参考信号和同相参考信号锁定到所选通道。
    • 10. 发明申请
    • DECODING APPARATUS AND METHOD
    • 解码设备和方法
    • US20080141096A1
    • 2008-06-12
    • US11943275
    • 2007-11-20
    • Yan-Xiu ZhengYu T. SuWei-Ting Wang
    • Yan-Xiu ZhengYu T. SuWei-Ting Wang
    • G06F11/10
    • H03M13/2987H03M13/271H03M13/2771H04L1/0052H04L1/0066H04L1/0071
    • A decoding apparatus and method are described. The decoder includes N successive decoder groups numbered 1 to N arranged in series. Each decoder group includes primary decoding means for decoding the first sequence of codewords in combination with the source sequence of symbols to produce a sequence of primary decoded symbols; intermediate interleaving means for interleaving the sequence of primary decoded symbols using intra-block permutations on the source sequence of symbols and inter-block permutations on each intra-block permuted block across the predetermined number of the intra-block permuted blocks to produce a sequence of intermediate symbols; secondary decoding means for decoding the second sequence of codewords in combination with the sequence of intermediate symbols and a sequence of interleaved source symbols to produce a sequence of secondary decoded symbols; and de-interleaving means for de-interleaving the sequence of secondary decoded symbols to produce a sequence of estimated symbols.
    • 对解码装置和方法进行说明。 解码器包括串联布置的编号为1到N的N个连续解码器组。 每个解码器组包括主解码装置,用于与符号的源序列组合对第一码字序列进行解码,以产生主解码符号序列; 中间交织装置,用于在符号的源序列上使用块内排列来交织一次解码符号序列,并且在预定数目的块内置换块上对每个块内置换块进行块间置换,以产生序列 中间符号; 二次解码装置,用于与中间符号序列和交织的源符号序列相结合地解码第二码字序列以产生二次解码符号序列; 以及解交织装置,用于对二次解码符号序列进行解交织以产生估计符号序列。