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1. 发明授权

US5861347A Method for forming a high voltage gate dielectric for use in integrated circuit 失效
标题翻译：用于形成用于集成电路的高压栅极电介质的方法
公开(公告)号：US5861347A
公开(公告)日：1999-01-19
申请号：US887692
申请日：1997-07-03
申请人： Bikas Maiti , Wayne Paulson , James Heddleson
发明人： Bikas Maiti , Wayne Paulson , James Heddleson
IPC分类号： H01L21/28 , H01L21/8247 , H01L27/105 , H01L21/70
CPC分类号： H01L21/28211 , H01L27/105 , H01L27/11526 , H01L27/11546 , Y10S148/117 , Y10S148/163 , Y10S438/981
摘要： A method for form an integrated circuit device begins by growing a tunnel oxide (22). The tunnel oxide is exposed to a nitrogen containing ambient whereby nitrogen is incorporated at atomic locations at the interface between the tunnel oxide (22) and a substrate (11). This tunnel oxide and nitrogen exposure is performed for all of a floating gate active area (12), a high voltage active area (14) and a logic gate active area (16). A floating gate electrode (24) and interpoly dielectric regions (26 through 30) are then formed in the floating gate region (12). The tunnel oxide (22) is etched from the active areas (14 and 16) whereby nitrogen contamination (32) may remain. An optional sacrificial oxidation and a low temperature 830.degree. C. wet oxidation process utilizing HCL, H2 and O2 is then used to grow a high voltage gate dielectric (34) which has been shown to improve charge to breakdown characteristics by a factor of 1,000. After the formation of the high voltage gate oxide (34), a lower voltage logic gate oxide (36) is then formed.
摘要翻译：形成集成电路器件的方法是通过生长隧道氧化物（22）开始的。将隧道氧化物暴露于含氮环境，由此在隧道氧化物（22）和衬底（11）之间的界面处的原子位置处并入氮。对于浮动栅极有源区域（12），高电压有源区域（14）和逻辑门有源区域（16）的全部，执行隧道氧化物和氮暴露。然后在浮动栅极区域（12）中形成浮置栅电极（24）和多晶硅互连区域（26至30）。从活性区域（14和16）蚀刻隧道氧化物（22），由此可以保留氮污染物（32）。然后使用可选的牺牲氧化和低温830℃的使用HCL，H 2和O 2的湿式氧化方法来生长高电压栅极电介质（34），其已经显示出将击穿特性的电荷提高了1000倍。在形成高压栅极氧化物（34）之后，形成较低电压的逻辑栅氧化层（36）。

2. 发明授权

US5665620A Method for forming concurrent top oxides using reoxidized silicon in an EPROM 失效
标题翻译：在EPROM中使用再氧化硅形成并行顶部氧化物的方法
公开(公告)号：US5665620A
公开(公告)日：1997-09-09
申请号：US283364
申请日：1994-08-01
申请人： Bich-Yen Nguyen , Sergio A. Ajuria , Wayne Paulson , Jon Dahm
发明人： Bich-Yen Nguyen , Sergio A. Ajuria , Wayne Paulson , Jon Dahm
IPC分类号： H01L21/316 , H01L21/28 , H01L21/318 , H01L21/336 , H01L21/8247
CPC分类号： H01L29/6659 , H01L21/28273 , H01L29/6656
摘要： A stack of oxide (16) and silicon nitride (18) is grown/deposited over a patterned polysilicon line, which typically acts as a bottom capacitor plate. A thin layer of amorphous or polycrystalline silicon (20) is deposited over the blanket silicon nitride film. The thickness of the deposited silicon layer must be optimized according to the final amount of oxide desired over the silicon nitride, which will be roughly twice the thickness of the deposited silicon film. The oxide/nitride/silicon stack is then patterned and etched, stopping either at or underneath the bottom oxide. Any subsequent cleaning in potentially oxide-etching chemistries (including HF) is done with the protective silicon deposit on top of the silicon nitride. The entire structure is then thermally oxidized, transforming the deposited silicon into silicon oxide (30). Where the structure has been cleared down to the substrate by etching, a second gate oxide is simultaneously formed.
摘要翻译：氧化物（16）和氮化硅（18）的堆叠生长/沉积在通常用作底部电容器板的图案化多晶硅线路上。在覆盖氮化硅膜上沉积薄层的非晶或多晶硅（20）。沉积硅层的厚度必须根据氮化硅所需的氧化物的最终量进行优化，其大约是沉积硅膜厚度的两倍。然后对氧化物/氮化物/硅堆叠进行构图和蚀刻，停止在底部氧化物的底部或底部。在潜在氧化物蚀刻化学（包括HF）中的任何后续清洁都是用氮化硅顶部的保护性硅沉积物进行的。然后将整个结构热氧化，将沉积的硅转化成氧化硅（30）。在通过蚀刻将结构清除到衬底的同时，同时形成第二栅极氧化物。

3. 发明申请

US20050059213A1 Semiconductor device with nanoclusters 有权
公开(公告)号：US20050059213A1
公开(公告)日：2005-03-17
申请号：US10663621
申请日：2003-09-16
申请人： Robert Steimle , Ramachandran Muralidhar , Wayne Paulson , Rajesh Rao , Bruce White , Erwin Prinz
发明人： Robert Steimle , Ramachandran Muralidhar , Wayne Paulson , Rajesh Rao , Bruce White , Erwin Prinz
IPC分类号： H01L21/28 , H01L21/336 , H01L21/8238 , H01L27/115 , H01L29/423
CPC分类号： B82Y10/00 , H01L21/28273 , H01L27/115 , H01L29/42332
摘要： A process of forming a device with nanoclusters. The process includes forming nanoclusters (e.g. silicon nanocrystals) and forming an oxidation barrier layer over the nanoclusters to inhibit oxidizing agents from oxidizing the nanoclusters during a subsequent formation of a dielectric of the device. At least a portion of the oxidation barrier layer is removed after the formation of the dielectric. In one example, the device is a memory wherein the nanoclusters are utilized as charge storage locations for charge storage transistors of the memory. In this example, the oxidation barrier layer protects the nanoclusters from oxidizing agents due to the formation of gate dielectric for high voltage transistors of the memory.

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