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1. 发明申请

WO2011097302A3 SEMICONDUCTOR ELECTRONIC COMPONENTS AND CIRCUITS 审中-公开
标题翻译：半导体电子元件和电路
公开(公告)号：WO2011097302A3
公开(公告)日：2011-11-17
申请号：PCT/US2011023485
申请日：2011-02-02
申请人： TRANSPHORM INC , PARIKH PRIMIT , HONEA JAMES , BLAKE JR CARL C , COFFIE ROBERT , WU YIFENG , MISHRA UMESH
发明人： PARIKH PRIMIT , HONEA JAMES , BLAKE JR CARL C , COFFIE ROBERT , WU YIFENG , MISHRA UMESH
IPC分类号： H01L25/18 , H01L27/04
CPC分类号： H01L27/0883 , H01L21/8258 , H01L23/49562 , H01L23/49575 , H01L23/642 , H01L23/647 , H01L25/165 , H01L25/18 , H01L27/0605 , H01L2224/48137 , H01L2224/48195 , H01L2224/48247 , H01L2224/48257 , H01L2924/1305 , H01L2924/13055 , H01L2924/13062 , H01L2924/13091 , H01L2924/30107 , H03K17/567 , H01L2924/00
摘要： An electronic component includes a high-voltage depletion-mode transistor and a low-voltage enhancement-mode transistor both encased in a single package. A source electrode of the high-voltage depletion-mode transistor is electrically connected to a drain electrode of the low-voltage enhancement-mode transistor, a drain electrode of the high-voltage depletion-mode transistor is electrically connected to a drain lead of the single package, a gate electrode of the low-voltage enhancement-mode transistor is electrically connected to a gate lead of the single package, a gate electrode of the high-voltage depletion-mode transistor is electrically connected to an additional lead of the single package, and a source electrode of the low-voltage enhancement-mode transistor is electrically connected to a conductive structural portion of the single package.
摘要翻译：电子部件包括高电压耗尽型晶体管和低压增强型晶体管，两者都封装在单个封装中。高电压耗尽型晶体管的源电极电连接到低电压增强型晶体管的漏电极，高电压耗尽型晶体管的漏极电连接到漏极引线单个封装，低电压增强型晶体管的栅电极电连接到单个封装的栅极引线，高电压耗尽型晶体管的栅极电连接到单个封装的附加引线并且低电压增强型晶体管的源电极电连接到单个封装的导电结构部分。

2. 发明申请

WO2010068554A2 SEMICONDUCTOR HETEROSTRUCTURE DIODES 审中-公开
标题翻译：半导体结构二极管
公开(公告)号：WO2010068554A2
公开(公告)日：2010-06-17
申请号：PCT/US2009066647
申请日：2009-12-03
申请人： TRANSPHORM INC , WU YIFENG , MISHRA UMESH , PARIKH PRIMIT , CHU RONGMING , BEN-YAACOV ILAN , SHEN LIKUN
发明人： WU YIFENG , MISHRA UMESH , PARIKH PRIMIT , CHU RONGMING , BEN-YAACOV ILAN , SHEN LIKUN
IPC分类号： H01L29/868
CPC分类号： H01L29/0615 , H01L27/0629 , H01L29/2003 , H01L29/205 , H01L29/4236 , H01L29/778 , H01L29/7786 , H01L29/7787 , H01L29/872
摘要： Planar Schottky diodes for which the semiconductor material includes a heterojunction which induces a 2DEG in at least one of the semiconductor layers. A metal anode contact is on top of the upper semiconductor layer and forms a Schottky contact with that layer. A metal cathode contact is connected to the 2DEG, forming an ohmic contact with the layer containing the 2DEG.
摘要翻译：平面肖特基二极管，其半导体材料包括在至少一个半导体层中诱导2DEG的异质结。金属阳极触点位于上半导体层的顶部，与该层形成肖特基接触。金属阴极接触件连接到2DEG，与包含2DEG的层形成欧姆接触。

3. 发明申请

WO2010014128A3 NORMALLY-OFF SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME 审中-公开
公开(公告)号：WO2010014128A3
公开(公告)日：2010-02-04
申请号：PCT/US2009/002153
申请日：2009-04-06
申请人： CREE, INC. , HEIKMAN, Sten , WU, Yifeng
发明人： HEIKMAN, Sten , WU, Yifeng
IPC分类号： H01L29/778 , H01L21/335
摘要： Normally-off semiconductor devices are provided. A Group III-nitride buffer layer is provided. A Group III-nitride barrier layer is provided on the Group III-nitride buffer layer. A non-conducting spacer layer is provided on the Group III-nitride barrier layer. The Group III-nitride barrier layer and the spacer layer are etched to form a trench. The trench extends through the barrier layer and exposes a portion of the buffer layer. A dielectric layer is formed on the spacer layer and in the trench and a gate electrode is formed on the dielectric layer. Related methods of forming semiconductor devices are also provided herein.

4. 发明申请

WO2010014128A2 NORMALLY-OFF SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME 审中-公开
标题翻译：正常的半导体器件及其制造方法
公开(公告)号：WO2010014128A2
公开(公告)日：2010-02-04
申请号：PCT/US2009002153
申请日：2009-04-06
申请人： CREE INC , HEIKMAN STEN , WU YIFENG
发明人： HEIKMAN STEN , WU YIFENG
IPC分类号： H01L29/778 , H01L21/335
CPC分类号： H01L29/7787 , H01L29/1066 , H01L29/2003 , H01L29/402 , H01L29/66462
摘要： Normally-off semiconductor devices are provided. A Group III-nitride buffer layer is provided. A Group III-nitride barrier layer is provided on the Group III-nitride buffer layer. A non-conducting spacer layer is provided on the Group III-nitride barrier layer. The Group III-nitride barrier layer and the spacer layer are etched to form a trench. The trench extends through the barrier layer and exposes a portion of the buffer layer. A dielectric layer is formed on the spacer layer and in the trench and a gate electrode is formed on the dielectric layer. Related methods of forming semiconductor devices are also provided herein.
摘要翻译：提供通常的半导体器件。提供III族氮化物缓冲层。 III族氮化物阻挡层设置在III族氮化物缓冲层上。在III族氮化物阻挡层上提供非导电间隔层。 III族氮化物阻挡层和间隔层被蚀刻以形成沟槽。沟槽延伸穿过阻挡层并暴露缓冲层的一部分。在间隔层和沟槽中形成电介质层，在电介质层上形成栅电极。本文还提供了形成半导体器件的相关方法。

5. 发明申请

WO2006110204A3 THICK SEMI-INSULATING OR INSULATING EPITAXIAL GALLIUM NITRIDE LAYERS AND DEVICES INCORPORATING SAME 审中-公开
公开(公告)号：WO2006110204A3
公开(公告)日：2006-10-19
申请号：PCT/US2006/004353
申请日：2006-02-08
申请人： CREE, INC. , SAXLER, Adam William , WU, Yifeng , PARIKH, Primit , MISHRA, Umesh , SMITH, Richard Peter , SHEPPARD, Scott T.
发明人： SAXLER, Adam William , WU, Yifeng , PARIKH, Primit , MISHRA, Umesh , SMITH, Richard Peter , SHEPPARD, Scott T.
IPC分类号： H01L29/778 , H01L29/417
摘要： Semiconductor device structures and methods of fabricating semiconductor devices structures are provided that include a semi-insulating or insulating GaN epitaxial layer on a conductive semiconductor substrate and/or a conductive layer. The semi-insulating or insulating GaN epitaxial layer has a thickness of at least about 4 µm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive SiC substrate and an insulating or semi-insulating GaN epitaxial layer on the conductive SiC substrate. The GaN epitaxial layer has a thickness of at least about 4 µm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive GaN substrate, an insulating or semi-insulating GaN epitaxial layer on the conductive GaN substrate, a GaN based semiconductor device on the GaN epitaxial layer and a via hole and corresponding via metal in the via hole that extends through layers of the GaN based semiconductor device and the GaN epitaxial layer.

6. 发明申请

WO2012134686A3 ELECTRONIC COMPONENTS WITH REACTIVE FILTERS 审中-公开
标题翻译：具有反应性过滤器的电子元件
公开(公告)号：WO2012134686A3
公开(公告)日：2013-03-21
申请号：PCT/US2012026810
申请日：2012-02-27
申请人： TRANSPHORM INC , HONEA JAMES , WU YIFENG
发明人： HONEA JAMES , WU YIFENG
IPC分类号： H02M1/12
CPC分类号： H03K17/687 , H02M1/126 , H02M7/5395 , H02P7/29 , H03K17/162 , H03K17/567 , H03K17/6871 , Y10T29/49105
摘要： An electronic component comprising a half bridge adapted for operation with an electrical load having an operating frequency is described. The half bridge comprises a first switch and a second switch each having a switching frequency, the first switch and the second switch each including a first terminal, a second terminal, and a control terminal, wherein the first terminal of the first switch and the second terminal of the second switch are both electrically connected to a node. The electronic component further includes a filter having a 3dB roll-off frequency, the 3dB roll-off frequency being less than the switching frequency of the switches but greater than the operating frequency of the electrical load. The first terminal of the filter is electrically coupled to the node, and the 3dB roll-off frequency of the filter is greater than 5 kHz.
摘要翻译：描述了包括适于与具有工作频率的电负载一起操作的半桥的电子部件。半桥包括第一开关和第二开关，每个具有开关频率，第一开关和第二开关各自包括第一端子，第二端子和控制端子，其中第一开关的第一端子和第二开关第二开关的端子都电连接到节点。电子部件还包括具有3dB滚降频率的滤波器，3dB滚降频率小于开关的开关频率，但大于电负载的工作频率。滤波器的第一个端子电耦合到节点，滤波器的3dB滚降频率大于5 kHz。

7. 发明申请

WO2009036266A3 III-NITRIDE BIDIRECTIONAL SWITCHES 审中-公开
标题翻译： III-NITRIDE双向开关
公开(公告)号：WO2009036266A3
公开(公告)日：2009-05-07
申请号：PCT/US2008076160
申请日：2008-09-12
申请人： TRANSPHORM INC , HONEA JAMES , PARIKH PRIMIT , WU YIFENG , BEN-YAACOV ILAN
发明人： HONEA JAMES , PARIKH PRIMIT , WU YIFENG , BEN-YAACOV ILAN
IPC分类号： H01L29/78 , H01L29/80
CPC分类号： H01L29/7787 , H01L27/0605 , H01L29/1033 , H01L29/1066 , H01L29/2003 , H01L29/402 , H01L29/42316 , H01L29/7781
摘要： Bidirectional switches are described. The bidirectional switches include first and a second III-N based high electron mobility transistor. In some embodiments, the source of the first transistor is in electrical contact with a source of the second transistor. In some embodiments, the drain of the first transistor is in electrical contact with a drain of the second transistor. In some embodiments, the two transistors share a drift region and the switch is free of a drain contact between the two transistors. Matrix converters can be formed from the bidirectional switches.
摘要翻译：描述了双向开关。双向开关包括第一和第二III-N基高电子迁移率晶体管。在一些实施例中，第一晶体管的源极与第二晶体管的源电接触。在某些实施例中，第一晶体管的漏极与第二晶体管的漏极电接触。在一些实施例中，两个晶体管共享漂移区，并且开关在两个晶体管之间没有漏极接触。矩阵转换器可以由双向开关形成。

8. 发明申请

WO2009011798A2 LED WITH INTEGRATED CONSTANT CURRENT DRIVER 审中-公开
标题翻译：带集成恒流驱动器的LED
公开(公告)号：WO2009011798A2
公开(公告)日：2009-01-22
申请号：PCT/US2008008528
申请日：2008-07-11
申请人： CREE INC , UNDERWOOD ROBERT , WU YIFENG
发明人： UNDERWOOD ROBERT , WU YIFENG
IPC分类号： H05B33/08
CPC分类号： H05B33/0821 , H01L2224/48137 , H01L2924/10253 , H01L2924/13062 , H05B33/0812 , H05B33/0815 , H05B33/0818 , Y02B20/342 , Y02B20/343 , Y02B20/345 , Y02B20/347 , Y10S362/80 , H01L2924/00
摘要： An LED package containing integrated circuitry for matching a power source voltage to the LED operating voltage, LEDs containing such integrated circuitry, systems containing such packages, and methods for matching the source and operating voltages are described. The integrated circuitry typically contains a power converter and a constant current circuit. The LED package may also contain other active or passive components such as pin-outs for integrated or external components, a transformer and rectifier, or a rectifier circuit. External components can include control systems for regulating the LED current level or the properties of light emitted by the LED. Integrating the power supply and current control components into the LED can provide for fabrication of relatively small LEDs using fewer and less device-specific components.
摘要翻译：描述了包含用于将电源电压与LED工作电压相匹配的集成电路的LED封装，包含这种集成电路的LED，包含这种封装的系统以及用于匹配源电压和工作电压的方法。集成电路通常包含一个电源转换器和一个恒流电路。 LED封装还可能包含其他有源或无源元件，如用于集成或外部元件的引脚，变压器和整流器或整流器电路。外部组件可以包括用于调节LED电流水平或由LED发射的光的属性的控制系统。将电源和电流控制组件集成到LED中可以使用更少和更少的设备特定组件来制造相对较小的LED。

9. 发明申请

WO2007126541A1 HIGH EFFICIENCY AND/OR HIGH POWER DENSITY WIDE BANDGAP TRANSISTORS 审中-公开
标题翻译：高效率和/或高功率密度宽带束晶体管
公开(公告)号：WO2007126541A1
公开(公告)日：2007-11-08
申请号：PCT/US2007/005651
申请日：2007-03-05
申请人： CREE, INC. , WU, Yifeng , PARIKH, Primit , MISHRA, Umesh , MOORE, Marcia
发明人： WU, Yifeng , PARIKH, Primit , MISHRA, Umesh , MOORE, Marcia
IPC分类号： H01L29/778 , H01L29/40
CPC分类号： H01L29/7787 , H01L29/2003 , H01L29/404 , H01L29/42316
摘要： Field effect transistors having a power density of greater than 40 W/mm when operated at a frequency of at least 4 GHz are provided. The power density of at least 40 W/mm may be provided at a drain voltage of 135 V. Transistors with greater than 60% PAE and a power density of at least 5 W/mm when operated at 10 GHz at drain biases from 28 V to 48 V are also provided.
摘要翻译：提供了以至少4GHz的频率工作时功率密度大于40W / mm的场效应晶体管。在135V的漏极电压下可以提供至少40W / mm的功率密度。当在10GHz下工作时，具有大于60％PAE的功率密度至少为5W / mm的功率密度，漏极偏置为28V 至48 V。

10. 发明申请

WO2012106253A1 III-N DEVICE STRUCTURES AND METHODS 审中-公开
标题翻译： III-N装置结构和方法
公开(公告)号：WO2012106253A1
公开(公告)日：2012-08-09
申请号：PCT/US2012/023160
申请日：2012-01-30
申请人： TRANSPHORM INC. , PARIKH, Primit , DORA, Yuvaraj , WU, Yifeng , MISHRA, Umesh , FICHTENBAUM, Nicholas
发明人： PARIKH, Primit , DORA, Yuvaraj , WU, Yifeng , MISHRA, Umesh , FICHTENBAUM, Nicholas
IPC分类号： H01L29/778 , H01L21/335
CPC分类号： H01L23/34 , H01L21/02118 , H01L21/0254 , H01L21/486 , H01L21/76254 , H01L23/3732 , H01L23/3738 , H01L29/0657 , H01L29/1075 , H01L29/1608 , H01L29/2003 , H01L29/30 , H01L29/66431 , H01L29/778 , H01L29/7787 , H01L2924/0002 , H01L2924/00
摘要： A III-N device is described with a III-N layer, an electrode thereon, a passivation layer adjacent the III-N layer and electrode, a thick insulating layer adjacent the passivation layer and electrode, a high thermal conductivity carrier capable of transferring substantial heat away from the III-N device, and a bonding layer between the thick insulating layer and the carrier. The bonding layer attaches the thick insulating layer to the carrier. The thick insulating layer can have a precisely controlled thickness and be thermally conductive.
摘要翻译： III-N器件用III-N层，其上的电极，与III-N层和电极相邻的钝化层，与钝化层和电极相邻的厚绝缘层，能够转移大量的高导热载体远离III-N器件的热量，以及厚绝缘层和载体之间的结合层。接合层将厚绝缘层附着到载体上。厚的绝缘层可以具有精确控制的厚度并且是导热的。

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