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1. 发明授权

US6084286A Integrated device in an emitter switching configuration and with a cellular structure 失效
标题翻译：具有发射极开关配置和蜂窝结构的集成器件
公开(公告)号：US6084286A
公开(公告)日：2000-07-04
申请号：US864653
申请日：1997-05-28
申请人： Natale Aiello , Vito Graziano , Atanasio La Barbera , Stefano Sueri
发明人： Natale Aiello , Vito Graziano , Atanasio La Barbera , Stefano Sueri
IPC分类号： H01L21/8222 , H01L27/082 , H01L29/00
CPC分类号： H01L27/0825
摘要： An integrated device comprises a high-voltage transistor and a low-voltage transistor in an emitter-switching configuration integrated in a chip (400) of semiconductor material comprising a buried P-type region (120) and a corresponding P-type contact region (405) which delimit a portion of semiconductor material within which the low-voltage transistor is formed. The contact region (405) has a network structure such as to divide this portion of semiconductor material into a plurality of cells (410) within each of which there is an elemental P-type base region (425) and an elemental N-type emitter region (430) of the low-voltage transistor. The elemental regions (425) and (430) of the various cells (410) are electrically connected to one another by means of surface metal contacts.
摘要翻译：集成器件包括集成在半导体材料的芯片（400）中的发射极切换配置中的高压晶体管和低压晶体管，该芯片（400）包括掩埋P型区域（120）和相应的P型接触区域 405），其界定形成低压晶体管的半导体材料的一部分。接触区域（405）具有将半导体材料的该部分划分成多个单元（410）的网络结构，其中每个单元具有元素P型基极区域（425）和元素N型发射极低压晶体管的区域（430）。各种电池（410）的元件区域（425）和（430）通过表面金属触点彼此电连接。

2. 发明授权

US5804866A Method and device for dynamically self-biasing regions of integrated circuits 失效
标题翻译：用于动态自偏置集成电路区域的方法和装置
公开(公告)号：US5804866A
公开(公告)日：1998-09-08
申请号：US619421
申请日：1996-03-21
申请人： Natale Aiello , Vito Graziano
发明人： Natale Aiello , Vito Graziano
IPC分类号： H01L27/06 , H01L21/8222 , H01L27/02 , H03K17/735 , H01L27/082 , H01L27/102 , H01L29/70
CPC分类号： H01L27/0248
摘要： A method and device for maintaining junction isolation between a second region that is normally clamped at a reference potential, contained within a first region of an opposite type of conductivity whose potential is subject to large inertial swings. The junction is ensured even when the potential of the first region moves toward and beyond the reference potential to which the second region is clamped, by connecting the second region to the reference potential by a switch, and causing the switch to open which places the second region in a floating state, leaving it free to track the potential excursion of the first region. The switch is closed after the potential of the first region has returned to a normal value. A comparator senses a shift of the potential of the second region from the reference potential to which it is clamped. The shift is dynamically induced by the capacitive coupling of the two regions, and triggers off the clamping switch.
摘要翻译：一种用于维持通常夹在参考电位的第二区域之间的结隔离的方法和装置，该第二区域包含在电位受到大惯性摆动的相对导电类型的第一区域内。即使当第一区域的电位朝向和超过第二区域被夹紧的参考电位移动时，也可以通过将开关的第二区域连接到参考电位，并且使开关断开，将第二区域的第二区域地区处于浮动状态，可以自由追踪第一个地区潜在的游览活动。在第一区域的电位恢复到正常值之后，开关闭合。比较器检测第二区域的电位从钳位的参考电位的偏移。移位由两个区域的电容耦合动态地引起，并触发钳位开关。

3. 发明授权

US5828244A Driving circuit and method for driving a MOS transistor with delayed activation 失效
标题翻译：用于驱动具有延迟激活的MOS晶体管的驱动电路和方法
公开(公告)号：US5828244A
公开(公告)日：1998-10-27
申请号：US688297
申请日：1996-07-30
申请人： Sergio Palara , Vito Graziano
发明人： Sergio Palara , Vito Graziano
IPC分类号： H03K17/0412 , H03K17/30 , H05B41/282 , H03K3/00
CPC分类号： H03K17/04123 , H03K17/302 , H05B41/2825
摘要： A driver circuit delays the turning on of a MOS transistor by utilizing the time-wise pattern of the circuit input signal rather than generating a delay within the circuit itself. A threshold type of circuit element is arranged so that no current flows toward or from, depending on the type of the MOS transistor, the control terminal before the voltage at the circuit input exceeds a predetermined value. This is achieved, for example, by coupling a Zener diode serially to the control terminal. Where the input signal is of a kind which increases with a degree of uniformity, the time required to exceed that threshold will correspond to the desired delay. Thus, the driver circuit can match the dynamic range of the input signal automatically.
摘要翻译：驱动电路通过利用电路输入信号的时间图案来延迟MOS晶体管的导通，而不是在电路本身内产生延迟。电路元件的阈值类型被布置成使得根据MOS晶体管的类型，电路输入端的电压之前的控制端子超过预定值时，电流不向或朝向流动。这通过例如将齐纳二极管串联耦合到控制端来实现。当输入信号是以均匀度增加的类型时，超过该阈值所需的时间将对应于期望的延迟。因此，驱动电路可以自动匹配输入信号的动态范围。

4. 发明授权

US5763934A Integrated electronic device with reduced parasitic currents, and corresponding methods 失效
标题翻译：具有降低的寄生电流的集成电子器件及相应的方法
公开(公告)号：US5763934A
公开(公告)日：1998-06-09
申请号：US774140
申请日：1996-12-24
申请人： Natale Aiello , Vito Graziano
发明人： Natale Aiello , Vito Graziano
IPC分类号： H01L27/02 , H01L27/082 , H01L29/00 , H01L29/76
CPC分类号： H01L27/0821 , H01L27/0203
摘要： The present invention relates to an electronic device integrated monolithlly on a semiconductor material comprising a substrate having a first conductivity type in which are formed first and second diffusion regions of a second conductivity type. The substrate and the first and second diffusion regions defining a base region, a collector region and an emitter region of a parasitic transistor. The second diffusion region includes a third diffusion region having conductivity of the first type to provide in the second diffusion region a resistive path placed in series with the emitter region of the parasitic transistor while backfeeding it negatively and taking it to saturation with a resulting reduction of its current gain and limitation of the maximum current due thereto.
摘要翻译：本发明涉及一种整体地集成在半导体材料上的电子器件，它包括具有第一导电类型的衬底，其中第一和第二扩散区形成第二导电类型。衬底和第一和第二扩散区域限定寄生晶体管的基极区域，集电极区域和发射极区域。第二扩散区域包括具有第一类型的导电性的第三扩散区域，以在第二扩散区域中提供与寄生晶体管的发射极区域串联设置的电阻路径，同时反向馈送它并使其饱和，从而导致其当前的增益和由此引起的最大电流的限制。

5. 发明授权

US5986411A IC for implementing the function of a DIAC diode 失效
标题翻译：用于实现DIAC二极管功能的IC
公开(公告)号：US5986411A
公开(公告)日：1999-11-16
申请号：US021289
申请日：1998-02-10
申请人： Stefano Sueri , Atanasio La Barbera , Natale Aiello , Vito Graziano
发明人： Stefano Sueri , Atanasio La Barbera , Natale Aiello , Vito Graziano
IPC分类号： H03K17/30 , H05B41/282 , H05B37/02
CPC分类号： H03K17/30 , H05B41/2825 , Y10S315/07
摘要： The present invention relates to an integrated circuit adapted to perform the function of a diode of the DIAC type, the circuit having an input terminal and an output terminal. The circuit includes a first input transistor having a first terminal connected to a fixed voltage reference, a second terminal, and a control terminal coupled to the input terminal of the circuit. The circuit further includes second and third transistors in a current mirror configuration, each having a first terminal for coupling to the input terminal of the circuit, and a second terminal, and associated control terminals connected together and coupled to the second terminal of the first input transistor, the second terminal of the second transistor being connected to the control terminal of the first transistor. Finally, the circuit includes a fourth output transistor connected, with first and second terminals, between the output terminal and the input terminal of the circuit, the fourth output transistor also having a control terminal connected to the second terminal of the third transistor.
摘要翻译：本发明涉及一种适用于执行DIAC型二极管功能的集成电路，该电路具有输入端和输出端。电路包括具有连接到固定电压基准的第一端子，第二端子和耦合到电路的输入端子的控制端子的第一输入晶体管。电路还包括电流镜配置中的第二和第三晶体管，每个晶体管具有用于耦合到电路的输入端的第一端子和第二端子，以及连接在一起并耦合到第一输入端的第二端子的相关联的控制端子晶体管，第二晶体管的第二端子连接到第一晶体管的控制端子。最后，电路包括第四输出晶体管，与第一和第二端子连接在输出端子和电路的输入端之间，第四输出晶体管还具有连接到第三晶体管的第二端子的控制端子。

6. 发明授权

US5712776A Starting circuit and method for starting a MOS transistor 失效
标题翻译：用于启动MOS晶体管的启动电路和方法
公开(公告)号：US5712776A
公开(公告)日：1998-01-27
申请号：US688296
申请日：1996-07-30
申请人： Sergio Palara , Vito Graziano
发明人： Sergio Palara , Vito Graziano
IPC分类号： H02M7/5383 , H03K17/16 , H03K17/284 , H05B41/282 , H02M7/122
CPC分类号： H05B41/2825 , H02M7/5383 , H03K17/166 , H03K17/284
摘要： A start up circuit causes a MOS transistor to be turned on by sensing local electrical quantities thereof, specifically the potential at the drain terminal of the MOS transistor. A small current is injected into the control terminal of the MOS transistor when the potential at the drain terminal is high. For the purpose, an electric network is arranged to couple these two terminals together.
摘要翻译：启动电路通过感测其局部电量，特别是MOS晶体管的漏极端子处的电位，使MOS晶体管导通。当漏极端子的电位高时，将小电流注入MOS晶体管的控制端。为了这个目的，布置一个电网将这两个终端耦合在一起。

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