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    • 2. 发明申请
    • Method for discrete gate sizing in a netlist
    • 网表中离散门尺寸的方法
    • US20050081175A1
    • 2005-04-14
    • US10683628
    • 2003-10-10
    • William ScottViktor Lapinskii
    • William ScottViktor Lapinskii
    • G06F9/45G06F17/50
    • G06F17/505
    • A set of gate sizes for a netlist having a plurality of gates wherein for each of the gates a number of discrete gate sizes is available is selected such that the selection minimizes worst slack in the netlist. A current gate size for each gate is selected and an a current weight assigned to each one of the timing edges in the netlist. A new gate size is selected for each one of the gates from one of the current gate size and second one of the available gates sizes wherein such selection of each new gate size minimizes a sum of weighted delays obtained over all timing edges. The minimum sum of weighted delays is obtained from a min-cut in a timing flow graph. The results of the min-cut are used in the next iteration and re-iterating occurs until an exit criteria is determined.
    • 具有多个门的网表的一组门尺寸,其中对于每个门,选择多个离散门尺寸是可用的,使得选择使网表中最差的松弛最小化。 选择每个门的当前门尺寸和分配给网表中的每个时序边缘的当前权重。 从当前栅极尺寸和可用栅极尺寸中的一个选择栅极大小,其中每个新栅极尺寸的这种选择使得在所有定时边缘上获得的加权延迟之和最小化。 加权延迟的最小总和是从定时流程图中的最小值获得的。 最小切割的结果在下一次迭代中使用,并且重新迭代发生,直到确定退出标准。