专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07719055B1 Cascode power switch topologies 有权
标题翻译：串级电源开关拓扑
公开(公告)号：US07719055B1
公开(公告)日：2010-05-18
申请号：US11798150
申请日：2007-05-10
申请人： Ty R. McNutt , John V. Reichl , Harold C. Heame, III , Eric J. Stewart , Stephen D. Van Campen , Victor D. Veliadis
发明人： Ty R. McNutt , John V. Reichl , Harold C. Heame, III , Eric J. Stewart , Stephen D. Van Campen , Victor D. Veliadis
IPC分类号： H01L31/062
CPC分类号： H01L29/8083 , H01L29/0843 , H01L29/1066 , H01L29/1608 , H01L29/2003 , H01L29/7722 , H03K17/567 , H03K2017/6875
摘要： A normally-off cascode power switch circuit is disclosed fabricated in wide bandgap semiconductor material such as silicon carbide or gallium nitride and which is capable of conducting current in the forward and reverse direction under the influence of a positive gate bias. The switch includes cascoded junction field effect transistors (JFETs) that enable increased gain, and hence blocking voltage, while minimizing specific on-resistance.
摘要翻译：公开了一种常闭型共源共栅电源开关电路，其制造在诸如碳化硅或氮化镓的宽带隙半导体材料中，并且能够在正栅极偏压的影响下在正向和反向导通电流。该开关包括级联结型场效应晶体管（JFET），其能够增加增益，并因此实现阻断电压，同时最小化特定的导通电阻。

2. 发明授权

US08278666B1 Method and apparatus for growing high purity 2H-silicon carbide 有权
标题翻译：生长高纯度2H-碳化硅的方法和装置
公开(公告)号：US08278666B1
公开(公告)日：2012-10-02
申请号：US12821877
申请日：2010-06-23
申请人： Narsingh B. Singh , Sean R. McLaughlin , Thomas J. Knight , Robert M. Young , Brian P. Wagner , David A. Kahler , Andre E. Berghmans , David J. Knuteson , Ty R. McNutt , Jerry W. Hedrick, Jr. , George M. Bates , Kenneth Petrosky
发明人： Narsingh B. Singh , Sean R. McLaughlin , Thomas J. Knight , Robert M. Young , Brian P. Wagner , David A. Kahler , Andre E. Berghmans , David J. Knuteson , Ty R. McNutt , Jerry W. Hedrick, Jr. , George M. Bates , Kenneth Petrosky
IPC分类号： H01L29/15 , H01L31/0312
CPC分类号： H01L21/02381 , C30B23/02 , C30B25/02 , C30B25/183 , C30B29/36 , C30B29/403 , H01L21/02447 , H01L21/02502 , H01L21/0254 , H01L21/0262
摘要： The disclosure relates to a high purity 2H-SiC composition and methods for making same. The embodiments represented herein apply to both thin film and bulk growth of 2H-SiC. According to one embodiment, the disclosure relates to doping an underlying substrate or support layer with one or more surfactants to nucleate and grow high purity 2H-SiC. In another embodiment, the disclosure relates to a method for preparing 2H-SiC compositions by nucleating 2H-SiC on another SiC polytype using one or more surfactants. The surfactants can include AlN, Te, Sb and similar compositions. These nucleate SiC into disc form which changes to hexagonal 2H-SiC material.
摘要翻译：本公开涉及高纯度2H-SiC组合物及其制备方法。这里所示的实施方案适用于2H-SiC的薄膜和体积生长。根据一个实施方案，本公开涉及用一种或多种表面活性剂掺杂下面的基底或支撑层以使高纯度2H-SiC成核和生长。在另一个实施方案中，本公开内容涉及通过使用一种或多种表面活性剂在其它SiC多型体上成核2H-SiC制备2H-SiC组合物的方法。表面活性剂可以包括AlN，Te，Sb和类似组合物。这些将SiC成核转变成六角形2H-SiC材料的盘形。

3. 发明授权

US07782118B2 Gate drive for wide bandgap semiconductor device 有权
标题翻译：宽带隙半导体器件的栅极驱动
公开(公告)号：US07782118B2
公开(公告)日：2010-08-24
申请号：US11790973
申请日：2007-04-30
申请人： John Vincent Reichl , David Everett Bulgher , Ty R. McNutt
发明人： John Vincent Reichl , David Everett Bulgher , Ty R. McNutt
IPC分类号： H03K17/687
CPC分类号： H03K17/08128 , H01L29/8083 , H01L2924/0002 , H03K17/08122 , H03K17/145 , H03K17/6871 , H03K2217/0036 , H01L2924/00
摘要： A gate drive circuit for a wide bandgap semiconductor junction gated transistor includes a gate current limit resistor. The gate current limit resistor is coupled to a gate input of the wide bandgap semiconductor junction gated transistor when in use and limits a gate current provided to the gate input of the junction gated transistor. An AC-coupled charging capacitor is also included in the gate drive circuit. The AC-coupled charging capacitor is coupled to the gate input of the wide bandgap semiconductor junction gated transistor when in use and is positioned parallel to the gate current limit resistor. A diode is coupled to the gate current limit resistor and the AC-coupled charging capacitor on one end and an output of a gate drive chip on the other end When in use, the diode lowers a gate voltage output from the gate drive chip applied to the gate input of the wide bandgap semiconductor junction gated transistor through the gate current limit resistor. The gate drive circuitry provides a small, efficient, and cost effective control circuitry for a wide bandgap semiconductor junction gated transistor.
摘要翻译：用于宽带隙半导体结栅极晶体管的栅极驱动电路包括栅极限流电阻器。栅极电流限制电阻器在使用时耦合到宽带隙半导体结栅极门控晶体管的栅极输入，并限制提供给结门控晶体管的栅极输入的栅极电流。栅极驱动电路中还包括AC耦合充电电容器。交流耦合充电电容器在使用时耦合到宽带隙半导体结门控晶体管的栅极输入，并且与栅极限流电阻平行。二极管耦合到栅极限流电阻器，一端的AC耦合充电电容器和另一端的栅极驱动芯片的输出。在使用时，二极管降低从施加到栅极驱动芯片的栅极电压输出通过栅极限流电阻的宽带隙半导体结门控晶体管的栅极输入。栅极驱动电路为宽带隙半导体结门控晶体管提供了一种小型，高效且成本有效的控制电路。

4. 发明申请

US20080265980A1 Gate drive for wide bandgap semiconductor device 有权
标题翻译：宽带隙半导体器件的栅极驱动
公开(公告)号：US20080265980A1
公开(公告)日：2008-10-30
申请号：US11790973
申请日：2007-04-30
申请人： John Vincent Reichl , David Everett Bulgher , Ty R. McNutt
发明人： John Vincent Reichl , David Everett Bulgher , Ty R. McNutt
IPC分类号： H03K17/687
CPC分类号： H03K17/08128 , H01L29/8083 , H01L2924/0002 , H03K17/08122 , H03K17/145 , H03K17/6871 , H03K2217/0036 , H01L2924/00
摘要： A gate drive circuit for a wide bandgap semiconductor junction gated transistor includes a gate current limit resistor. The gate current limit resistor is coupled to a gate input of the wide bandgap semiconductor junction gated transistor when in use and limits a gate current provided to the gate input of the junction gated transistor. An AC-coupled charging capacitor is also included in the gate drive circuit. The AC-coupled charging capacitor is coupled to the gate input of the wide bandgap semiconductor junction gated transistor when in use and is positioned parallel to the gate current limit resistor. A diode is coupled to the gate current limit resistor and the AC-coupled charging capacitor on one end and an output of a gate drive chip on the other end When in use, the diode lowers a gate voltage output from the gate drive chip applied to the gate input of the wide bandgap semiconductor junction gated transistor through the gate current limit resistor. The gate drive circuitry provides a small, efficient, and cost effective control circuitry for a wide bandgap semiconductor junction gated transistor.
摘要翻译：用于宽带隙半导体结栅极晶体管的栅极驱动电路包括栅极限流电阻器。栅极电流限制电阻器在使用时耦合到宽带隙半导体结栅极门控晶体管的栅极输入，并限制提供给结门控晶体管的栅极输入的栅极电流。栅极驱动电路中还包括AC耦合充电电容器。交流耦合充电电容器在使用时耦合到宽带隙半导体结门控晶体管的栅极输入，并且与栅极限流电阻平行。二极管耦合到栅极限流电阻器，一端的AC耦合充电电容器和另一端的栅极驱动芯片的输出。在使用时，二极管降低从施加到栅极驱动芯片的栅极电压输出通过栅极限流电阻的宽带隙半导体结门控晶体管的栅极输入。栅极驱动电路为宽带隙半导体结门控晶体管提供了一种小型，高效且成本有效的控制电路。

5. 发明申请

US20090179297A1 JUNCTION BARRIER SCHOTTKY DIODE WITH HIGHLY-DOPED CHANNEL REGION AND METHODS 审中-公开
标题翻译：具有高度通道区域和方法的结型阻挡肖特基二极管
公开(公告)号：US20090179297A1
公开(公告)日：2009-07-16
申请号：US12015096
申请日：2008-01-16
申请人： Eric J. STEWART , Ty R. McNUTT , Rowland C. CLARKE
发明人： Eric J. STEWART , Ty R. McNUTT , Rowland C. CLARKE
IPC分类号： H01L29/872 , H01L21/329
CPC分类号： H01L29/861 , H01L29/0657 , H01L29/872
摘要： A junction barrier Schottky device includes a semiconductor substrate with basal, drift, and channel regions doped to a first conductivity type. The channel region is more highly doped than the drift region, and a blocking region doped to a second conductivity type is disposed at least partly around the channel region. A Schottky barrier is formed on and in contact with the channel and blocking regions.
摘要翻译：接合势垒肖特基器件包括具有掺杂到第一导电类型的基极，漂移和沟道区的半导体衬底。沟道区比漂移区更加掺杂，并且掺杂到第二导电类型的阻挡区至少部分地设置在沟道区周围。肖特基势垒形成在通道和阻挡区域上并与其接触。

6. 发明申请

US20080308838A1 Power switching transistors 有权
标题翻译：电源开关晶体管
公开(公告)号：US20080308838A1
公开(公告)日：2008-12-18
申请号：US11808915
申请日：2007-06-13
申请人： Ty R. McNutt , Eric J. Stewart , Rowland C. Clarke , Ranbir Singh , Stephen Van Campen , Marc E. Sherwin
发明人： Ty R. McNutt , Eric J. Stewart , Rowland C. Clarke , Ranbir Singh , Stephen Van Campen , Marc E. Sherwin
IPC分类号： H01L29/739 , H01L21/329 , H01L21/8232 , H01L29/872 , H01L27/098
CPC分类号： H01L27/098 , H01L21/8232 , H01L27/0727 , H01L27/095 , H01L29/0619 , H01L29/0623 , H01L29/1066 , H01L29/4236 , H01L29/42376 , H01L29/66348 , H01L29/66909 , H01L29/7397 , H01L29/808 , H01L29/8083 , H01L29/8122 , H01L29/872
摘要： In an embodiment, a integrated semiconductor device includes a first Vertical Junction Field Effect Transistor (VJFET) having a source, and a gate disposed on each side of the first VJFET source, and a second VJFET transistor having a source, and a gate disposed on each side of the second VJFET source. At least one gate of the first VJFET is separated from at least one gate of the second VJFET by a channel. The integrated semiconductor device also includes a Junction Barrier Schottky (JBS) diode positioned between the first and second VJFETs. The JBS diode comprises a metal contact that forms a rectifying contact to the channel and a non-rectifying contact to at least one gate of the first and second VJFETs, and the metal contact is an anode of the JBS diode. A first electrical connection ties the gates of the first VJFET, the gates of the second VJFET, and the anode of the JBS diode to a common gate electrode and a second electrical connection ties the source of the first VJFET and the source of the second VJFET to a common source electrode.
摘要翻译：在一个实施例中，集成半导体器件包括具有源极的第一垂直结型场效应晶体管（VJFET）和设置在第一VJFET源的每一侧上的栅极和具有源极的第二VJFET晶体管，栅极设置在第二VJFET源的每一侧。第一VJFET的至少一个栅极通过沟道与第二VJFET的至少一个栅极分离。集成半导体器件还包括位于第一和第二VJFET之间的结栅势垒肖特基（JBS）二极管。 JBS二极管包括形成与沟道的整流接触的金属接触和与第一和第二VJFET的至少一个栅极的非整流接触，并且金属接触是JBS二极管的阳极。第一电连接将第一VJFET的栅极，第二VJFET的栅极和JBS二极管的阳极连接到公共栅电极，并且第二电连接将第一VJFET的源极和第二VJFET的源极连接到共同的源电极。

7. 发明申请

US20080157117A1 Insulated gate bipolar transistor with enhanced conductivity modulation 审中-公开
标题翻译：绝缘栅双极晶体管，具有增强的电导率调制
公开(公告)号：US20080157117A1
公开(公告)日：2008-07-03
申请号：US11646346
申请日：2006-12-28
申请人： Ty R. McNutt , Ginger G. Walden , Marc E. Sherwin
发明人： Ty R. McNutt , Ginger G. Walden , Marc E. Sherwin
IPC分类号： H01L29/74 , H01L21/332
CPC分类号： H01L29/7395 , H01L29/0692 , H01L29/1095
摘要： A insulated gate bipolar transistors (IGBT) having an enhanced modulation layer provides reduced on-state power dissipation and better conductivity modulation than conventional devices. The IGBT includes an enhanced modulation layer disposed within a portion of the n− doped drift layer, in a n-type device, or p− doped drift layer, in a p-type device. The enhanced modulation layer contains a higher carrier concentration than the n− or p− doped drift layer. If the IGBT device is in an on state, the enhanced modulation layer decreases a size of a depletion region formed around the p well body region or n well body region. In a n-type enhanced modulation layer IGBT, electrons, traveling from the n+ region towards the emitter, are spread laterally and uniformly in the n− doped drift layer. In a p-type enhanced modulation layer IGBT, holes, traveling from the p+ region towards the emitter, are spread laterally and uniformly in the p− doped drift layer.
摘要翻译：具有增强的调制层的绝缘栅双极晶体管（IGBT）提供比常规器件更低的通态功耗和更好的导电性调制。 IGBT包括在p型器件中的n型器件或p-掺杂漂移层中的n掺杂漂移层的一部分内的增强型调制层。增强的调制层包含比n或p掺杂漂移层更高的载流子浓度。如果IGBT器件处于导通状态，则增强调制层减小在p阱体区域或n阱体区域周围形成的耗尽区域的尺寸。在n型增强型调制层IGBT中，从n +区向发射极行进的电子在n掺杂漂移层中横向均匀地扩展。在p型增强调制层IGBT中，从p +区向发射极行进的空穴在p掺杂漂移层中横向均匀地扩展。

8. 发明授权

US07982239B2 Power switching transistors 有权
标题翻译：电源开关晶体管
公开(公告)号：US07982239B2
公开(公告)日：2011-07-19
申请号：US11808915
申请日：2007-06-13
申请人： Ty R. McNutt , Eric J. Stewart , Rowland C. Clarke , Ranbir Singh , Stephen Van Campen , Marc E. Sherwin
发明人： Ty R. McNutt , Eric J. Stewart , Rowland C. Clarke , Ranbir Singh , Stephen Van Campen , Marc E. Sherwin
IPC分类号： H01L29/47
CPC分类号： H01L27/098 , H01L21/8232 , H01L27/0727 , H01L27/095 , H01L29/0619 , H01L29/0623 , H01L29/1066 , H01L29/4236 , H01L29/42376 , H01L29/66348 , H01L29/66909 , H01L29/7397 , H01L29/808 , H01L29/8083 , H01L29/8122 , H01L29/872
摘要： In an embodiment, a integrated semiconductor device includes a first Vertical Junction Field Effect Transistor (VJFET) having a source, and a gate disposed on each side of the first VJFET source, and a second VJFET transistor having a source, and a gate disposed on each side of the second VJFET source. At least one gate of the first VJFET is separated from at least one gate of the second VJFET by a channel. The integrated semiconductor device also includes a Junction Barrier Schottky (JBS) diode positioned between the first and second VJFETs. The JBS diode comprises a metal contact that forms a rectifying contact to the channel and a non-rectifying contact to at least one gate of the first and second VJFETs, and the metal contact is an anode of the JBS diode. A first electrical connection ties the gates of the first VJFET, the gates of the second VJFET, and the anode of the JBS diode to a common gate electrode and a second electrical connection ties the source of the first VJFET and the source of the second VJFET to a common source electrode.
摘要翻译：在一个实施例中，集成半导体器件包括具有源极的第一垂直结型场效应晶体管（VJFET）和设置在第一VJFET源的每一侧上的栅极和具有源极的第二VJFET晶体管，栅极设置在第二VJFET源的每一侧。第一VJFET的至少一个栅极通过沟道与第二VJFET的至少一个栅极分离。集成半导体器件还包括位于第一和第二VJFET之间的结栅势垒肖特基（JBS）二极管。 JBS二极管包括形成与沟道的整流接触的金属接触和与第一和第二VJFET的至少一个栅极的非整流接触，并且金属接触是JBS二极管的阳极。第一电连接将第一VJFET的栅极，第二VJFET的栅极和JBS二极管的阳极连接到公共栅电极，并且第二电连接将第一VJFET的源极和第二VJFET的源极连接到共同的源电极。

9. 发明授权

US07800196B2 Semiconductor structure with an electric field stop layer for improved edge termination capability 有权
公开(公告)号：US07800196B2
公开(公告)日：2010-09-21
申请号：US12285138
申请日：2008-09-30
申请人： John Victor D. Veliadis , Ty R. McNutt
发明人： John Victor D. Veliadis , Ty R. McNutt
IPC分类号： H01L29/732
CPC分类号： H01L29/7813 , H01L24/48 , H01L24/49 , H01L29/0615 , H01L29/0619 , H01L29/0638 , H01L29/0661 , H01L29/1602 , H01L29/1608 , H01L29/2003 , H01L29/6606 , H01L29/66068 , H01L29/7325 , H01L29/7395 , H01L29/7722 , H01L29/7811 , H01L29/8083 , H01L29/8613 , H01L2224/48472 , H01L2224/49111 , H01L2924/00014 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/13062 , H01L2924/13091 , H01L2924/3011 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An exemplary edge termination structure maintains the breakdown voltage of the semiconductor device after it has been sawed off the wafer and packaged by creating an electric field stop layer at a periphery of the semiconductor device. The electric field stop layer has a dopant concentration higher than that of the layer in which an edge termination is implemented, such as a drift layer or a channel layer. The electric field stop layer may be created by selectively masking the peripheries of the device during the device processing, i.e., mesa etch, to protect and preserve the highly doped material at the peripheries of the device.

10. 发明申请

US20100078755A1 Semiconductor structure with an electric field stop layer for improved edge termination capability 有权
标题翻译：具有电场停止层的半导体结构，用于改善边缘终止能力
公开(公告)号：US20100078755A1
公开(公告)日：2010-04-01
申请号：US12285138
申请日：2008-09-30
申请人： John Victor Veliadis , Ty R. McNutt
发明人： John Victor Veliadis , Ty R. McNutt
IPC分类号： H01L29/06
CPC分类号： H01L29/7813 , H01L24/48 , H01L24/49 , H01L29/0615 , H01L29/0619 , H01L29/0638 , H01L29/0661 , H01L29/1602 , H01L29/1608 , H01L29/2003 , H01L29/6606 , H01L29/66068 , H01L29/7325 , H01L29/7395 , H01L29/7722 , H01L29/7811 , H01L29/8083 , H01L29/8613 , H01L2224/48472 , H01L2224/49111 , H01L2924/00014 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/13062 , H01L2924/13091 , H01L2924/3011 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An exemplary edge termination structure maintains the breakdown voltage of the semiconductor device after it has been sawed off the wafer and packaged by creating an electric field stop layer at a periphery of the semiconductor device. The electric field stop layer has a dopant concentration higher than that of the layer in which an edge termination is implemented, such as a drift layer or a channel layer. The electric field stop layer may be created by selectively masking the peripheries of the device during the device processing, i.e., mesa etch, to protect and preserve the highly doped material at the peripheries of the device.
摘要翻译：示例性边缘终端结构在半导体器件已经从晶片上锯下并且通过在半导体器件的周围产生电场阻挡层而被封装而保持半导体器件的击穿电压。电场阻挡层的掺杂剂浓度高于实现边缘终止的层的掺杂浓度，例如漂移层或沟道层。可以通过在器件处理期间选择性地掩蔽器件的周边（即台面蚀刻）来产生电场阻挡层，以在器件的周边保护和保留高掺杂的材料。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式